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| | * | | | | | | | drm/radeon: clear the page directory using the DMAChristian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: initially clear page tablesChristian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clear page tables after allocating them in case we don't completely fill them later. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: drop CP page table updates & cleanup v2Christian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA ring seems to be stable now. v2: remove pt_ring_index as well Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: add vm_set_page tracepointChristian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: rework and fix reset detection v2Christian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Stop fiddling with jiffies, always wait for RADEON_FENCE_JIFFIES_TIMEOUT. Consolidate the two wait sequence implementations into just one function. Activate all waiters and remember if the reset was already done instead of trying to reset from only one thread. v2: clear reset flag earlier to avoid timeout in IB test Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: don't use PACKET2 on CIKMarek Olšák2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is said to cause hangs. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: fix UVD destroy IB sizeChristian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parameter is in bytes not dwords. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: activate UVD clocks before sending the destroy msgChristian König2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the UVD clocks are still active before sending the destroy message, otherwise the hw might hang. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTLAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Typo in the register offset. Noticed-by: Sylvain BERTRAND <sylware@legeek.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * | | | | | | | drm/radeon: fix endian handling in rlc buffer setupAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buffers needs to be in little endian format. Noticed-by: Sylvain BERTRAND <sylware@legeek.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/dpm: retain user selected performance level across state changesAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the user has forced the state high or low, retain that preference even when we switch power states. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=70654 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: disable force performance state when thermal state is activeAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the thermal state is active, we are in the lowest performance level to cool down the chip. Don't let the user force it higher. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable DPM by default on r7xx asicsAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable DPM by default on evergreen asicsAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems to be stable on them. There are still some issues with the performance states staying in the highest levels on certain cards when multiple monitors are attached, but being that the the cards are always in their highest power state at boot up anyway, this doesn't really change anything and improves things in all other cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable DPM by default on BTC asicsAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable DPM by default on SI asicsAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems to be stable on them and improves peformance as most SI asics have very low boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable DPM by default on SUMO/PALM APUsAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DPM seems to be stable on these asics and it drastically improves performance depending on the boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/dpm: only print dpm debugging messages when radeon_dpm=1Alex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids spamming the system log for chips where dpm is enabled by default, but prints then messages when users force it on for other asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: Implement radeon_pci_shutdownMarkus Trippelsdorf2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently radeon devices are not properly shutdown during kexec. This causes a varity of issues, e.g. dpm initialization failures. Fix this by implementing a radeon_pci_shutdown function, that unloads the driver cleanly. Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/audio: write audio/video latency info for DCE6/8Alex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed by the hda driver to properly set up synchronization on the audio side. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| | * | | | | | | | drm/radeon/audio: write audio/video latency info for DCE4/5Alex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed by the hda driver to properly set up synchronization on the audio side. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| | * | | | | | | | drm/radeon/audio: break out of loops once we match connectorAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to continue with the loops once we've matched the appropriate connector. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.xAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.xAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/si: tell dpm there is a display connectedAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On SI asics, the SMC will automatically force the performance level to the lowest level if there are no displays active. This prevents automatic performance scaling on PowerXpress systems or for offscreen rendering or compute when displays are disabled. Going forward, it would be best to dynamically change this, but for now leave scaling enabled. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=69395 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: implement blit copy callback for CIKAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uses the CP ring rather than the DMA ring. Useful for debugging and benchmarking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()Dan Carpenter2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rv6xx_clocks_per_unit() function pretends it can set flags in a u64 bitfield but really because "1" is an int it doesn't work for more than 32 bits. The only caller truncates the high bits away anyway. I've just changed it to be a u32. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: plug in blit copy routine for SIAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uses CP DMA packet just like previous asics. Useful for debugging and benchmarking. Uses same packet format as prior asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: enable hdmi audio by defaultAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems to be stable enough for the majority of users. It can be disabled on the fly via connector attributes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: add runtime PM support (v2)Dave Airlie2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This hooks radeon up to the runtime PM system to enable dynamic power management for secondary GPUs in switchable and powerxpress laptops. v2: agd5f: clean up, add module parameter Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: convert to pmopsDave Airlie2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a pre-requisite for runtime pm on powerxpress systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: add a connector property for ditherAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows you to enable dither in the display hardware when the monitor supports lower a lower bpc than the current framebuffer format. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | | | | | drm/radeon: Add support for programming the FMT blocksAlex Deucher2013-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FMT blocks control how data is sent from the backend of the display pipe to to monitor. Proper set up of the FMT blocks are required for 30bpp formats. Additionally, dithering can be enabled on for better display with 18 and 24bpp displays. The exception is LVDS/eDP which atom takes care of in the SelectCRTC_Source table. For now just enable truncation until we test dithering more. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | | | | | | | | Merge tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux ↵Dave Airlie2013-11-05
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next drm/tegra: Changes for v3.13-rc1 The biggest part of the changes is the decoupling of the host1x and DRM drivers followed by the move of Tegra DRM back to drivers/gpu/drm/tegra from whence it came. There is a lot of cleanup as well, and the drivers can now be properly unloaded and reloaded. HDMI support for the Tegra114 SoC was contributed by Mikko Perttunen. gr2d support was extended to Tegra114 and the gr3d driver that has been in the works for quite some time finally made it in. All pieces to run an OpenGL driver on top of an upstream kernel are now available. Support for syncpoint bases was added by Arto Merilainen. This is useful for synchronizing between command streams from different engines such as gr2d and gr3d. Erik Faye-Lund and Wei Yongjun contributed various small fixes. Thanks! * tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux: (45 commits) drm/tegra: Reserve syncpoint base for gr3d drm/tegra: Reserve base for gr2d drm/tegra: Deliver syncpoint base to user space gpu: host1x: Add syncpoint base support gpu: host1x: Add 'flags' field to syncpt request drm/tegra: Disable clock on probe failure gpu: host1x: Disable clock on probe failure drm/tegra: Support bottom-up buffer objects drm/tegra: Add support for tiled buffer objects drm/tegra: Add 3D support drm/tegra: Introduce tegra_drm_submit() drm/tegra: Use symbolic names for gr2d registers drm/tegra: Start connectors with correct DPMS mode drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC drm/tegra: hdmi: Fix build warnings drm/tegra: hdmi: Detect DVI-only displays drm/tegra: Add Tegra114 HDMI support drm/tegra: hdmi: Parameterize based on compatible property drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30} gpu: host1x: Add support for Tegra114 ...
| | * | | | | | | | | drm/tegra: Reserve syncpoint base for gr3dThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Request a syncpoint base to be associated with the gr3d syncpoint. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Reserve base for gr2dArto Merilainen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the gr2d to reserve a base for syncpoint. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Deliver syncpoint base to user spaceArto Merilainen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a separate ioctl for delivering syncpoint base number to user space. If the syncpoint does not have an associated base, the function returns -ENXIO. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Add syncpoint base supportArto Merilainen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for hardware syncpoint bases. This creates a simple mechanism to stall the command FIFO until an operation is completed. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Add 'flags' field to syncpt requestArto Merilainen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have been taking a separate boolean flag ('client_managed') for indicating if the syncpoint value should be tracked by the host1x driver. This patch converts the field into generic 'flags' field so that we can easily add more information while requesting a syncpoint. Clients are adapted to use the new interface accordingly. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Disable clock on probe failureWei Yongjun2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | gpu: host1x: Disable clock on probe failureWei Yongjun2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Support bottom-up buffer objectsThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Add support for tiled buffer objectsThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Add 3D supportThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and register a channel with the Tegra DRM driver so that the unit can be used from userspace. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Introduce tegra_drm_submit()Thierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Command stream submissions are the same across all devices that expose a channel to userspace, so move the code into a generic function. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Use symbolic names for gr2d registersThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using magic numbers for the registers which contain memory addresses in the firewall table, using symbolic names. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: Start connectors with correct DPMS modeThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A connector's DPMS mode isn't initialized by default, therefore using a default of 0 (DRM_MODE_DPMS_ON). This can cause problems in that the DRM core won't explicitly turn on a connector because it thinks that it is already on. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: hdmi: Enable VDD earlier for hotplug/DDCMikko Perttunen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VDD regulator used to be enabled only at tegra_output_hdmi_enable, which is called after a sink is detected. However, the HDMI hotplug pin works by returning the voltage supplied by the VDD pin, so this meant that the hotplug pin was never asserted and the sink was not detected unless the VDD regulator was set to be always on. This patch moves the enable to the tegra_hdmi_init() function to make sure the regulator will get enabled and therefore ensure proper hotplug detection. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: hdmi: Fix build warningsThierry Reding2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These seem to show up when building for architectures other than ARM, which I guess will never happen. The reason why the kbuild test bot ran into these was a missing dependency which has hence been fixed. Still it doesn't hurt to fix them anyway. Reported-by: kbuild test bot <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | drm/tegra: hdmi: Detect DVI-only displaysMikko Perttunen2013-10-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use EDID data to determine whether the display supports HDMI or DVI only. The HDMI output used to assume to be connected to HDMI displays, but that broke support for DVI displays that don't understand the interspersed audio/other data. To be on the safe side, default to DVI if no EDID data is available. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [treding@nvidia.com: move detection to separate function] Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-07-14 09:21:48 +0000