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* | msm: kgsl: Use the GPU to write the RPTRCarter Cooper2016-07-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memstore shared between the CPU and GPU is old but can not be messed with. Rather than stealing values from it where available, add a new block of shared memory that is exclusive to the driver and GPU. This block can be used more freely than the old memstore block. Program the GPU to write the RPTR out to an address the CPU can read rather than having the CPU read a GPU register directly. There are some very small but very real conditions where different blocks on the GPU have outdated values for the RPTR. When scheduling preemption the value read from the register could not reflect the actual value of the RPTR in the CP. This can cause the save/restore from preemption to give back incorrect RPTR values causing much confusion between the GPU and CPU. Remove the ringbuffers copy of the read pointer shadow. Now that the GPU will update a shared memory address with the value of the read pointer, there is no need to poll the register to get the value and then keep a local copy of it. CRs-Fixed: 987082 Change-Id: Ic44759d1a5c6e48b2f0f566ea8c153f01cf68279 Signed-off-by: Carter Cooper <ccooper@codeaurora.org> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
* | msm: kgsl: Stop fault_timer before reading fault registersRajesh Kemisetti2016-07-20
|/ | | | | | | | | | | | | | | | | Currently adreno_ft_regs_val is getting updated at the time of first submission or on the expiry of fault_timer. If the fault_timer expires exactly at the time of inflight becomes 0 and there is an immediate submission for which GPU finishes the work within short time. Then there is a chance to read the fault registers in fault_detect_read() and fault_detect_read_compare() with less time gap and declare it as a fault. Stop the timer before reading fault registers and start it again. CRs-Fixed: 1043478 Change-Id: Ib35104adf7b3618f94c6adf7fab531abffea3f76 Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
* Merge "msm: kgsl: Disable GPU software clockgating on A540"Linux Build Service Account2016-07-15
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| * msm: kgsl: Disable GPU software clockgating on A540Oleg Perelet2016-07-13
| | | | | | | | | | | | | | | | | | GPMU & CRC perform more effective idle clock control than software clock gating. CRs-Fixed: 973565 Change-Id: Ifd45878a65b7da4167d2caa30b3acffd427ad72e Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* | Merge "msm: kgsl: Disable GPU isense clock below nominal power level"Linux Build Service Account2016-07-15
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| * | msm: kgsl: Disable GPU isense clock below nominal power levelOleg Perelet2016-07-13
| |/ | | | | | | | | | | | | | | | | By disabling isense clock below nominal level we'll remove vote for CX rail and save power. CRs-Fixed: 973565 Change-Id: If4a13b3eca117fc2ff9c32ca3a24eb8b8e70b4fe Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* | Merge "msm: kgsl: Remove ISENSE control code"Linux Build Service Account2016-07-15
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| * | msm: kgsl: Remove ISENSE control codeOleg Perelet2016-07-12
| |/ | | | | | | | | | | | | | | | | Remove ISENSE control code from kernel, GPMU Firmware is doing that now. Change-Id: I34471bb36248bc47b4b5c4b7f4bc54d6bab6ec28 CRs-Fixed: 973565 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* / msm: kgsl: Fix the access to invalid poolSunil Khatri2016-07-11
|/ | | | | | | | | | | | | | | | If a free page is not found in a particular pool, we fall back to lower order pools. While doing so make sure we dont do that when already in zero order pool. For zero order(pool_idx = 0) pool, (pool_idx-1) value becomes -1 that is invalid and compiler throws the error that array subscript is below bounds. This problem is exposed when we enable kernel config option "CONFIG_ALLOC_BUFFERS_IN_4K_CHUNKS" which will force only zero order pool and hence the index value calculation to -1. Change-Id: I81e8a1e79cd974b7a13a9d23cb3d809464b6dcda Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Discard negative CRC throttling cycle readingsOleg Perelet2016-06-30
| | | | | | | | Ignore negative CRC throttle cycle readings in corner cases. Change-Id: Ic237bd0558a4769dc89bfb7e70a287165f842b92 CRs-Fixed: 973565 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Add gcc_gpu_iref_clk to list of GPU clocksOleg Perelet2016-06-29
| | | | | | | | GPU will vote off gcc_gpu_iref_clk when going to low power modes. CRs-Fixed: 1024948 Change-Id: I13b7a70f1fa748f2f4cdfb485dda2f7857e0b3d2 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Fix calculation error for deep nap timer value.Oleg Perelet2016-06-29
| | | | | | | | Deep nap timer value was not calculated right when read from dts file. CRs-Fixed: 973565 Change-Id: I11a70c61d408921edd89b1417b209c5c5a3ddf24 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Create sysfs entry to control GPU clock throttling.Oleg Perelet2016-06-27
| | | | | | | | | | Create sysfs entry to control GPU clock throttling. When 0 is written - all sources of clock throlling - ie LM, BCL, IDLE are disabled. CRs-Fixed: 973565 Change-Id: Iad588eb94861bd6b223715cc05354e3c39db9b24 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Defer adding the mem entry to a processJordan Crouse2016-05-26
| | | | | | | | | | | | | | | If we add the mem entry pointer in the process mem_idr too early other threads can do operations on the entry by guessing the ID or GPU address before the object gets returned by the creating operation. Allocate an ID for the object but don't assign the pointer until right before the creating function returns ensuring that another operation can't access it until it is ready. CRs-Fixed: 1002974 Change-Id: Ic0dedbadc0dd2125bd2a7bcc152972c0555e07f8 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
* msm: kgsl: Avoid race condition in ioctl_syncsource_destroyDivya Ponnusamy2016-05-25
| | | | | | | | | | | | | | | | | If the ioctl syncsource_destroy is accessed by parallel threads, where the spinlock is acquired by threads after getting syncsource, then the simultaneous processes try to remove the already destroyed syncsource->refcount by the first thread that acquires this spinlock. This leads to race condition while removing syncsource->idr. Avoid separate lock inside getting syncsource, instead acquire spinlock before we get the syncsource in destroy ioctl so that the threads access the spinlock and operate on syncsource without use-after-free issue. Change-Id: I6add3800c40cd09f6e6e0cf2720e69059bd83cbc Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
* msm: kgsl: Correction of VBIF debug bus data in snapshotSunil Khatri2016-05-25
| | | | | | | | The debug bus information for VBIF block was not dumped correctly for A5XX GPU during the snapshot dump. Change-Id: I75089e210a6fc72683dcf98cdd4da9d6ab3e6fcf Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Create sysfs entry to control GPU NAP stateOleg Perelet2016-05-24
| | | | | | | | | Create sysfs entry to have option to disable software clockgating NAP state. CRs-Fixed: 973565 Change-Id: I2376f10161040dbf426887ce146ac597f401153f Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Port GPU bus dcvs to kernel 4.4Oleg Perelet2016-05-18
| | | | | | | | Port GPU dcvs from kernel 3.18 to kernel 4.4. CRs-Fixed: 1013343 Change-Id: Ide662b12aa59effa541febcd758426e72b4a1b12 Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Add property to determine GPU bitnessSunil Khatri2016-05-11
| | | | | | | | | | | Add the property to determine GPU bitness which is used by the clients via KGSL ioctl. Certain clients of KGSL such as Open-CL driver need to know explicitly about the GPU mode. Change-Id: I77523d7816edb9776014aaf3aa85321af0d20aaf Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Use the crash dumper to read HLSQ/shader memory on 5XXJordan Crouse2016-05-11
| | | | | | | | | | The host AHB aperture for reading the HSLQ/SP/TP and shader memory blocks might be blocked on A5XX targets so use the CP crash dump utility to read them instead. Downside if the crashdumper goes boom we'll have to skip those registers in the fallback. Change-Id: Ic0dedbad3c7b485c696198bdfcb78d45e929ec22 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
* msm: kgsl: Add effuses read capabilities for A505 GPUHareesh Gundu2016-05-11
| | | | | | | | | A505 GPU is having two different frequency plans, for loading a specific frequency plan add speed bin read information capability to A505. Change-Id: I259020d7e4613d043e213ab2cb41e80ceb11f46a Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
* msm: kgsl: Do not allocate memory for profiling and sync commandsSunil Khatri2016-05-11
| | | | | | | | | | | | Do not allocate memory for IB descriptors for commands of types profiling buffers, sync and markers. This fixes the memory leak due to allocation of memory for such commands and these were never freed. CRs-Fixed: 996651 Change-Id: Ib168d60ad89e0fd55cd1f10b773b7cdaa7400ace Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Add 1M and 8K pools to the allocatorShrenuj Bansal2016-05-11
| | | | | | | | | | | | | | | | This change includes the below: - Add 1M and 8k pools and structure the allocator to use all pools from the largest page to the smallest - Reserve a set number of pages for each of these pools at init time - When allocating, use the reserved pools and then fall back to allocating from system memory using only 8k and 4k pages - Remove maximums on the pool sizes - Zero the memory when we create the pool initially and add pages back to the pool on free CRs-Fixed: 995735 Change-Id: I9440bad62d3e13b434902f167c9d23467b1c4235 Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
* msm: kgsl: Remove harmless preemption log messageHarshdeep Dhatt2016-05-05
| | | | | | | | | | | | This message is logged when we receive a preemption interrupt after we have already detected that preemption has been finished in hardware by reading the preemption status register. This is a harmless condition so remove it. CRs-Fixed: 993480 Change-Id: I61a48353428b3faa042fbc85e259b33c7f23bdb0 Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
* msm: kgsl: Fix overflow in sharedmem read/write functionsSunil Khatri2016-05-05
| | | | | | | | | | There could be possibility of integer overflow on adding sizeof(uint32_t) with uint64_t maximum offset bytes and result in a value smaller than uint64_t maximum memdesc size. CRs-Fixed: 988861 Change-Id: Ifc3ec45297c2a29ad6f7d70dd0bd59238ac8cc3d Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Add MMU offset mapping functionsCarter Cooper2016-05-05
| | | | | | | | | Allow MMU mappings to take offsets rather than only allowing full range mappings. CRs-Fixed: 971174 Change-Id: Iaa113c8414a2d2d8f92b3cb21eaf2e422f273454 Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
* msm: kgsl: Dump 64KB of preemption record in snapshotHarshdeep Dhatt2016-05-05
| | | | | | | | | | Dumping only the ctxt_record structure in a snapshot is not enough. For a more meaningful snapshot, dump 64KB of preempt record. Also, move the code to device specific snapshot function. Change-Id: I43e08ccefbf2d3911191b2aad5168979956e1626 Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
* msm: kgsl: Clean up adreno trace codeCarter Cooper2016-05-05
| | | | | | | | | Give trace code for IRQs a simpler format that moves around where some logic lives. CRs-Fixed: 971172 Change-Id: If426fb7599be0a79b6f37b8008a2310b1c006e93 Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
* msm: kgsl: Don't spam kmsg due to invalid IOCTL requestsCarter Cooper2016-05-05
| | | | | | | | | When the IOCTL is called with invalid data, don't log to kmsg. The returned error code should be enough to tell the UMD what they did wrong. CRs-Fixed: 987074 Change-Id: Iae380e0f44dd53bee8ff4cec347a6b9a632b1f84 Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
* msm: kgsl: Remove superfluous NULL checks when reading timestampsCarter Cooper2016-05-05
| | | | | | | | | There is no way for the UMD to pass in NULL pointers for reading timestamps. The KGSL driver also always has valid pointers for storing the readpointer. Remove the checks that are not needed. Change-Id: Id5f244a57a2b991a10b603ef7236193d4282fd0f Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
* msm: kgsl: Purge unused #definesCarter Cooper2016-05-05
| | | | | | | | | Remove unused #defines, structs and members that are no longer used. CRs-Fixed: 971156 Change-Id: Ibdf6fef6f3f700f3c5315c228c0473e47fb62163 Signed-off-by: Carter Cooper <ccooper@codeaurora.org> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
* msm: kgsl: Use a page pool to reduce allocation timeDeepak Kumar2016-05-05
| | | | | | | | | | | Use a mempool to reduce the allocation time. When memory allocated from pages is freed, put it in a page pool. At allocation time, try to allocate from the page pool before getting pages from the system. Make sure that the pool does not grow too big by enforcing a maximum limit. Change-Id: Icac7fb4355ee1fd07e7127ea5c2721665e279272 Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
* msm: kgsl: Check for failure in coresight initializationSunil Khatri2016-05-05
| | | | | | | | | We need to check for both NULL pointer and error condition in coresight initialization and return with proper error. CR's-Fixed: 971398 Change-Id: Id1e3e0f756ac1c9a0ff4f4e6ce073e80e31473b8 Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
* msm: kgsl: Disable ISENSE CGCOleg Perelet2016-05-03
| | | | | | | | Disable GPU ISENSE clock gating as workaround of ISENSE HW issue. CRs-Fixed: 973565 Change-Id: If54caf008c654f488986a279bd19bea97457dc2c Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Explicitly set ISENSE clock rate for A540.Oleg Perelet2016-04-29
| | | | | | | | On A540 ISENSE clock rate is controlled by GPU driver. CRs-Fixed: 973565 Change-Id: Iab40cff01b6e65db51a4b793572714d2059a78ad Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Update ucode workarounds for A5xx GPUsPrakash Kamliya2016-04-22
| | | | | | | | | | Update ucode workarounds for A5xx GPUs based on new microcode and hardware changes. CRs-Fixed: 1000396 Change-Id: I87a1ba9bfc441cad2ed6a6959d07af1cc1e2c7bc Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org> Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Invoke DCVS callbacks on A540Oleg Perelet2016-04-13
| | | | | | | | | As long as GPMU is enabled, DCVS has to handshake with firmware. It is a new requirement of A540 power management. CRs-Fixed: 973565 Change-Id: Ie6480fc3ba0e1b95aab40e31b09ff2bd798ff30f Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Return EOPNOTSUPP for A3XX command batch profilingHareesh Gundu2016-04-13
| | | | | | | | | | A3XX doesn't have support for command batch profiling. Return EOPNOTSUPP for a command batch profiling request on A3XX, so that userspace code knows that this feature is not supported. CRs-Fixed: 986169 Change-Id: I6dfcab462a933ef31e3bba6bef07f17016ae50b9 Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
* msm: kgsl: Pass correct buffer size for mapping gpuobj user memoryTarun Karra2016-04-13
| | | | | | | | | | | Current code incorrectly specifies buffer size as 0 for mapping gpuobj user memory. This causes the map to fail because buffer size is expected to be a non zero value. Fix this by passing the correct size of the buffer to be mapped. CRs-Fixed: 995378 Change-Id: I1a9aeb3f1dd67f014847322e5b14cba8775a82a4 Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
* msm: kgsl: Fix gpudev NULL dereference in adreno_removeHareesh Gundu2016-04-13
| | | | | | | | | | In adreno_remove() there is possibility of dereference of gpudev without NULL check. Fix this by getting gpudev after adreno_dev NULL check. CRs-Fixed: 993267 Change-Id: I17d8b4ba2c74a787a065dbdb0ac88d065605fcb1 Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
* msm: kgsl: verify user memory permissions before mapping to GPU driverTarun Karra2016-04-13
| | | | | | | | | | | | | | | | For user memory of type KGSL_USER_MEM_TYPE_ADDR mapped to GPU driver verify permissions and map GPU permissions same as CPU permissions. If elevated permissions are requested return an error to prevent privilege escalation. Without this check user could map readonly memory into GPU driver as readwrite and gain elevated privilege. Write permissions check is currently inverted causing readonly user pages to be mapped as readwrite in GPU driver. Fix this check to map readonly pages as readonly. CRs-Fixed: 988993 Change-Id: I0e097d7e4e4c414c0849e33bcc61a26fb94291ad Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
* msm: kgsl: Enable GPMU and SPTP/RAC power collapse on A540Oleg Perelet2016-04-13
| | | | | | | | Enable GPMU and SPTP/RAC power collapse on A540. CRs-Fixed: 973565 Change-Id: I73b40d264c4054a43c2776337b80af88adff077e Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
* msm: kgsl: Zero the adreno ioctl command bufferHarshdeep Dhatt2016-04-13
| | | | | | | | | | The kernel command buffer is not zeroed in the adreno ioctls, and may contain garbage. The garbage value can lead to unexpected results. CRs-Fixed: 993518 Change-Id: I75033cdf4637881ecd6fa4dd31aea083b134e6d2 Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
* msm: kgsl: Correct the order of preemption packetsHarshdeep Dhatt2016-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | Current order: IB1 batch, timestamp writes, SRM=NULL, CP_YIELD_ENABLE, CP_CONTEXT_SWITCH_YIELD Correct order: IB1 batch, SRM=NULL, CP_YIELD_ENABLE, timestamp writes, CP_CONTEXT_SWITCH_YIELD Reason: if preemption is initiated after the last checkpoint but before SET_RENDER_MODE == NULL is executed, all of the PM4s starting at the preamble of the check point will be replayed up to the SRM == NULL, including an attempt to re-timestamp/ re-retire the last batch of IBs. If what was intended here was to make sure that the IB batch would be retired once then the SET_RENDER_MODE == NULL and CP_YIELD_ENABLE should be placed immediately after IB_PFE packets and before the time stamping PM4 packets in the ring buffer. CRs-Fixed: 990078 Change-Id: I04a1a44f12dd3a09c50b4fe39e14a2bd636b24de Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
* msm: kgsl: Attach mem_entry once we have valid GPU addressRajesh Kemisetti2016-03-25
| | | | | | | | | | | | | kgsl_mem_entry_attach_process() adds new entry to the mem_idr list without really having a valid GPU address. This new entry can be used by other thread with GPUADDR_IN_MEMDESC() and destroy it. Get GPU address first and then add it to the mem_idr list. Change-Id: I4d66cec754ca5315df3c9fe09644f55596c3c33c Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
* msm: kgsl: Track and pass number of active context to governorDeepak Kumar2016-03-25
| | | | | | | | | | | Track number of active context and pass it to governor along with busy stats. This allows GPU DCVS to make decision based on context count and busy stats, which helps in handling sudden workloads. Change-Id: I9b40e4917b30ee3f15f2c8e99669e090578f1289 Signed-off-by: Deepak Kumar <dkumar@codeaurora.org> Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
* msm: kgsl: Allocate guard page on demandHareesh Gundu2016-03-25
| | | | | | | | | | | Allocate guard page when the first buffer is mapped into the IOMMU. This also ensures that the guard page gets allocated if the guard page mmu feature is enabled. CRs-Fixed: 988093 Change-Id: Id97492707463a1f15a4bf1c67b9c0f03214e6283 Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
* msm: kgsl: Fix race condition during mem_entry detachRajesh Kemisetti2016-03-25
| | | | | | | | | | | | | | | kgsl_mem_entry_detach_process() makes gpuaddr to NULL and then removes the entry from mem_idr list. Sometimes this can cause kgsl_sharedmem_find() to return the same entry for a different gpuaddr/thread if it satisfies GPUADDR_IN_MEMDESC(). To avoid this, first remove the entry from mem_idr list and proceed with unmap/untrack calls. Change-Id: Ib9f2bc0fdaecd394735dd61b18fdc7de57aa3748 Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
* msm: kgsl: Avoid racing against context delete while releasing contextsDeepak Kumar2016-03-25
| | | | | | | | | While releasing contexts take a reference to context inside read rcu lock to avoid racing against context deletion. This will avoid using dangling context pointer in device_release_contexts. Change-Id: I76e787f6dde5a324fec23e81829174bd28134c6c Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
* msm: kgsl: Do not switch pagetable if context is detachedHarshdeep Dhatt2016-03-25
| | | | | | | | | | This is done to avoid a race condition between a context getting detached and destroyed before the GPU has executed the pt switch commands. CRs-Fixed: 987587 Change-Id: I5c485e41a23b288f27e607b3e3ed5bf66cbad98a Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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