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Enable CPZ feature for A512 GPU on sdm660.
This is required to process secure conent by GPU.
Change-Id: Iaaedde4e56e331379be0b44b23527df0d5807f55
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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Currently we sample power stats at the expiry of
cmdbatch. In cases where cmdbatch takes a long time
to finish the job, it delays power stats sampling,
in effect it delays DCVS decision for changing the
frequency. Do a midframe power stats sampling and
feed it to DCVS if it is enabled.
Change-Id: I547d792b38649aa1d60525b0dc335791b37989fd
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
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Allow driver to get pages from the system incase mempool configuration
is not defined from the device tree. This will fix kgsl driver probe
failure for without gpu mempool configuration devices.
Change-Id: I3142a5d2e13ed40f643c91594fd868c37620ce54
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
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kgsl_ioctl_gpu_sparse_command() is added to for user to
specify list of binds/unbinds for a memory entry
and syncpoints they depend on. If user specifies both
create a sync object for syncpoints and bind object for
binds/unbinds and add them to dispatcher draw queue. Sync
object should be inserted before the bind object in the
draw queue. Once the bind object reaches the head of
draw queue the corresponding binds/unbinds are performed.
kgsl_ioctl_gpu_sparse_command() only accepts commands from
context created with flag KGSL_CONTEXT_SPARSE, commands
from all other context types will return an error.
Change-Id: Ib0a2361f854ae01d0d8090cdd48cfa96308daf93
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
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Add the support for trace ID for coresight. This ID is
will be defined in the respective device tree file.
Change-Id: I78ba05ed05b54fdc0f4d4f55c468f90f39c821f1
Signed-off-by: Lokesh Batra <lbatra@codeaurora.org>
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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Triggering Crash Dumper might actually change the values of
few GPU registers including VBIF. Hence dump those registers
ahead and skip them from the list which goes to crash dumper.
Change-Id: I37a53983a65bd8abfefa780053819de71df7f24f
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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By default A5xx GPUs use CP crash dumper to get GPU
snapshot in case of any fault.
At times it is required to disable crash dumper
in case of any abnormalities, add support to do so.
Change-Id: Iea6497778bcd711e769f0e509103bd3bd0fd8574
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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When creating a context allocate an ID but don't populate the slot
with the context pointer until we are done setup up the rest of the
process. This avoids a race if somebody tries to free the same
identifier before the create operation is complete.
Change-Id: Ic0dedbadca5b4cc4ce567afad48a33078b549439
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Dumpeti Sathish Kumar <sathyanov14@codeaurora.org>
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Check MMU type for below operations to make NOMMU functional:
- adreno_iommu_set_pt_ctx() tries to set pagetable during context
switch without really checking on type of MMU.
- skip tracking of gpuaddr in case of NoMMU during
kgsl_mem_entry_track_gpuaddr().
- In case of nommu the function kgsl_allocate_global() should
always allocate contiguous memory from CMA.
Change-Id: I8cb59e1475376167c7a8a60c54df0939597f5083
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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Ringbuffer timer should always be reset whenever we finish
preempting to that ringbuffer. Currently, there is a case where
wptr in the hardware and the kgsl are identical and thus
the timer isn't reset. Reset the timer regardless if they are
identical or not.
There is one special case when we shouldn't reset the timer.
This happens when we try to figure out next ringbuffer to preempt
but the next ringbuffer is the same one as current. In that case,
if nothing new got submitted to this ringbuffer, then don't reset
the timer.
Change-Id: I6b5aea46f1769021b39ba6e135bef780719a92e7
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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This reverts commit 691ddba4ee20 ("msm: kgsl: Enable limits
management on A540v2"). The GPU does not hit the voltage
limits at 670mhz so there isn't any need to enable
limit management.
CRs-Fixed: 1056661
Change-Id: If225dc4ec2c2e3eb8996f49f4fdf6acd31a50680
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
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Add new GPU ID, corresponding VBIF and
initial settings for A512.
Change-Id: Id30415ce0ea73012125ced35771b9aae9f941c22
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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If one is mapping anonyomous user memory in the GPU with SVM enabled
we want to try to accommodate that request if possible. The memory
address was being set up correctly in the memory descriptor but
the GPU address was getting tripped up when getting mapped in the
process. This is because the memory should be treated like SVM
memory so it needs to be registered in the memory tree and the
rest of the path needs to accept the address.
Change-Id: Ic0dedbad661143977a226d50263c26b5af579ce3
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
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memdesc->pagetable is supposed to help ensure that memory gets
unmapped before it is freed, but the pagetable member is being
populated at create time not when the buffer gets mapped. This
forces the developer to ensure that the same pagetable is
used for both the create and map step. Instead, assign the
pagetable member when it is first used (to get a GPU address)
and put it away when the GPU address is released.
Change-Id: Ic0dedbad372fd9029b932dd99633a650049751ed
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
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After wakeup from power collapse restore ISENSE registers from
internal buffer.
CRs-Fixed: 1075694
Change-Id: I9cf2f94892bdeb83fab0068902419b1603520364
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
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Add a NULL check for pt pointer variable in
a4xx_submit_preempt_token(), to avoid NULL
pointer dereference.
CRs-Fixed: 1083045
Change-Id: I6f8abe55f3d99d2ff46e4bb2a8cd11a067be7508
Signed-off-by: Dumpeti Sathish Kumar <sathyanov14@codeaurora.org>
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There could be possibility of integer overflow on adding
size with maximum offset bytes and result in a value smaller
than maximum memdesc size.
CRs-Fixed: 1082914
Change-Id: Ie66b3a8ca2ca418a4a52f65987266b8d580c121f
Signed-off-by: Sudeep Yedalapure <sudeepy@codeaurora.org>
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Add more information to the debugfs kgsl/proc/<pid>/mem which
will allow memtrack to correctly assign allocated ion buffer
memory to a process. The additional columns show the number of
kgsl_mem_entries which have a usage of egl_image (or) egl_surface.
When attaching a dma_buf to kgsl, use the dma_buf_attachment's
(void*)priv to point back to the kgsl_mem_entry. This makes it
possible to iterate through all attachments on a dma_buf and
gather statistics from each kgsl_mem_entry associated with the
dma_buf.
CRs-Fixed: 1073673
Change-Id: I1ef3bd0da3f74fa41074021699b2226c48bde9c3
Signed-off-by: Santhosh Punugu <spunug@codeaurora.org>
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Device type memory mapping enforces certain restrictions
on unaligned address accesses.
If userspace in an IOCTL incorrectly sends an unaligned
address at the boundary of device type memory mapping to
kernel, there will be a fault because kernel goes ahead
and reads the device type memory with unaligned access.
To overcome such issues, change device-type memory mapping
to Normal-noncached wherever it is possible.
Change-Id: I34e8268a0defe335ca9d360e910655c2891cd572
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
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A process may have many kgsl mem entries in use. Outputing all of them
as a single debugfs seq_file record takes twice as long as necessary
because seq_file must retry higher order page allocations for the output
buffer until it is large enough to hold all mem entries.
Additionally, process_mem_print() currently holds the spinlock
private->mem_lock during this process. This is too much time to
disable interrupts, and prevents locking mutex in print_mem_entry.
Change the kgsl_mem_entry debugfs functions to output one entry at a
time. Then the seq_file only need to kmalloc one page regardless of
the number of kgsl_mem_entries.
CRs-Fixed: 1073673
Change-Id: I2907495b65e62d95a892741aed008048bb86aced
Signed-off-by: Santhosh Punugu <spunug@codeaurora.org>
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Add a quirk to set LMLOADKILLDIS bit in A5XX_VPC_DBG_ECO_CNTL
and clear LMLOADKILLDIS bit in A5XX_HLSQ_DBG_ECO_CNTL registers.
This is done to avoid a VPC corner case with local memory(LM)
which leads to corrupt internal state on A540 and its derivatives.
CRs-Fixed: 1036444
Change-Id: I31008433f19924bb35560d3e35fe0665e73751d5
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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Enable memory retention for gpucc_gfx3d.
CRs-Fixed: 1083111
Change-Id: Ic695e5320d6acbe8d16e23851f752a7fa673f0da
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
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When programming perfcounter via gpu commands, we may encounter
-EAGAIN because of cancelling rb events either due to soft reset
or when powering down the device. Ignore this error because we
have already set up the perfcounter in software and it will be
programmed in hardware by adreno_perfcounter_restore when gpu
comes back up.
CRs-Fixed: 1024199
Change-Id: I5dc3561d15fa50ac58646f96559cfd262020dda9
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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The current value is leading to spurious fault interrupts
from the GPU. Increase the threshold 4 times so that hardware
fault detection won't be triggered as quickly.
CRs-Fixed: 1073836
Change-Id: Ie780cec4de818c94a407461580f9d80de7e4ec84
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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Readl/writel macros expect void pointers so declare the
addresses as void and not unsigned int.
Change-Id: I67cf15fa918832ebab56cb999265d02880682c5e
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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During snapshot, dump 1024 bytes instead of 64 on a540.
Change-Id: I34ed23bdbbaedc73cae777a7df8a7c04efb3c0a8
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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A306a GPU have the two different frequency plans. The frequency
plan needs to be loaded dynamically based on the speed bin
information. Add support for A306a gpu to read the speed bin
information and choose frequency plan dynamically.
Change-Id: Iba53d4381d61f23ce1195a147493b0d292cd3723
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
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Add limits management to A540v2 GPU feature set.
CRs-Fixed: 1075694
Change-Id: Ib2680fb97fed1d297c9a96c95edb08dea620495b
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
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