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2019-08-04gpu: ipu-v3: ipu-ic: Fix saturation bit offset in TPMEMSteve Longerbeam
commit 3d1f62c686acdedf5ed9642b763f3808d6a47d1e upstream. The saturation bit was being set at bit 9 in the second 32-bit word of the TPMEM CSC. This isn't correct, the saturation bit is bit 42, which is bit 10 of the second word. Fixes: 1aa8ea0d2bd5d ("gpu: ipu-v3: Add Image Converter unit") Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-16gpu: ipu-v3: dp: fix CSC handlingLucas Stach
[ Upstream commit d4fad0a426c6e26f48c9a7cdd21a7fe9c198d645 ] Initialize the flow input colorspaces to unknown and reset to that value when the channel gets disabled. This avoids the state getting mixed up with a previous mode. Also keep the CSC settings for the background flow intact when disabling the foreground flow. Root-caused-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-03-23gpu: ipu-v3: Fix CSI offsets for imx53Steve Longerbeam
[ Upstream commit bb867d219fda7fbaabea3314702474c4eac2b91d ] The CSI offsets are wrong for both CSI0 and CSI1. They are at physical address 0x1e030000 and 0x1e038000 respectively. Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit") Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-03-23gpu: ipu-v3: Fix i.MX51 CSI control registers offsetAlexander Shiyan
[ Upstream commit 2c0408dd0d8906b26fe8023889af7adf5e68b2c2 ] The CSI0/CSI1 registers offset is at +0xe030000/+0xe038000 relative to the control module registers on IPUv3EX. This patch fixes wrong values for i.MX51 CSI0/CSI1. Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit") Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2016-08-26Revert "Merge remote-tracking branch 'msm-4.4/tmp-510d0a3f' into msm-4.4"Trilok Soni
This reverts commit 9d6fd2c3e9fcfb ("Merge remote-tracking branch 'msm-4.4/tmp-510d0a3f' into msm-4.4"), because it breaks the dump parsing tools due to kernel can be loaded anywhere in the memory now and not fixed at linear mapping. Change-Id: Id416f0a249d803442847d09ac47781147b0d0ee6 Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
2016-06-07drm/imx: Match imx-ipuv3-crtc components using device node in platform dataPhilipp Zabel
commit 310944d148e3600dcff8b346bee7fa01d34903b1 upstream. The component master driver imx-drm-core matches component devices using their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during probing. Before that, of_node was set and caused an of: modalias to be used instead of the platform: modalias, which broke module autoloading. On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc probe function calls component_add, component matching in imx-drm-core fails. While dev->of_node will be set once the next component tries to bring up the component master, imx-drm-core component binding will never succeed if one of the crtc devices is probed last. Add of_node to the component platform data and match against the pdata->of_node instead of dev->of_node in imx-drm-core to work around this problem. Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Chris Ruehl <chris.ruehl@gtsys.com.hk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-11gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloadingPhilipp Zabel
commit 503fe87bd0a8346ba9d8b7f49115dcd0a4185226 upstream. If of_node is set before calling platform_device_add, the driver core will try to use of: modalias matching, which fails because the device tree nodes don't have a compatible property set. This patch fixes imx-ipuv3-crtc module autoloading by setting the of_node property only after the platform modalias is set. Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports") Reported-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-By: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-03-16gpu: ipu-v3: Do not bail out on missing optional port nodesPhilipp Zabel
commit 17e0521750399205f432966e602e125294879cdd upstream. The port nodes are documented as optional, treat them accordingly. Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Chris Healy <Chris.Healy@zii.aero> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports") Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-24gpu: ipu-v3: Assign of_node of child platform devices to corresponding portsPhilipp Zabel
The crtc child device driver shouldn't have to modify the of_node of its platform device in the probe function. Instead, let the IPU core driver set the of_node when the platform device is created. Also reorder the client_reg array so the elements are in port id order (CSIs first, then DIs). Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-11-24gpu: ipu-v3: Remove reg_offset fieldPhilipp Zabel
This is not used, so remove it. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: fix div_ratio typeAndrzej Hajda
The variable can be negative. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors.Philippe De Muyter
Enable the MEDIA_BUS_FMT_Y8_1X8 format. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for ARGB4444 16-bit color formatLucas Stach
This patch adds support for the ARGB4444 color format. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formatsPhilipp Zabel
This patch adds support for the RGBA8888, RGBX8888, BGRA8888, and BGRX8888 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formatsPhilipp Zabel
This patch adds support for ARGB1555, ABGR1555, RGBA5551, and BGRA5551 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to falseFabio Estevam
Bool initializations should use true and false. Bool tests don't need comparisons. Based on contributions from Joe Perches, Rusty Russell and Bruce W Allan. The semantic patch that makes this change is available in scripts/coccinelle/misc/boolinit.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-06gpu: imx: fix support for interlaced modesRussell King
The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-10-06gpu: imx: simplify sync polarity settingRussell King
Use a function to convert the sync pin to a bit mask for the DI_GENERAL register, and move this out of the interlace/non-interlace path to the common path. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-09-16gpu/drm: Kill off set_irq_flags usageRob Herring
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-07-16dmaengine: ipu: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. This is also a preparation for the removal of the 'irq' argument from interrupt flow handlers. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: dmaengine@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-07-10GPU: ipu: fix lockup caused by pending chained interruptsRussell King
Even with the oops fixed by a previous patch, the system still fails to kexec, due to a stuck chained interrupt locking the system. We must disable the child interrupts prior to setting up the irq chip to ensure we don't get stuck here. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-06-18GPU: ipu: Fix race in installing IPU chained IRQ handlerRussell King
The IPU code was installing its chained interrupt handler (which enables the interrupt) before it was setting its data, which provokes an oops on kexec. Fix this by converting to irq_set_chained_handler_and_data(). [drm] Initialized drm 1.1.0 20060810 imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available Unable to handle kernel NULL pointer dereference at virtual address 00000070 pgd = c0004000 [00000070] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.0-rc6+ #1693 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) task: d74c0000 ti: d74aa000 task.ti: d74aa000 PC is at ipu_irq_handle+0x28/0xd8 LR is at ipu_irq_handler+0x6c/0xc0 pc : [<c03c56d8>] lr : [<c03c58a4>] psr: 200001d3 sp : d74abbd0 ip : d74abc00 fp : d74abbfc r10: 000001e0 r9 : c0085154 r8 : 00000009 r7 : 00000000 r6 : 00000000 r5 : d74abc04 r4 : c0a6b6a8 r3 : 00000000 r2 : 00000009 r1 : d74abc04 r0 : 00000000 Flags: nzCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 10004059 DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xd74aa210) Stack: (0xd74abbd0 to 0xd74ac000) Backtrace: [<c03c56b0>] (ipu_irq_handle) from [<c03c58a4>] (ipu_irq_handler+0x6c/0xc0) [<c03c5838>] (ipu_irq_handler) from [<c0080154>] (generic_handle_irq+0x28/0x38) [<c008012c>] (generic_handle_irq) from [<c0080288>] (__handle_domain_irq+0x5c/0xb8) [<c008022c>] (__handle_domain_irq) from [<c0009428>] (gic_handle_irq+0x28/0x68) [<c0009400>] (gic_handle_irq) from [<c0013dc4>] (__irq_svc+0x44/0x5c) [<c07638fc>] (_raw_spin_unlock_irqrestore) from [<c00803bc>] (__irq_put_desc_unlock+0x1c/0x40) [<c00803a0>] (__irq_put_desc_unlock) from [<c00841f4>] (__irq_set_handler+0x54/0x5c) [<c00841a0>] (__irq_set_handler) from [<c03c5f48>] (ipu_probe+0x29c/0x708) [<c03c5cac>] (ipu_probe) from [<c03d3848>] (platform_drv_probe+0x50/0xac) [<c03d37f8>] (platform_drv_probe) from [<c03d1f3c>] (driver_probe_device+0x1d4/0x278) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4z02-0002SI-Br@rmk-PC.arm.linux.org.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-03-31gpu: ipu-v3: turns out the IPU can only downsize 4:1Philipp Zabel
The value for downsizing 8:1 is marked as reserved in the technical reference manual and the documentation states downsizing capability up to 4:1 only. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31gpu: ipu-v3: limit pixel clock divider to 8-bitsPhilipp Zabel
The DI pixel clock divider bit field is only 8 bits wide for the integer part, so limit the divider to the 1...255 interval before deciding whether the internal clock can be used and before writing to the register. Reported-by: Felix Mellmann <felix.mellmann@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31drm/imx: consolidate bus format variable namesPhilipp Zabel
This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt, and pixfmt variables to a common name "bus_format" wherever they describe the pixel format on the bus between display controller and encoder hardware. At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-03-31drm/imx: switch to use media bus formatsPhilipp Zabel
imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to describe the pixel format of frame buffers in memory, to describe the pixel format on the bus between the display controller and the encoder hardware. Now that MEDIA_BUS_FMT constants are available to drm drivers, use those instead. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-02-23gpu: ipu-v3: do not divide by zero if the pixel clock is too largePhilipp Zabel
Even if an unsupported mode with a pixel clock larger than two times the 264 MHz IPU HSP clock is set, don't divide by zero. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-27gpu: ipu-v3: Fix IC control register offsetPhilipp Zabel
The IC register offset is at +0x20000 relative to the control module registers on all IPUv3 versions. This patch fixes wrong values for i.MX51 and i.MX53. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-27gpu: ipu-v3: wait_for_completion_timeout does not return negative statusNicholas Mc Guire
This fixes up the return value handling and the return type. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calcSteve Longerbeam
We can use the DIV_ROUND_CLOSEST() macro when calculating the DI clock divider, rounded to nearest int. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfgSteve Longerbeam
This patch changes struct ipu_di_signal_cfg to use struct videomode to define video timings and flags. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: remove some non-functional codeSteve Longerbeam
h_total and v_total were calculated in ipu_di_init_sync_panel() but never actually used. Remove. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: Add ipu_di_adjust_videomode()Jiada Wang
On some monitors, high resolution modes are not working, exhibiting pixel column truncation problems (for example, 1280x1024 displays as 1280x1022). The function ipu_di_adjust_videomode() aims to fix these issues by adjusting a passed videomode to IPU restrictions. The function can be called from the drm_crtc_helper_funcs->mode_fixup() methods. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Deepak Das <deepak_das@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-06gpu: ipu-v3: Implement use counter for ipu_dc_enable(), ipu_dc_disable()Steve Longerbeam
The functions ipu_dc_enable() and ipu_dc_disable() enable/disable the DC globally in the IPU_CONF register, but the DC is used by multiple clients on different DC channels. So make sure to only disable/enable the DC globally based on a use counter. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-11-14[media] gpu: ipu-v3: Make use of media_bus_format enumBoris BREZILLON
In order to have subsytem agnostic media bus format definitions we've moved media bus definition to include/uapi/linux/media-bus-format.h and prefixed enum values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT. Reference new definitions in the ipu-v3 driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2014-09-24gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE KconfigFabio Estevam
SOC_IMX6SL does not have the IPU block, so remove it from the Kconfig entry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_dump()Steve Longerbeam
Adds ipu_dump() which dumps IPU register state to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_dump()Steve Longerbeam
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add more planar formats supportSteve Longerbeam
Adds support for the following planar and partial-planar formats: YUV422 NV12 NV16 Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> Signed-off-by: Mohsin Kazmi <mohsin_kazmi@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Unified base offset and Y plane offset into a single variable, moved all ipu_cpmem_set_buffer calls to a single location. Removed NV21 and NV61 for now. The IDMAC doesn't understand U/V order for chroma interleaved formats, so we'd need to work around this by implenting U/V switching via the CSC unit. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()Steve Longerbeam
Add a second buffer physaddr to struct ipu_image, for double-buffering support. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()Steve Longerbeam
Adds ipu_cpmem_set_rotation(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()Steve Longerbeam
Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel will use to transfer data onto AXI bus. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()Steve Longerbeam
Adds ipu_cpmem_set_block_mode(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_lock_enable()Steve Longerbeam
Adds ipu_idmac_lock_enable(), which enables or disables channel burst locking. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_enable_watermark()Steve Longerbeam
Adds the function ipu_idmac_enable_watermark(), which enables or disables watermarking in the IDMAC channel. Enabling watermarking can increase a channel's AXI bus arbitration priority. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_stride_to_bytes()Steve Longerbeam
Adds ipu_stride_to_bytes(), which converts a pixel stride to bytes, suitable for passing to cpmem. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer()Steve Longerbeam
Adds __ipu_idmac_reset_current_buffer() that resets a channel's internal current buffer pointer so that transfers start from buffer 0 on the next channel enable. This operation is required for channel linking to work correctly, for instance video capture pipelines that carry out image rotations will fail after the first streaming unless this function is called for each channel before re-enabling the channels. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_clear_buffer()Steve Longerbeam
Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer ready status in a channel. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()Steve Longerbeam
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in the given channel is set ready (owned by IPU), or false if not ready (owned by CPU core). Support has been added for third buffer, there is no support yet for triple-buffering in idmac channels, but this function checks buffer-ready for third buffer in case this support is added later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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