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* Merge branch 'drm-next-3.16' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2014-06-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Some additional patches for radeon for 3.16 now that -fixes has been merged. - Gart fix for all asics r6xx+ - Add some VM tuning parameters - misc fixes * 'drm-next-3.16' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: Move fb update from radeon_flip_work_func to radeon_crtc_page_flip drm/radeon/dpm: powertune updates for SI Revert "drm/radeon: use variable UVD clocks" drm/radeon: add query for number of active CUs drm/radeon: add debugfs file to trigger GPU reset drm/radeon: make vm_block_size a module parameter drm/radeon: make VM size a module parameter (v2) drm/radeon: rename alt_domain to allowed_domains drm/radeon: use the SDMA on for buffer moves on CIK again drm/radeon: remove range check from *_gart_set_page drm/radeon: stop poisoning the GART TLB drm/radeon: hdmi deep color modes must obey clock limit of sink. drm/edid: Store all supported hdmi deep color modes in drm_display_info drm/radeon: add missing vce init case for hawaii drm/radeon: use lower_32_bits where appropriate
| * drm/radeon: Move fb update from radeon_flip_work_func to radeon_crtc_page_flipMichel Dänzer2014-06-09
| | | | | | | | | | | | | | | | Fixes WARN()s from the DRM core since the page flip rework. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=77521 Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: powertune updates for SIAlex Deucher2014-06-09
| | | | | | | | | | | | Updated powertune settings for certain SI asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * Revert "drm/radeon: use variable UVD clocks"Alex Deucher2014-06-09
| | | | | | | | | | | | | | | | | | | | | | This caused reduced performance for some users with advanced post processing enabled. We need a better method to pick the UVD state based on the amount of post processing required or tune the advanced post processing to fit within the lower power state envelope. This reverts commit 14a9579ddbf15dd1992a9481a4ec80b0b91656d5. Cc: "3.15" <stable@vger.kernel.org>
| * drm/radeon: add query for number of active CUsAlex Deucher2014-06-09
| | | | | | | | | | | | | | Query to find out how many compute units on a GPU. Useful for OpenCL usermode drivers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add debugfs file to trigger GPU resetChristian König2014-06-09
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: make vm_block_size a module parameterChristian König2014-06-09
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: make VM size a module parameter (v2)Christian König2014-06-09
| | | | | | | | | | | | | | v2: agd5f: simplify patch Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: rename alt_domain to allowed_domainsChristian König2014-06-09
| | | | | | | | | | | | | | | | | | | | And also domain to prefered_domains. That matches better what those values represent. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: Marek Olšák <maraeo@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: use the SDMA on for buffer moves on CIK againChristian König2014-06-09
| | | | | | | | | | | | | | The underlying reason for the crashes seems to be fixed now. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: remove range check from *_gart_set_pageChristian König2014-06-09
| | | | | | | | | | | | | | | | | | We never check the return value anyway and if the index isn't valid would crash way before calling the functions. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: stop poisoning the GART TLBChristian König2014-06-09
| | | | | | | | | | | | | | | | | | | | | | | | | | When we set the valid bit on invalid GART entries they are loaded into the TLB when an adjacent entry is loaded. This poisons the TLB with invalid entries which are sometimes not correctly removed on TLB flush. For stable inclusion the patch probably needs to be modified a bit. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: hdmi deep color modes must obey clock limit of sink.Mario Kleiner2014-06-09
| | | | | | | | | | | | | | | | | | | | | | | | Make sure that a hdmi deep color mode can't exceed the max tmds clock limit of a hdmi sink if such a limit is defined by edid. If requested deep color bpc would exceed the limit given the mode to be set, try to degrade gracefully to lower supported deep color bpc or to standard 8 bpc if needed. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add missing vce init case for hawaiiAlex Deucher2014-06-09
| | | | | | | | | | | | | | Hawaii has the same version of VCE as other CIK parts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: use lower_32_bits where appropriateChristian König2014-06-09
| | | | | | | | | | | | | | | | | | Replace occurrences of "v & 0xffffffff" with lower_32_bits(v) when it's next to an upper_32_bits(v). Also remove unnecessary "upper_32_bits(v) & 0xffffffff" code snippets. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm: Remove DRM_ARRAY_SIZE() for ARRAY_SIZE()Damien Lespiau2014-06-10
| | | | | | | | | | | | | | | | | | | | | | | | I cannot see a need to provide a DRM_ version of ARRAY_SIZE(), only used in a few places. I suspect its usage has been spread by copy & paste rather than anything else. Let's just remove it for plain ARRAY_SIZE(). Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm: Remove spurious ';'Damien Lespiau2014-06-10
|/ | | | | | | | One small step after another, the never-ending crusade towards better code continues. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-nextDave Airlie2014-06-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | Merge drm-fixes into drm-next. Both i915 and radeon need this done for later patches. Conflicts: drivers/gpu/drm/drm_crtc_helper.c drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/i915/i915_gem.c drivers/gpu/drm/i915/i915_gem_execbuffer.c drivers/gpu/drm/i915/i915_gem_gtt.c
| * drm/radeon: use the CP DMA on CIKChristian König2014-06-02
| | | | | | | | | | | | | | The SDMA sometimes doesn't seem to work reliable. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: sync page table updatesChristian König2014-06-02
| | | | | | | | | | | | Only necessary if we don't use the same engine for buffer moves and table updates. Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: fix vm buffer size estimationChristian König2014-06-02
| | | | | | | | | | | | Only relevant if we got VM_BLOCK_SIZE>9, but better save than sorry. Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon/dpm: resume fixes for some systemsAlex Deucher2014-06-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting the power state prior to restoring the display hardware leads to blank screens on some systems. Drop the power state set from dpm resume. The power state will get set as part of the mode set sequence. Also add an explicit power state set after mode set resume to cover PX and headless systems. bug: https://bugzilla.kernel.org/show_bug.cgi?id=76761 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon: Resume fbcon lastDaniel Vetter2014-05-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So a few people complained that commit 177cf92de4aa97ec1435987e91696ed8b5023130 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Tue Apr 1 22:14:59 2014 +0200 drm/crtc-helpers: fix dpms on logic which was merged into 3.15-rc1, broke resume on radeons. Strangely git bisect lead everyone to commit 25f397a429dfa43f22c278d0119a60a343aa568f Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Fri Jul 19 18:57:11 2013 +0200 drm/crtc-helper: explicit DPMS on after modeset which was merged long ago and actually part of 3.14. Digging deeper I've noticed (again) that the call to drm_helper_resume_force_mode in the radeon resume handlers was a no-op previously because everything gets shut down on suspend. radeon does this with explicit calls to drm_helper_connector_dpms with DPMS_OFF. But with 177c we now force the dpms state to ON, so suddenly resume_force_mode actually forced the crtcs back on. This is the intention of the change after all, the problem is that radeon resumes the fbdev console layer _before_ restoring the display, through calling fb_set_suspend. And fbcon does an immediate ->set_par, which in turn causes the same forced mode restore to happen. Two concurrent modeset operations didn't lead to happiness. Fix this by delaying the fbcon resume until the end of the readeon resum functions. v2: Fix up a bit of the spelling fail. References: https://lkml.org/lkml/2014/5/29/1043 References: https://lkml.org/lkml/2014/5/2/388 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=74751 Tested-by: Ken Moffat <zarniwhoop@ntlworld.com> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Ken Moffat <zarniwhoop@ntlworld.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
| * drm/radeon: only allocate necessary size for vm bo listChristian König2014-05-30
| | | | | | | | | | | | No need to always allocate the theoretical maximum here. Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: don't allow RADEON_GEM_DOMAIN_CPU for command submissionMarek Olšák2014-05-30
| | | | | | | | | | | | | | | | It hangs the hardware. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: avoid crash if VM command submission isn't availableChristian König2014-05-30
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> CC: stable@vger.kernel.org
| * drm/radeon: lower the ref * post PLL maximum once moreChristian König2014-05-30
| | | | | | | | | | | | | | | | Let's be conservative and use 100 here until we find something better. Bugs: https://bugzilla.kernel.org/show_bug.cgi?id=75241 Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon/pm: don't allow debugfs/sysfs access when PX card is off (v2)Alex Deucher2014-05-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the PX card is off don't try and access it. Avoid hw access to the card while it's off (e.g., reading back invalid temperature). v2: be less strict bug: https://bugzilla.kernel.org/show_bug.cgi?id=76321 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: avoid segfault on device open when accel is not working.Jérôme Glisse2014-05-20
| | | | | | | | | | | | | | | | | | | | | | | | When accel is not working on device with virtual address space radeon segfault because the ib buffer is NULL and trying to map it inside the virtual address space trigger segfault. This patch only map the ib buffer if accel is working. Cc: <stable@vger.kernel.org> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: fix typo in finding PLL paramsChristian König2014-05-20
| | | | | | | | | | | | | | Otherwise the limit is raised to high. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
| * drm/radeon: fix register typo on siAlex Deucher2014-05-20
| | | | | | | | | | | | | | | | Probably a copy paste typo. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix buffer placement under memory pressure v2Christian König2014-05-20
| | | | | | | | | | | | | | | | | | | | | | | | Some buffers (UVD/VM page tables) must be placed in VRAM, but the byte restriction for moving buffers didn't took this into account. v2: keep closer to the original code Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
| * drm/radeon: fix page directory update size estimationChristian König2014-05-20
| | | | | | | | | | | | | | | | | | Take padding into account as well. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75651 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: handle non-VGA class pci devices with ATRMAlex Deucher2014-05-20
| | | | | | | | | | | | | | | | | | | | | | | | Newer PX systems have non-VGA pci class dGPUs. Update the ATRM fetch method to handle those cases. bug: https://bugzilla.kernel.org/show_bug.cgi?id=75401 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix DCE83 check for mullinsAlex Deucher2014-05-20
| | | | | | | | | | | | | | | | Mullins is DCE83 just like Kabini. Set the proper number of endpoints on mullins. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: check VCE relocation buffer range v3Leo Liu2014-05-20
| | | | | | | | | | | | | | | | v2 (chk): fix image size storage v3 (chk): fix UV size calculation Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: also try GART for CPU accessed buffersChristian König2014-05-20
| | | | | | | | | | | | | | | | | | | | Placing them exclusively into VRAM might not work all the time. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78297 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: add Mullins VCE supportLeo Liu2014-05-06
| | | | | | | | | | | | | | | | VCE 2.0 just like the other CIK parts. Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: modesetting updates for Mullins.Samuel Li2014-05-06
| | | | | | | | | | | | | | | | Uses the same code as Kabini. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: dpm updates for KV/KBAlex Deucher2014-05-06
| | | | | | | | | | | | | | | | | | | | - Use vddc/sclk dep table for voltage if available - Fix UVD DPM setup - Patch voltage tables properly for non-UVD blocks - Fix DPM + UVD/VCE on Mullins Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: add Mullins dpm support.Samuel Li2014-05-06
| | | | | | | | | | | | | | | | | | Generic dpm support similar to Kabini. Mullins specific features will be worked on later. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: add Mullins UVD support.Samuel Li2014-05-06
| | | | | | | | | | | | | | | | Has same version of UVD as other CIK parts. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: update cik init for Mullins.Samuel Li2014-05-06
| | | | | | | | | | | | | | | | Also add golden registers, update firmware loading functions. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: add Mullins chip familySamuel Li2014-05-06
| | | | | | | | | | | | | | | | Mullins is a new CI-based APU. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: lower the ref * post PLL maximumChristian König2014-05-06
| | | | | | | | | | | | Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75241 Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: check that we have a clock before PLL setupChristian König2014-05-06
| | | | | | | | | | | | Partially fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75211 Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: drm/radeon: add missing radeon_semaphore_free to error pathMaarten Lankhorst2014-05-06
| | | | | | | | | | | | | | | | It would appear this bug has been copy/pasted many times without being noticed. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: Fix num_banks calculation for SIMichel Dänzer2014-05-06
| | | | | | | | | | | | | | | | | | | | | | | | | | The way the tile mode array index was calculated only makes sense for the CIK specific macrotile mode array. For SI, we need to use one of the tile mode array indices reserved for displayable surfaces. This happened to result in correct display most if not all of the time because most of the SI tiling modes use the same number of banks. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon/dp: check for errors in dpcd readsAlex Deucher2014-05-01
| | | | | | | | | | | | | | | | | | | | Check to make sure the transaction succeeded before using the register value. Fixes occasional link training problems. Noticed-by: Sergei Antonov <saproj@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: avoid high jitter with small frac divsChristian König2014-05-01
| | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com>
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