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2012-05-15dmaengine: at_hdmac: take maxburst from slave configurationNicolas Ferre
The maxburst/chunk size was taken from the private slave DMA data structure. Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst values. The ctrla field is not needed anymore in the slave private structure nor the header constants that were located in an architecture specific directory. The at91sam9g45_devices.c file that was using this platform data is also modified to remove this now useless data. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-15dmaengine: at_hdmac: remove ATC_DEFAULT_CTRLA constantNicolas Ferre
Not needed constant that was set to 0. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-15dmaengine: fix cyclic dma usageVinod Koul
for cyclic dma, dont makr the descriptor as complte. Fix the remaining users of cyclic dma which do so Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Mika Westerberg <mika.westerberg@iki.fi>
2012-05-12dma: mxs-dma: add device tree probe supportDong Aisheng
Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
2012-05-12dma: mxs-dma: make platform_device_id more genericShawn Guo
Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support other SoCs like imx6q and reform the platform_device_id for the better further dt support. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
2012-05-12dma: mxs-dma: let dma_is_apbh and apbh_is_old take parameterShawn Guo
Let macros dma_is_apbh and apbh_is_old take mxs_dma as parameter to make the code easy to read. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-12dma: mxs-dma: use global stmp_device functionalityDong Aisheng
This can get rid of the mach-dependency. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
2012-05-11dma: imx-sdma: make channel0 operations atomicRichard Zhao
device_prep_dma_cyclic may be call in audio trigger function which is atomic context, so we make it atomic too. - change channel0 lock to spinlock. - Use polling to wait for channel0 finish running. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11dmaengine: Use dma_sg_len(sg) instead of sg->lengthLars-Peter Clausen
sg->length may or may not contain the length of the dma region to transfer, depending on the architecture - dma_sg_len(sg) always will though. For the architectures which use the drivers modified by this patch it probably is the case that sg->length contains the dma transfer length. But to be consistent and future proof change them to use dma_sg_len. To quote Russel King: sg->length is meaningless to something performing DMA. In cases where sg_dma_len(sg) and sg->length are the same storage, then there's no problem. But scatterlists _can_ (and one some architectures) do split them - especially when you have an IOMMU which can allow you to combine a scatterlist into fewer entries. So, anything using sg->length for the size of a scatterlist's DMA transfer _after_ a call to dma_map_sg() is almost certainly buggy. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; expression X; @@ -sg[X].length +sg_dma_len(&sg[X]) @@ struct scatterlist *sg; @@ -sg->length +sg_dma_len(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11dmaengine: Use sg_dma_address instead of sg_physLars-Peter Clausen
dmaengine drivers should always use sg_dma_address instead of sg_phys to get the addresses for the transfer from a sg element. To quote Russel King: sg_phys(sg) of course has nothing to do with DMA addresses. It's the physical address _to the CPU_ of the memory associated with the scatterlist entry. That may, or may not have the same value for the DMA engine, particularly if IOMMUs are involved. And if these drivers are used on ARM, they must be fixed, sooner rather than later. There's patches in the works which will mean we will end up with IOMMU support in the DMA mapping later, which means everything I've said above will become reality. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; @@ -sg_phys(sg) +sg_dma_address(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11DMA: PL330: Remove duplicate header file inclusionSachin Kamat
Removes <linux/interrupt.h> file which was included twice. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11dmaengine: pl330: dont complete descriptor for cyclic dmaVinod Koul
the cookie updates completed the cyclic dma descriptor wrongly. This caused the BUG_ON to be hit as submit is called for completed descriptor Fix this by not marking the cyclic descriptor as complete Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2012-05-11dma: imx-sdma: keep the callbacks invoked in the taskletHuang Shijie
The current code keeps the callbacks invoked from interrupt context, this does not conform to the Documentation/dmaengine.txt. So add tasklet support to fix this issue. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11dmaengine: dw_dma: add Device Tree probing capabilityViresh Kumar
SPEAr platforms now support DT and so must convert all drivers to support DT. This patch adds DT probing support for Synopsys DMA controller and updates its documentation too. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-11dmaengine: dw_dmac: Add clk_{un}prepare() supportViresh Kumar
clk_{un}prepare is mandatory for platforms using common clock framework. Since this driver is used by SPEAr platform, which supports common clock framework, add clk_{un}prepare() support for it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-05-08ARM: Orion: XOR: Add support for clkAndrew Lunn
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-25dmaengine i.MX ipu: clk_prepare/unprepare clockSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25dmaengine i.MX SDMA: do not depend on grouped clocksSascha Hauer
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25dma/amba-pl08x: add support for the Nomadik variantLinus Walleij
The Nomadik PL080 variant has some extra protection bits that may be set, so we need to check these bits to see if the channels are actually available for the DMAengine to use. Cc: Russell King <linux@arm.linux.org.uk> Cc: Alim Akhtar <alim.akhtar@gmail.com> Cc: Alessandro Rubini <rubini@gnudd.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-25dmaengine/amba-pl08x : reset phychan_hold on terminate allDavide Ciminaghi
When a client calls pl08x_control with DMA_TERMINATE_ALL, it is correct to terminate and release the phy channel currently in use (if one is in use), but the phychan_hold counter must also be reset (otherwise it could get trapped in an unbalanced state). Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-25dma: pl330: fix a couple of compilation warningsOlof Johansson
Move a couple of tests and do a minor refactor to avoid: drivers/dma/pl330.c: In function 'pl330_probe': drivers/dma/pl330.c:2929:215: warning: comparison of distinct pointer types lacks a cast [enabled by default] drivers/dma/pl330.c: In function 'pl330_tasklet': drivers/dma/pl330.c:2250:8: warning: 'pch' may be used uninitialized in this function [-Wuninitialized] drivers/dma/pl330.c:2228:25: note: 'pch' was declared here drivers/dma/pl330.c:2277:130: warning: 'pch' may be used uninitialized in this function [-Wuninitialized] drivers/dma/pl330.c:2260:25: note: 'pch' was declared here Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-23dma/amba-pl08x: check for terminal count status onlyLinus Walleij
For some reason I can't figure out we're reading the PL080_INT_STATUS register instead of PL080_TC_STATUS when checking for the terminal count. The PL080_INT_STATUS is a logical OR between the error and terminal count status register and may not report what we want it to, especially if there is an error and a terminal count at the same time and the former is not lowered in time for the check in the TC register. Make sure we read what we're actually interested in. Cc: Russell King <linux@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Alim Akhtar <alim.akhtar@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-23dma/ste_dma40: fix erroneous comparisonLinus Walleij
A small fallout from Vinod's conversions to dma_transfer_direction, this small comparison was done with a dma_data_direction instead. Fix it by comparing against the correct enum. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-23dma/ste_dma40: explicitly include regulator consumer headerLinus Walleij
The patch "ARM: amba: Remove AMBA level regulator support" breaks the DMA40 driver since the <linux/amba/bus.h> header implicitly included the regulator consumer header. So include it explicitly and fix the build error. Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-23dma40: Improve the logic of stopping logical chanNarayanan G
can be directly stopped by issuing a SUSPEND_REQ on the EE bits. There is no need to suspend the physical channel and restart it. Also, the support for pre-V2 hw is discontinued. EE bits for writing: 00: disable only if AS=11 or AS=00 01: enable 10: suspend_req only if AS=01 & EE=01 or EE=11 11: round / no change for writing Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-20dmaengine: at_hdmac: remove clear-on-read in atc_dostart()Nicolas Ferre
This loop on EBCISR register was designed to clear IRQ sources before enabling a DMA channel. This register is clear-on-read so a race condition can appear if another channel is already active and has just finished its transfer. Removing this read on EBCISR is fixing the issue as there is no case where an IRQ could be pending: we already make sure that this register is drained at probe() time and during resume. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-20dma: mxs-dma: enable channel in device_issue_pending callShawn Guo
Enable channel in device_issue_pending call, so that the order between cookie assignment and channel enabling can be ensured naturally. It fixes the mxs gpmi-nand breakage which is caused by the incorrect order of cookie assigning and channel enabling. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Huang Shijie <b32955@freescale.com> Tested-by <samgandhi9@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-20dmaengine: imx-dma: dont complete descriptor for cyclic dmaVinod Koul
the cookie updates completed the cyclic dma descriptor wrongly. This caused the BUG_ON to be hit as submit is called for completed descriptor Fix this by not marking the cyclic descriptor as complete Tested-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-20dmaengine/ep93xx_dma: Implement double buffering for M2M DMA channelsRafal Prylowski
Add double buffering support for M2M DMA channels. Implement this by using EP93xx M2M DMA Buffer and Control Finite State Machines to be sure that we are not disabling the channel when it's actually operating. Signed-off-by: Rafal Prylowski <prylowski@metasoft.pl> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Ryan Mallon <rmallon@gmail.com>
2012-04-17dmaengine: Kconfig: fix Atmel at_hdmac entryNicolas Ferre
Remove SoC dependency and make it generic for every Atmel ARM AT91. That will allow to select this driver for newer chips. Keep dependency on AT91 because of the use of an header file located in include/mach directory. Modify the comment to reflect this. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-05netdma: adding alignment check for NETDMA opsDave Jiang
This is the fallout from adding memcpy alignment workaround for certain IOATDMA hardware. NetDMA will only use DMA engine that can handle byte align ops. Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2012-04-05simple_open: automatically convert to simple_open()Stephen Boyd
Many users of debugfs copy the implementation of default_open() when they want to support a custom read/write function op. This leads to a proliferation of the default_open() implementation across the entire tree. Now that the common implementation has been consolidated into libfs we can replace all the users of this function with simple_open(). This replacement was done with the following semantic patch: <smpl> @ open @ identifier open_f != simple_open; identifier i, f; @@ -int open_f(struct inode *i, struct file *f) -{ ( -if (i->i_private) -f->private_data = i->i_private; | -f->private_data = i->i_private; ) -return 0; -} @ has_open depends on open @ identifier fops; identifier open.open_f; @@ struct file_operations fops = { ... -.open = open_f, +.open = simple_open, ... }; </smpl> [akpm@linux-foundation.org: checkpatch fixes] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-04-05ioatdma: DMA copy alignment needed to address IOAT DMA silicon errataDave Jiang
Silicon errata where when RAID and legacy descriptors are mixed, the legacy (memcpy and friends) operation must have alignment of 64 bytes to avoid hanging. This effects Intel Xeon C55xx, C35xx, E5-2600. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2012-04-05ioat: ring size variables need to be 32bit to avoid overflowDave Jiang
The alloc order can be up to 16 and 1 << 16 will over flow the 16bit integer. Change the appropriate variables to 16bit to avoid overflow. Reported-by: Jim Harris <james.r.harris@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2012-03-30ARM: sa11x0: fix build errors from DMA engine API updatesRussell King
The recent merge of the sa11x0 code into mainline had silent conflicts with further development of the DMA engine API, leading to build errors and warnings: drivers/net/irda/sa1100_ir.c: In function 'sa1100_irda_dma_start': drivers/net/irda/sa1100_ir.c:151: error: too few arguments to function 'chan->device->device_prep_slave_sg' drivers/dma/sa11x0-dma.c: In function 'sa11x0_dma_probe': drivers/dma/sa11x0-dma.c:950: warning: assignment from incompatible pointer type Fix these. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-28iop-adma: Corrected array overflow in RAID6 Xscale(R) test.Don Morris
Bug: cppcheck reported overflow in array assignment (for loop walks 0 to IOP_ADMA_NUM_SRC_TEST+2, array size is IOP_ADMA_NUM_SRC_TEST). Reported as: https://bugzilla.kernel.org/show_bug.cgi?id=42677 Test code pq_src array was grown by two elements to correspond with actual usage (IOP_ADMA_NUM_SRC_TEST+2), stack consumption was kept constant by modifying the pq_dest two element array which is only used when pq_src is referenced up to IOP_ADMA_NUM_SRC_TEST elements into the address of the new last two elements of the pq_src array. This is presumed to be the original intent but would be reliant on compilers always having pq_dest contiguous with the final element of pq_src. Note: This is a re-send of a request for review from two weeks ago. Looking for review (or shootdown), adding LKML to list for a wider audience. Thanks. Updated per review comments of Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Don Morris <don.morris@hp.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2012-03-27dmaengine: imx: fix the build failure on x86_64Vinod Koul
commit 6bd081277ea0 "dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c" removed the dependency in config for the imx dma driver, whereas it should depend on ARCH_MXS Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-27mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()Huang Shijie
[1] Background : The GPMI does ECC read page operation with a DMA chain consist of three DMA Command Structures. The middle one of the chain is used to enable the BCH, and read out the NAND page. The WAIT4END(wait for command end) is a comunication signal between the GPMI and MXS-DMA. [2] The current DMA code sets the WAIT4END bit at the last one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ | | set WAIT4END here This chain works fine in the mx23/mx28. [3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should be set not only at the last DMA Command Structure, but also at the middle one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ ^ | | | | set WAIT4END here too set WAIT4END here If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state. In the next ECC write page operation, a DMA-timeout occurs. This has been catched in the MX6Q board. [4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags: --------------------------------------------------------- DMA_PREP_INTERRUPT : append a new DMA Command Structrue. DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure. --------------------------------------------------------- [5] changes to the relative drivers: <1> For mxs-mmc driver, just use the new flags, do not change any logic. <2> For gpmi-nand driver, and use the new flags to set the DMA chain, especially for ecc read page. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mxs-dma : move the mxs dma.h to a more common placeHuang Shijie
Move the header to a more common place. The mxs dma engine is not only used in mx23/mx28, but also used in mx50/mx6q. It will also be used in the future chips. Rename it to mxs-dma.h, and create a new folder include/linux/fsl/ to store the Freescale's header files. change mxs-dma driver, mxs-mmc driver, gpmi-nand driver, mxs-saif driver to the new header file. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-26dmaengine: i.MX: Fix merge of cookie branch.Javier Martin
When merging DMA cookie changes a small chunk of code was dropped. This broke imx-dma driver. This patch adds this chunk again and fixes the problem. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: i.MX: Add support for interleaved transfers.Javier Martin
i.MX2 and i.MX1 chips have the possibility to do interleaved transfers with two constraints: - Only one chunk can be used (i.e. only 2D transfers are allowed). - Only 2 interleaved configurations can be applied at the same time for all channels. Since this patch adds a new resource 'slots_2d' which is shared by all the DMA channels and to avoid disgustin locking BUGs, the 'lock' member has been moved to the global 'imxdma_engine' structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: use 'dev_dbg' and 'dev_warn' for messages.Javier Martin
There were some 'pr_crit' and 'pr_debug' messages due to the initial merge. Replace them by 'dev_dbg' and 'dev_warn' to be consistent. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove 'imx_dmav1_baseaddr' and 'dma_clk'.Javier Martin
These global variables are integrated into the dmaengine structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove unused arg of imxdma_sg_next.Javier Martin
Since this function is always used with 'desc' as first argument and 'desc->sg' as second argument, the latter is clearly redundant and can be removed. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove internal structure.Javier Martin
This structure was created to allow an smoothless merge but was meant to be removed. Remaining members 'hw_chaining' and 'watchdog' are moved to the channel structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove 'resbytes' field of 'internal' structure.Javier Martin
Use per-descriptor 'len' field to keep track of the remaining bytes instead. This goes on the direction of eventually removing the 'internal' structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove 'in_use' field of 'internal' structure.Javier Martin
It makes no sense keeping an 'in_use' flag when the multiple descriptor mechanism already prevents a new DMA transfer to be issued when another one is in course. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove sg member from internal structure.Javier Martin
This member is redundant, because it is already present in descriptor structure. Removing it will make further removing of 'internal' structure easier. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function.Javier Martin
Removing this function allows moving 'ccr_to_device' and 'ccr_from_device' from internal struct to channel struct. This repesents a step forward towards removing auxiliary 'internal' structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-26dmaengine: imx-dma: remove 'imxdma_config_channel_hw' function.Javier Martin
This function is only used once in the driver and uses some intermediary variables that are not needed anymore. For this reason it's been merged with 'imxdma_control'. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-07 02:43:18 +0000