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| * | | | | msm: mdss: fix 32-bit compilation errors in MDSS PP/interfacesPadmanabhan Komanduru2016-10-06
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add required changes to fix 32-bit compilation issues in MDSS PP and DP/HDMI interface drivers. Change-Id: I0b342c0307b257cb8c66fcae73dd94d0fb3122db Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | | | Merge "clk: qcom: Add support for RPM clocks for MSMfalcon"Linux Build Service Account2016-10-06
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| * | | | | clk: qcom: Add support for RPM clocks for MSMfalconTaniya Das2016-10-04
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RPM controlled clocks are required by clients to be able to enable/disable. Also add support for the PMIC XO clocks and QDSS clocks. Change-Id: I210432d27f433f3160db53a842e503c83fd14891 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | Merge "clk: qcom: Add support for gfx clock to ping pong PLLs"Linux Build Service Account2016-10-06
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| * | | | clk: qcom: Add support for gfx clock to ping pong PLLsTaniya Das2016-10-03
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GFX3D clock source might require to ping pong between the available PLL sources, so add support to check the current source and switch the next PLL source for different frequency. Change-Id: Iaf98e4d18fc0c3deb75ccce53e1c09cfc9dde550 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | clk: msm: clock-osm: Fix for programming the APM threshold on MSMCOBALTDeepak Katragadda2016-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock driver does not currently use the secure API to write the APM threshold value. This leads to the value being always left as 0. Fix the write. CRs-Fixed: 1074198 Change-Id: I61d8f930f7fe8c3539803a1e9b942095df0b0f86 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | clk: msm: clock-osm: Fix check to write to the LLM OVERRIDE registerDeepak Katragadda2016-10-04
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On MSMCOBALT v2, the qcom,llm-sw-overr flag is no longer needed. This causes an issue where the corresponding array in code is not filled up but the check to make the writes to the llm register still succeeds. This leads to us writing 0 to the register erroneously multiple times. Fix this check. CRs-Fixed: 1074141 Change-Id: I2dd529a78d06ac08a34546df39cb01ad4c6cb3d5 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | Merge "clk: msm: clock-gpu-cobalt: Update the graphics core clock frequency"Linux Build Service Account2016-10-03
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| * | | clk: msm: clock-gpu-cobalt: Update the graphics core clock frequencyDeepak Katragadda2016-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove support for 710 MHz as the highest possible frequency that the graphics core clock can scale to on MSMCOBALT v2. The new FMAX will be 670 MHz. CRs-Fixed: 1072272 Change-Id: I39119c9dd527dec6a9f4745c0502c83d083f4b26 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "clk: qcom: Add support to force enable/disable the RCG"Linux Build Service Account2016-10-03
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| * | | | clk: qcom: Add support to force enable/disable the RCGAmit Nischal2016-09-29
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some RCGs would be expected to be enabled/disabled using the root enable bit of the RCGR. These RCGs would have to indicate the force enable using the FORCE_ENABLE_RCGR flag. Change-Id: Ia1eaba2728d06066612739ff48f7e5e44322e96b Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | | Merge "clk: qcom: Add support to register rpm-smd clocks"Linux Build Service Account2016-09-30
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| * | | | clk: qcom: Add support to register rpm-smd clocksAmit Nischal2016-09-29
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the rpm-smd communication API to send across votes for clock enable/disable to RPM. Use the clk_hw list for the RPM clocks and also update the clock ids and clock names for RPM clocks. Change-Id: I37ae97f22b1b39d040bb78c90b1ff231bc348fe6 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | | Merge "clk: qcom: Add support for GCC clock for MSMFalcon"Linux Build Service Account2016-09-30
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| * | | | clk: qcom: Add support for GCC clock for MSMFalconTaniya Das2016-09-29
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the global clock controller found on MSMFalcon based devices. This should allow most clocks for peripherals other than multimedia clocks. Change-Id: I1ec6309f32c658177580cc0601083d32bcdfad20 Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | Merge "clk: msm: clock-mmss-cobalt: Update the video core clock frequencies"Linux Build Service Account2016-09-30
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| * | | | clk: msm: clock-mmss-cobalt: Update the video core clock frequenciesDeepak Katragadda2016-09-29
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the video core clock frequency tables on MSMCOBALT v2. CRs-Fixed: 1071940 Change-Id: I2858da0e32dfa4ea5bc14395e884aabf832fa8f6 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "clk: msm: clock: Add the non_local_control_timeout flag to ahb_clk_src"Linux Build Service Account2016-09-30
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| * | | | clk: msm: clock: Add the non_local_control_timeout flag to ahb_clk_srcDeepak Katragadda2016-09-29
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On MSMCOBALT, the ahb_clk_src needs its sources to be enabled for it to configure to a new frequency. Hence, force enable the PLL and XO sources everytime it is scaled. CRs-Fixed: 1060894 Change-Id: Ib2f5277f14b1484838439a9bb756358421737bd4 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "ARM: dts: msm: Add 2.3 GHz performance cluster support on MSMCOBALT v2"Linux Build Service Account2016-09-30
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| * | | | clk: msm: clock-osm: Support many-to-one OSM freq to CPR corner mappingDeepak Katragadda2016-09-27
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current OSM framework does not support mapping multiple OSM clock frequencies to the same CPR virtual corner. Enable this support and update the current clock DT entries accordingly. CRs-Fixed: 1070684 Change-Id: I3422848cabf221f497eb91f9aae5905e34ebdc84 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "clk: msm: Fix compilation for clock_debug_print_enabled"Linux Build Service Account2016-09-30
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| * | | | clk: msm: Fix compilation for clock_debug_print_enabledAmit Nischal2016-09-27
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In cases where we do not use the CONFIG_COMMON_CLK_MSM and clients who use clock_debug_print_enabled would fail compilation. Fix the same by adding the config check. Change-Id: Iaa878754e1d769056a621066eb8a73e1bc55d3a0 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
* | | | Merge "clk: qcom: Add support for regulator based GDSC control"Linux Build Service Account2016-09-30
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| * | | | clk: qcom: Add support for regulator based GDSC controlTaniya Das2016-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support globally distributed switch controller(GDSC) as regulator. This will enable the clients to use the regulator framework to enable/disable the GDSCs. The hw_ctrl/domain_ctrl registers which might be required to be enabled before the GDSC are modelled using syscon framework. Change-Id: I2d63105d032ab16d5555722680f4371c831823cd Signed-off-by: Taniya Das <tdas@codeaurora.org>
* | | | | clk: msm: clock-mmss-cobalt: Update FMAXes for camera clocks on MSMCOBALTDeepak Katragadda2016-09-22
| |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the FMAXes for camera clocks on MSMCOBALT v2 to match the SW frequency plan. CRs-Fixed: 1070162 Change-Id: I72af0d68ce2f7b57300966206b5861916620a79c Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "clk: msm: mdss: change DP clock rate in order of KHz"Linux Build Service Account2016-09-20
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| * | | clk: msm: mdss: change DP clock rate in order of KHzPadmanabhan Komanduru2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain frequencies of DP VCO clock are more than 4.29 GHz and are not supported by clock framework on 32 bit builds, since it exceeds the maximum value of unsigned long data type. To fix this issue, change the DP link clock frequencies in order of KHz in DP FB driver/MMSS cobalt clock driver/DP PLL driver. Change-Id: I46d9b5c57f94aa1f10df08c4430b617355a82eec Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | | Merge "clk: qcom: Add gate clocks in GCC driver for MSM8996"Linux Build Service Account2016-09-13
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| * | | | clk: qcom: Add gate clocks in GCC driver for MSM8996Odelu Kukatla2016-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add all the gate clocks which are part of msm8996 global clock controller(GCC) and would be used by clients to control these clocks using the clock controller framework. Change-Id: I16238940798ab5627c04fe050a6daf75f1d54277 Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | | | | Merge "clk: qcom: Clean up the MSM8996 Global Clock Control (GCC) driver"Linux Build Service Account2016-09-13
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| * | | | clk: qcom: Clean up the MSM8996 Global Clock Control (GCC) driverOdelu Kukatla2016-09-11
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the RPM controlled clocks and add missing clocks. Also clean up clock flags and parent info for few clocks. Change-Id: I7ae55f992be29a28617070ca7792f912592c3628 Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
* | | | Merge "clk: msm: clock: Register the mnoc_maxi_clk after the vmem_maxi_clk"Linux Build Service Account2016-09-12
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| * | | | clk: msm: clock: Register the mnoc_maxi_clk after the vmem_maxi_clkDeepak Katragadda2016-09-12
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Registering the vmem_maxi_clk after the mnoc_maxi_clk leads to it being added to the handoff list after its FSM clock. This results in the mnoc_maxi_clk being stuck ON when it's disabled as part of clock_late_init. Hence, change the order of registering these clocks. CRs-Fixed: 1065813 Change-Id: If076545f9557f1be2633f72fca5b9e8096b6501b Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | Merge "clk: msm: clock: Vote on MX rail on behalf of MM PLLs on MSMCOBALT"Linux Build Service Account2016-09-12
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| * | | | clk: msm: clock: Vote on MX rail on behalf of MM PLLs on MSMCOBALTDeepak Katragadda2016-09-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The multimedia PLLs are all in the MX domain on MSMCOBALT. Replace voting on the CX rail with voting for MX voltages from the clock driver. In addition, update the MMPLL7 FMAX table. CRs-Fixed: 1063153 Change-Id: I296d2b151753be599a1db139e36f5e1eabe76791 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | | Merge "clk: msm: clock: Update the supported frequencies for hmss_ahb_clk_src"Linux Build Service Account2016-09-12
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| * | | | | clk: msm: clock: Update the supported frequencies for hmss_ahb_clk_srcDeepak Katragadda2016-09-02
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the frequency table for the hmss_ahb_clk_src to support it running at 50MHz and 100MHz. CRs-Fixed: 1063082 Change-Id: Iab131f0e40f0796a47d76d8db7c31748e30b8366 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | | Merge "clk: msm: gcc-cobalt: Add support for gcc_aggre1_ufs_axi_hw_ctl_clk"Linux Build Service Account2016-09-12
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| * | | | clk: msm: gcc-cobalt: Add support for gcc_aggre1_ufs_axi_hw_ctl_clkDevesh Jhunjhunwala2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for controlling the hw_ctl bit of the gcc_aggre1_ufs_axi_clk CBCR. Change-Id: I856f2c76c3149f3704c47e6f8b0019805a1a0cd4 Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
* | | | | Merge "clk: msm: clock-osm: update register initialization for msmcobalt v2"Linux Build Service Account2016-09-09
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| * | | | | clk: msm: clock-osm: update register initialization for msmcobalt v2Osvaldo Banuelos2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support initializing different registers for sequencer operation based upon the msmcobalt chip revision. Update the boost and droop FSM timers to match the latest hardware guidelines. CRs-Fixed: 1064242 Change-Id: I7e670e6cf1583e5cd97add65106d9964509f2686 Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
* | | | | | Merge "clk: msm: clock-osm: Add measurement support for CPU clocks"Linux Build Service Account2016-09-09
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| * | | | | | clk: msm: clock-osm: Add measurement support for CPU clocksDeepak Katragadda2016-09-07
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to measure the perf and power cluster clocks via the debug mux on MSMCOBALT. CRs-Fixed: 1059153 Change-Id: I1682481dfe22deef300ea9bd1db558ae634c9129 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
* | | | | | Merge "ARM: dts: msm: define perf cluster speed-bin 1 OSM LUT for msmcobalt"Linux Build Service Account2016-09-08
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| * | | | | clk: msm: osm: add support for speed-bin fusesOsvaldo Banuelos2016-09-01
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for reading a speed-bin fuse for each cluster. This allows for the selection of different OSM look-up tables and thus different frequency configurations based upon device fused values. CRs-Fixed: 1057115 Change-Id: I9a864a2abb655e26fff5982b592b4f3c5dbfca24 Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
* | | | | Merge "clk: msm: Select appropriate clock flags for 32-bit"Linux Build Service Account2016-09-07
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| * | | | clk: msm: Select appropriate clock flags for 32-bitSrinivas Ramana2016-09-01
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Select COMMON_CLK_MSM for msmfalcon when building for 32-bit. 2. Select RATIONAL when COMMON_CLK_MSM is selected as it's using an api from rational library. Change-Id: I5b8fa962718a5ae44dfd18a13285715580ee0dbc Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
* | | | Merge "clk: msm: Add support for block reset clocks for msmcobalt"Linux Build Service Account2016-09-02
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| * | | clk: msm: Add support for block reset clocks for msmcobaltTaniya Das2016-08-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the block reset clocks which will be used by clients to assert/deassert these clocks using the reset controller framework. Change-Id: I19f4f6e764ffde26ecf3b7cce3fb53a9bf2cc91a Signed-off-by: Taniya Das <tdas@codeaurora.org>
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