| Commit message (Collapse) | Author | Age |
| ... | |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|/ / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Enable memory latency monitor and governors to vote for higher DDR
frequency on detecting latency bound workloads.
Change-Id: I4a3f415263b94d4eab16de05bbb9843b7bb04113
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | |/ / / / / / / / / / / / / / / / / / / / /
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Add the QDSS STM property to the device tree so
that data can be logged from the GPU to the debug
bus when available.
CRs-Fixed: 1031648
Change-Id: I754c85a2ed02d0b1e40fd1e27b10ff84c463ac83
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | |/ / / / / / / / / / / / / / / / / / / / /
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Enable irq-helper on msmcobalt to export apis for user space.
CRs-Fixed: 1051104
Change-Id: I7a623463a142a4db1db7247cf7c5dfeb5b99283c
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|_|/ / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Update TLMM base address to match new address.
Change-Id: Ie0c46cbbcbc3edabd5e0f867b4393a27e55db9f5
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|_|_|/ / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Hardware characterization has shown that some parts require
higher voltages in order to operate consistently. Increase
the ceiling voltage for all corners so that they are able to
operate at higher voltages. This applies to all CPR revisions
except 0.
Change-Id: Ie9d4e825e5c6040036642cdaf22d1f67b6129685
CRs-Fixed: 1050071
Signed-off-by: David Collins <collinsd@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |/ / / / / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Enables configfs supported NCM function driver
Change-Id: Ic23796c5a1388c41d533ca0f4fad04d01fe9e965
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | | |
Enable G-Link SPI Transport driver to enable off-chip communication
over SPI bus.
CRs-Fixed: 1045916
Change-Id: I268d96f04b034edad2fadea8ef2c14fe8d8de251
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
|
| |\| | | | | | | | | | | | | | | | | | | | | |
| |_|_|_|_|/ / / / / / / / / / / / / / / / /
|/| | | | | | | | | | | | | | | | | | | | | |
|
| | | |/ / / / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
G-Link SPI Transport is used to communicate with external audio codec.
Add G-Link SPI Transport device to support that configuration.
CRs-Fixed: 1045916
Change-Id: I97ca857c21d8873574a180d289e2fbca29c8a891
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Add reset controller framework for all MSM supported targets as it will be
used by clock driver and clients to use the framework.
Change-Id: I67804db996f47046242cbec2a85ed66d229a8156
Signed-off-by: Taniya Das <tdas@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |/ / / / / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
QOS values are programmed wrongly for msmcobalt. This can
affect Venus performance. This change fixes the same.
CRs-Fixed: 1046678
Change-Id: I6d474c2279422abe63ad625f35809fe156e8c465
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|_|_|_|_|/ / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Adding DFPS support for nt35597 dualmipi wqxga video mode panel based on
vertical porch adjustment.
CRs-Fixed: 1047142
Change-Id: Ida3a175d2d1d9d4c2b5bed1e9998dc1af4f626d0
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \
| |_|_|_|_|/ / / / / / / / / / / / / / / / /
|/| | | | | | | | | | | | | | | | | | | | | |
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
When continuous splash screen feature is enabled, the display
needs to be kept alive during the kernel boot up. Add proxy vote
for MDSS GDSC to prevent it from being turned off until the display
driver hand off can be executed.
CRs-Fixed: 1037857
Change-Id: Ie111c5d4fb401a04620809b84ba6a7c2e7d1ce88
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Reserve memory for the display framebuffer in HLOS for continuous
splash feature on msmcobalt target. This memory buffer would be
configured by the bootloader and needs to be retained until the
first frame update in kernel.
CRs-Fixed: 1037857
Change-Id: Ifbcc1454a1c85eb0163fed969a0c8ceb21d23245
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|/ / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
DMIC clock on ECPP(Echo cancellation Ping-Pong) path can
run at 1.2MHz. Change configures DMIC clock rate for ECPP
path in codec device node.
CRs-fixed: 1022917
Change-Id: Ie7a0a5c57af608cdb42fac9f0f95fe427de8ea1d
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|_|_|/ / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Add MDSS Display-Port device node for msmcobalt which is needed to drive
any external display that supports DP interface. Add the
msmcobalt-CDP/MTP specific GPIO entries needed for display-port.
Change-Id: I61592c167345ebec4cde07f0a72ef059f186b84a
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \
| |_|/ / / / / / / / / / / / / / / / / / / /
|/| | | | | | | | | | | | | | | | | | | | | |
|
| | | |_|_|_|/ / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
New battery module is used on QRD msmcobalt SKUK device, add the battery
data for it.
Change-Id: I4a1888fb2302572720260ffea200e5fe6d79a7ba
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
On iommu attach and detach we should not be changing the dma ops
if the domain is in bypass.
Fix the iommu detach call to not clear the dma ops if the
domain is in bypass.
CRs-Fixed: 1048740
Change-Id: Ie29e7a6a5375e1ec33b000fa09f01aeb7406c8d9
Signed-off-by: Liam Mark <lmark@codeaurora.org>
|
| |\| | | | | | | | | | | | | | | | | | | | | |
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
This reverts commit commit 6a70911936b5 ("arm64: dma-mapping: Attach
IOMMUs as groups"). PCIe endpoint devices are no longer placed into
groups with the root complex device so we no longer need to attach as
groups in the DMA layer.
CRs-Fixed: 1036401
Change-Id: I953808314ed92e9da1ac15dc5be3d1d223fee188
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
|
| |\| | | | | | | | | | | | | | | | | | | | | |
|
| | |/ / / / / / / / / / / / / / / / / / / /
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
There's currently a placeholder stream ID of "1" in the PCIe RC device
tree node. The PCIe RC doesn't actually attach and doesn't need a
stream ID though, the "1" was put there to get around an error caused by
the fact that #iommu-cells was equal to 1 for the anoc1_smmu, even
though it should have actually been 0.
Fix all this by making #iommu-cells = <0> for the anoc1 SMMU and
removing the bogus placeholder stream ID.
CRs-Fixed: 1036401
Change-Id: I73ff6d6b081b1ee00c8e8ebea42e86160b35aa37
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | |/ / / / / / / / / / / / / / / / / / / /
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
change to use SW AEAD and HMAC algorithms with ARMv8 crypto
extensions by default on msmcobalt, as they have better performances
than algorithms using HW crypto engines.
Change-Id: If68b68374bfabcdef7ecbf245b72b12c4734f811
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
|
| | |_|_|_|/ / / / / / / / / / / / / / / /
|/| | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
Re-enable QTAGUID so that bandwidth control is possible from
userspace now that stability issues have been resolved by
picking upstream commits.
Change-Id: If3b0be88f28da82a08dc4cc67006e8ee8ced5a72
CRs-Fixed: 1035969
Signed-off-by: Bryse Flowers <bflowers@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
Modify the sleep set GPIO bias for UART_3. This will help lower leakage
once the usecase for UART_3 has ended.
Change-Id: I50d918197a4cd0b503dff78e7d4ba89518c1d1c2
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
|
| | | |_|_|/ / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
Modify the sleep set GPIO bias for I2C_5. This will help lower leakage once
the usecase for I2C_5 has ended.
Change-Id: I41e9012210ce9a5f4fbeb4236365c0fa2db08625
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | |_|/ / / / / / / / / / / / / / / / /
| |/| | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
TSENS (Temperature sensor) driver does not need to map the
QFPROM region to obtain the gain and offset since these are
programmed in the boot initialization to the controller.
This removes the dependency for the application TSENS driver
to map the QFPROM physical region. Hence remove this property
as its optional. Also remove the default slope values that
are used in cases where the application TSENS driver uses it
for calibrationless mode.
Change-Id: Id6893729f5b37a862f3621b8c7897eb767490cd7
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
Update the CPU frequency to MEM ACC level mappings for
the gold and silver clusters on MSMCOBALT to match the
recommendations given in the voltage plan.
CRs-Fixed: 1046577
Change-Id: Ia2d375b4c9d53dc4eedaf4983dd0bd1433419d75
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|
| | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | | |
Add platform info to the machine name on msmcobalt device tree node.
CRs-Fixed: 1047798
Change-Id: I52095462c60d1320e3aeabed7aaf7462f143f8da
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
|
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |
|