summaryrefslogtreecommitdiff
path: root/arch/arc/kernel (follow)
Commit message (Collapse)AuthorAge
* Merge branch 'irq-core-for-linus' of ↵Linus Torvalds2015-09-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
| * arc/irq: Prepare idu_cascade_isr for irq argument removalThomas Gleixner2015-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: entry: Fix reserved handlerVineet Gupta2015-08-27
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: perf: Finally introduce HS perf unitVineet Gupta2015-08-27
| | | | | | | | | | | | | | | | | | | | With all features in place, the ARC HS pct block can now be effectively allowed to be probed/used Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: perf: SMP supportAlexey Brodkin2015-08-27
| | | | | | | | | | | | | | | | | | | | * split off pmu info into singleton and per-cpu bits * setup PMU on all cores Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: perf: implement exclusion of event counting in user or kernel modeAlexey Brodkin2015-08-27
| | | | | | | | | | | | | | Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: perf: Support sampling events using overflow interruptsAlexey Brodkin2015-08-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In times of ARC 700 performance counters didn't have support of interrupt an so for ARC we only had support of non-sampling events. Put simply only "perf stat" was functional. Now with ARC HS we have support of interrupts in performance counters which this change introduces support of. ARC performance counters act in the following way in regard of interrupts generation. [1] A counter counts starting from value set in PCT_COUNT register pair [2] Once counter reaches value set in PCT_INT_CNT interrupt is raised Basic setup look like this: [1] PCT_COUNT = 0; [2] PCT_INT_CNT = __limit_value__; [3] Enable interrupts for that counter and let it run [4] Let counter reach its limit [5] Handle interrupt when it happens Note that PCT HW block is build in CPU core and so ints interrupt line (which is basically OR of all counters IRQs) is wired directly to top-level IRQC. That means do de-assert PCT interrupt it's required to reset IRQs from all counters that have reached their limit values. Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: perf: implement "event_set_period"Alexey Brodkin2015-08-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This generalization prepares for support of overflow interrupts. Hardware event counters on ARC work that way: Each counter counts from programmed start value (set in ARC_REG_PCT_COUNT) to a limit value (set in ARC_REG_PCT_INT_CNT) and once limit value is reached this timer generates an interrupt. Even though this hardware implementation allows for more flexibility, in Linux kernel we decided to mimic behavior of other architectures this way: [1] Set limit value as half of counter's max value (to allow counter to run after reaching it limit, see below for more explanation): ---------->8----------- arc_pmu->max_period = (1ULL << counter_size) / 2 - 1ULL; ---------->8----------- [2] Set start value as "arc_pmu->max_period - sample_period" and then count up to the limit Our event counters don't stop on reaching max value (the one we set in ARC_REG_PCT_INT_CNT) but continue to count until kernel explicitly stops each of them. And setting a limit as half of counter capacity is done to allow capturing of additional events in between moment when interrupt was triggered until we're actually processing PMU interrupts. That way we're trying to be more precise. For example if we count CPU cycles we keep track of cycles while running through generic IRQ handling code: [1] We set counter period as say 100_000 events of type "crun" [2] Counter reaches that limit and raises its interrupt [3] Once we get in PMU IRQ handler we read current counter value from ARC_REG_PCT_SNAP ans see there something like 105_000. If counters stop on reaching a limit value then we would miss additional 5000 cycles. Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: perf: cap the number of counters to hardware max of 32Vineet Gupta2015-08-27
| | | | | | | | | | | | | | | | | | | | | | The number of counters in PCT can never be more than 32 (while countable conditions could be 100+) for both ARCompact and ARCv2 And while at it update copyright dates. Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: add/fix some comments in code - no functional changeVineet Gupta2015-08-20
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: change some branchs to jumps to resolve linkage errorsYuriy Kolerov2015-08-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When kernel's binary becomes large enough (32M and more) errors may occur during the final linkage stage. It happens because the build system uses short relocations for ARC by default. This problem may be easily resolved by passing -mlong-calls option to GCC to use long absolute jumps (j) instead of short relative branchs (b). But there are fragments of pure assembler code exist which use branchs in inappropriate places and cause a linkage error because of relocations overflow. First of these fragments is .fixup insertion in futex.h and unaligned.c. It inserts a code in the separate section (.fixup) with branch instruction. It leads to the linkage error when kernel becomes large. Second of these fragments is calling scheduler's functions (common kernel code) from entry.S of ARC's code. When kernel's binary becomes large it may lead to the linkage error because scheduler may occur far enough from ARC's code in the final binary. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with ↵Vineet Gupta2015-08-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exponential backoff This is to workaround the llock/scond livelock HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping coherency transactions in the SCU. The exclusive line state keeps rotating among contenting cores leading to a never ending cycle. So break the cycle by deferring the retry of failed exclusive access (SCOND). The actual delay needed is function of number of contending cores as well as the unrelated coherency traffic from other cores. To keep the code simple, start off with small delay of 1 which would suffice most cases and in case of contention double the delay. Eventually the delay is sufficient such that the coherency pipeline is drained, thus a subsequent exclusive access would succeed. Link: http://lkml.kernel.org/r/1438612568-28265-1-git-send-email-vgupta@synopsys.com Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: Fix the peripheral address space detectionVineet Gupta2015-08-03
| | | | | | | | | | | | | | | | With HS 2.1 release, the peripheral space register no longer contains the uncached space specifics, causing the kernel to panic early on. So read the newer NON VOLATILE AUX register to get that info. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC/time: Migrate to new 'set-state' interfaceViresh Kumar2015-07-20
|/ | | | | | | | | | | | | Migrate arc driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: support HS38 releasesVineet Gupta2015-07-13
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: slightly refactor macros for boot loggingVineet Gupta2015-07-09
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* arc:irqchip: prepare for drivers/irqchip/irqchip.h removalJoël Porquet2015-07-09
| | | | | | | | | | | | | The IRQCHIP_DECLARE macro migrated to 'include/linux/irqchip.h'. See commit 91e20b5040c67c51aad88cf87db4305c5bd7f79d ("irqchip: Move IRQCHIP_DECLARE macro to include/linux/irqchip.h"). This patch removes the inclusions of private header 'drivers/irqchip/irqchip.h' and if necessary replaces them with inclusions of 'include/linux/irqchip.h'. Signed-off-by: Joel Porquet <joel@porquet.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handlerVineet Gupta2015-07-06
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: intc: IDU: support irq affinityVineet Gupta2015-07-06
| | | | | | | With this nsim standlone / OSCI have working irq affinity - AXS103 still needs some work as IDU is not visible in intc hierarchy yet ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: fix unused var wanringVineet Gupta2015-07-06
| | | | | Fixes: 9bf39ab2adaf ("vfs: add file_path() helper") Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2015-07-04
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull more vfs updates from Al Viro: "Assorted VFS fixes and related cleanups (IMO the most interesting in that part are f_path-related things and Eric's descriptor-related stuff). UFS regression fixes (it got broken last cycle). 9P fixes. fs-cache series, DAX patches, Jan's file_remove_suid() work" [ I'd say this is much more than "fixes and related cleanups". The file_table locking rule change by Eric Dumazet is a rather big and fundamental update even if the patch isn't huge. - Linus ] * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (49 commits) 9p: cope with bogus responses from server in p9_client_{read,write} p9_client_write(): avoid double p9_free_req() 9p: forgetting to cancel request on interrupted zero-copy RPC dax: bdev_direct_access() may sleep block: Add support for DAX reads/writes to block devices dax: Use copy_from_iter_nocache dax: Add block size note to documentation fs/file.c: __fget() and dup2() atomicity rules fs/file.c: don't acquire files->file_lock in fd_install() fs:super:get_anon_bdev: fix race condition could cause dev exceed its upper limitation vfs: avoid creation of inode number 0 in get_next_ino namei: make set_root_rcu() return void make simple_positive() public ufs: use dir_pages instead of ufs_dir_pages() pagemap.h: move dir_pages() over there remove the pointless include of lglock.h fs: cleanup slight list_entry abuse xfs: Correctly lock inode when removing suid and file capabilities fs: Call security_ops->inode_killpriv on truncate fs: Provide function telling whether file_remove_privs() will do anything ...
| * vfs: add file_path() helperMiklos Szeredi2015-06-23
| | | | | | | | | | | | | | | | | | | | Turn d_path(&file->f_path, ...); into file_path(file, ...); Signed-off-by: Miklos Szeredi <mszeredi@suse.cz> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | ARC: Fix build failures for ARCompact in linux-next after ARCv2 supportVineet Gupta2015-06-28
| | | | | | | | | | Reported-by: Guenter Roeck <private@roeck-us.net> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: [vdk] dts files and defconfig for HS38 VDKRuud Derwig2015-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | - CONFIG_ARC_UBOOT_SUPPORT to handle arguments passed in r0, r1, r2 - CONFIG_DEVTMPFS_MOUNT for mouting rootfs since it uses external cpio for rootfs Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Ruud Derwig <rderwig@synopsys.com> [vgupta: folded the Main baord DT files for smp/up into one] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x coresVineet Gupta2015-06-25
| | | | | | | | | | | | | | Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distributionVineet Gupta2015-06-22
| | | | | | | | | | | | Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta2015-06-22
| | | | | | | | | | | | Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: SMP: ARConnect debug/robustnessVineet Gupta2015-06-22
| | | | | | | | | | | | | | - Handle possible interrupt coalescing from MCIP - chk if prev IPI ack before sending new Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta2015-06-22
| | | | | | | | | | | | Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: make plat_smp_ops weak to allow over-ridesVineet Gupta2015-06-22
| | | | | | | | | | | | | | | | This allows platforms to provide their own cpu wakeup routines as well as IPI send / clear backends, while allowing a SMP kernel w/o any such backend to build/boot Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: clocksource: Introduce 64bit local RTC counterVineet Gupta2015-06-22
| | | | | | | | | | | | Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: STAR 9000808988: signals involving Delay SlotVineet Gupta2015-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reported by Anton as LTP:munmap01 failing with Illegal Instruction Exception. --------------------->8-------------------------------------- mmap2(NULL, 24576, PROT_READ|PROT_WRITE, MAP_SHARED, 3, 0) = 0x200d2000 munmap(0x200d2000, 24576) = 0 --- SIGSEGV {si_signo=SIGSEGV, si_code=SEGV_MAPERR, si_addr=0x200d2000} --- potentially unexpected fatal signal 4. Path: /munmap01 CPU: 0 PID: 61 Comm: munmap01 Not tainted 3.13.0-g5d5c46d9a556 #8 task: 9f1a8000 ti: 9f154000 task.ti: 9f154000 [ECR ]: 0x00020100 => Illegal Insn [EFA ]: 0x0001354c [BLINK ]: 0x200515d4 [ERET ]: 0x1354c @off 0x1354c in [/munmap01] VMA: 0x00010000 to 0x00018000 [STAT32]: 0x800802c0 ... --------------------->8-------------------------------------- The issue was 1. munmap01 accessed unmapped memory (on purpose) with signal handler installed for SIGSEGV 2. The faulting instruction happened to be in Delay Slot 00011864 <main>: 11908: bl.d 13284 <tst_resm> 1190c: stb r16,[r2] 3. kernel sets up the reg file for signal handler and correctly clears the DE bit in pt_regs->status32 placeholder 4. However RESTORE_CALLEE_SAVED_USER macro is not adjusted for ARCv2, and it over-writes the above with orig/stale value of status32 5. After RTIE, userspace signal handler executes a non branch instruction with DE bit set, triggering Illegal Instruction Exception. Reported-by: Anton Kolesov <akolesov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: STAR 9000793984: Handle return from intr to Delay SlotVineet Gupta2015-06-22
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta2015-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARCv2: [intc] HS38 core interrupt controllerVineet Gupta2015-06-22
| | | | | | | | | | | | Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: uncached base is hard constant for ARC, don't save itVineet Gupta2015-06-22
| | | | | | | | | | | | | | ioremap already uses the hard define, just make sure BCR value matches that Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: Make way for pt_regs != user_regs_structVineet Gupta2015-06-19
| | | | | | | | | | | | | | | | | | These have been register compatible so far. However ARCv2 mandates different pt_regs layout (due to h/w auto save). To keep pt_regs same for both, we start by removing the assumption - used mainly for block copies between the 2 structs in signal handling and ptrace Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: use single EXCEPTION_PROLOGUEVineet Gupta2015-06-19
| | | | | | | | | | | | | | Returning from pure kernel mode and exception mode use the same code anyways. Remove one the duplicate blocks Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: micro-optimize Trap handlerVineet Gupta2015-06-19
| | | | | | | | | | | | | | | | | | | | | | Elide the need to re-read ECR in Trap handler by ensuring that EXCEPTION_PROLOGUE does that at the very end just before returning to Trap handler ARCv2 EXCEPTION_PROLOGUE already did that, so same for ARcompact and the common trap handler adjusted to use cached ECR Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: move some code around for cache locality in return pathVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: Ensure that restore_regs is local to compilation unitVineet Gupta2015-06-19
| | | | | | | | | | | | | | | | | | This fixes the possible link/relo errors, since restore_regs will be provided by ISA code, but called from ARC common code. The .L prefix reassures binutils that it will be in same compilation unit. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: comments cleanupVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: Trap handler to use r10 for syscall vs. brkpt decisionVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: FAKE_RET_FROM_EXCPN can always use r9Vineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: confine EXCEPTION_* macros to one fileVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: canonical'ize EXCEPTION_{PROLOGUE,EPILOGUE}Vineet Gupta2015-06-19
| | | | | | | | | | | | | | -EXCEPTION_EPILOGUE introduced -EXCEPTION_PROLOGUE now also includes reg file saving Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}Vineet Gupta2015-06-19
| | | | | | | | | | | | -common'ize macros for level 1 and level 2 interrupts Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: entry.S: common'ize scrtach reg freeup in intr + exceptionsVineet Gupta2015-06-19
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-25 03:46:22 +0000