| Commit message (Collapse) | Author | Age |
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Change-Id: I049d2e9d238a92d56100e8e317be6688497eb501
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It's not immediately obvious which hardware errata are worked around in
the Linux kernel for an arbitrary kernel tree, so add a file to keep
track of what we're working around.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Bug: 30369029
Patchset: rework-pagetable
(cherry picked from commit 9cb9c9e5ba8453537e8e645318edf231fe54eaf9)
Signed-off-by: Jeff Vander Stoep <jeffv@google.com>
Change-Id: I139972ff6e10e12c4b4f27cd047f55b3dd8b4118
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arm64 relies on the arm_arch_timer for sched_clock, so we can select
HAVE_IRQ_TIME_ACCOUNTING and have the core sched-clock code enable the
feature at runtime based on the rate.
Reported-by: Mario Smarduch <m.smarduch@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Bug: 30369029
(cherry picked from commit 24da208db32ee1e4757ceaba898c47add8e5361e)
Signed-off-by: Jeff Vander Stoep <jeffv@google.com>
Change-Id: I849e010459dbbde0ac0d44d665dadcea9f8bf12d
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This is the 4.4.21 stable release
Change-Id: I03e47d6fdca8084641c4b4f9658ea0b0edb8f297
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android-4.4
Change-Id: Ic24b43ee867bc4f70b31bedaad734717b64b86a1
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The topic of a single simple power-performance tunable, that is wholly
scheduler centric, and has well defined and predictable properties has
come up on several occasions in the past. With techniques such as a
scheduler driven DVFS, we now have a good framework for implementing
such a tunable.
This patch provides a detailed description of the motivations and design
decisions behind the implementation of the SchedTune.
cc: Jonathan Corbet <corbet@lwn.net>
cc: linux-doc@vger.kernel.org
Signed-off-by: Patrick Bellasi <patrick.bellasi@arm.com>
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EAS (energy aware scheduling) provides the scheduler with an alternative
objective - energy efficiency - as opposed to it's current performance
oriented objectives. EAS relies on a simple platform energy cost model
to guide scheduling decisions. The model only considers the CPU
subsystem.
This patch adds documentation describing DT bindings that should be used to
supply the scheduler with an energy cost model.
Signed-off-by: Robin Randhawa <robin.randhawa@arm.com>
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This documentation patch provides an overview of the experimental
scheduler energy costing model, associated data structures, and a
reference recipe on how platforms can be characterized to derive energy
models.
Signed-off-by: Morten Rasmussen <morten.rasmussen@arm.com>
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This is the 4.4.19 stable release
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This is a wrap-up of three patches pending upstream approval.
I'm bundling them because they are interdependent, and it'll be
easier to drop it on rebase later.
1. dm: allow a dm-fs-style device to be shared via dm-ioctl
Integrates feedback from Alisdair, Mike, and Kiyoshi.
Two main changes occur here:
- One function is added which allows for a programmatically created
mapped device to be inserted into the dm-ioctl hash table. This binds
the device to a name and, optional, uuid which is needed by udev and
allows for userspace management of the mapped device.
- dm_table_complete() was extended to handle all of the final
functional changes required for the table to be operational once
called.
2. init: boot to device-mapper targets without an initr*
Add a dm= kernel parameter modeled after the md= parameter from
do_mounts_md. It allows for device-mapper targets to be configured at
boot time for use early in the boot process (as the root device or
otherwise). It also replaces /dev/XXX calls with major:minor opportunistically.
The format is dm="name uuid ro,table line 1,table line 2,...". The
parser expects the comma to be safe to use as a newline substitute but,
otherwise, uses the normal separator of space. Some attempt has been
made to make it forgiving of additional spaces (using skip_spaces()).
A mapped device created during boot will be assigned a minor of 0 and
may be access via /dev/dm-0.
An example dm-linear root with no uuid may look like:
root=/dev/dm-0 dm="lroot none ro, 0 4096 linear /dev/ubdb 0, 4096 4096 linear /dv/ubdc 0"
Once udev is started, /dev/dm-0 will become /dev/mapper/lroot.
Older upstream threads:
http://marc.info/?l=dm-devel&m=127429492521964&w=2
http://marc.info/?l=dm-devel&m=127429499422096&w=2
http://marc.info/?l=dm-devel&m=127429493922000&w=2
Latest upstream threads:
https://patchwork.kernel.org/patch/104859/
https://patchwork.kernel.org/patch/104860/
https://patchwork.kernel.org/patch/104861/
Bug: 27175947
Signed-off-by: Will Drewry <wad@chromium.org>
Review URL: http://codereview.chromium.org/2020011
Change-Id: I92bd53432a11241228d2e5ac89a3b20d19b05a31
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New driver memory_state_time tracks time spent in different DDR
frequency and bandwidth states.
Memory drivers such as qcom,cpubw can post updated state to the driver
after registering a callback. Processed by a workqueue
Bandwidth buckets are read in from device tree in the relevant qualcomm
section, can be defined in any quantity and spacing.
The data is exposed at /sys/kernel/memory_state_time, able to be read by
the Android framework.
Functionality is behind a config option CONFIG_MEMORY_STATE_TIME
Change-Id: I4fee165571cb975fb9eacbc9aada5e6d7dd748f0
Signed-off-by: James Carr <carrja@google.com>
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This is the 4.4.16 stable release
Change-Id: Ibaf7b7e03695e1acebc654a2ca1a4bfcc48fcea4
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This backports 5de23d435e88996b1efe0e2cebe242074ce67c9e
This patch provides a proc/PID/timerslack_ns interface which exposes a
task's timerslack value in nanoseconds and allows it to be changed.
This allows power/performance management software to set timer slack for
other threads according to its policy for the thread (such as when the
thread is designated foreground vs. background activity)
If the value written is non-zero, slack is set to that value. Otherwise
sets it to the default for the thread.
This interface checks that the calling task has permissions to to use
PTRACE_MODE_ATTACH_FSCREDS on the target task, so that we can ensure
arbitrary apps do not change the timer slack for other apps.
Signed-off-by: John Stultz <john.stultz@linaro.org>
Acked-by: Kees Cook <keescook@chromium.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Oren Laadan <orenl@cellrox.com>
Cc: Ruchi Kandoi <kandoiruchi@google.com>
Cc: Rom Lemarchand <romlem@android.com>
Cc: Android Kernel Team <kernel-team@android.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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When kernel.perf_event_open is set to 3 (or greater), disallow all
access to performance events by users without CAP_SYS_ADMIN.
Add a Kconfig symbol CONFIG_SECURITY_PERF_EVENTS_RESTRICT that
makes this value the default.
This is based on a similar feature in grsecurity
(CONFIG_GRKERNSEC_PERF_HARDEN). This version doesn't include making
the variable read-only. It also allows enabling further restriction
at run-time regardless of whether the default is changed.
https://lkml.org/lkml/2016/1/11/587
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Bug: 29054680
Change-Id: Iff5bff4fc1042e85866df9faa01bce8d04335ab8
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perf_event_paranoid was only documented in source code and a perf error
message. Copy the documentation from the error message to
Documentation/sysctl/kernel.txt.
perf_cpu_time_max_percent was already documented but missing from the
list at the top, so add it there.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/20160119213515.GG2637@decadent.org.uk
[ Remove reference to external Documentation file, provide info inline, as before ]
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Bug: 29054680
Change-Id: I13e73cfb2ad761c94762d0c8196df7725abdf5c5
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When CONFIG_MMC_SIMULATE_MAX_SPEED is enabled, Expose max_read_speed,
max_write_speed and cache_size default module parameters and sysfs
controls to simulate a slow eMMC device. Default values are 0 (off),
0 (off) and 4 MB respectively.
Signed-off-by: Mark Salyzyn <salyzyn@google.com>
Bug: 26976972
Change-Id: I342bfbd8b85f9b790e3f0e1e4e51a900ae07e05d
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If ignore_zero_blocks is enabled dm-verity will return zeroes for blocks
matching a zero hash without validating the content.
Change-Id: I728fa4b2586b29f2793ea5cb014289892819d249
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
(cherry picked from commit 0cc37c2df4fa0aa702f9662edce4b7ce12c86b7a)
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Add support for correcting corrupted blocks using Reed-Solomon.
This code uses RS(255, N) interleaved across data and hash
blocks. Each error-correcting block covers N bytes evenly
distributed across the combined total data, so that each byte is a
maximum distance away from the others. This makes it possible to
recover from several consecutive corrupted blocks with relatively
small space overhead.
In addition, using verity hashes to locate erasures nearly doubles
the effectiveness of error correction. Being able to detect
corrupted blocks also improves performance, because only corrupted
blocks need to corrected.
For a 2 GiB partition, RS(255, 253) (two parity bytes for each
253-byte block) can correct up to 16 MiB of consecutive corrupted
blocks if erasures can be located, and 8 MiB if they cannot, with
16 MiB space overhead.
Change-Id: Ife4f8889f7fbf0974bf3ed4be6d3322ae9b4cb0e
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
(cherry picked from commit a739ff3f543afbb4a041c16cd0182c8e8d366e70)
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Make the parsing of the AUX controller configurations more
extensible by adding support for multiple settings per configuration,
as well as the parsing of the register offsets. This enables the
extension to support different targets, and combinations of AUX
controller settings depending on the use case.
CRs-Fixed: 2006096
Change-Id: I4e6b623a4d9fafcfcc89477dfa57880eb798c350
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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OLEDB_SPARE_CTL register bit is set by the PBS during the display enable
and is used during the display suspend to trigger the PBS event.
Hence, move clearing of the OLEDB_SPARE_CTL register to regulator disable.
Also enable the force_pd_ctl only for DRAX-A revisions <=2.0.
Change-Id: I339cefc91f94f772bc4f84e85f2471e1a73e4aed
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
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On certain PMICs, there is no short circuit (SC) detection available
in LAB module. Add support to detect it manually and disable LAB/IBB
module upon SC detection. In addition, notify it to OLEDB driver to
disable OLEDB module.
Change-Id: I2a9dc5b1ae8ece45c85b3992026c7f389fd4d135
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
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Add PMIC revid support to identify the PMIC subtype for OLEDB driver.
This is useful to enable the functionalities/features that are specific to
certain PMICs like PM660A.
Change-Id: I4539955abb29fe37256e21ac507db646953e0abf
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
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Do not keep the channel reserved for debug port in the
ppid to apid mapping table. This is to avoid accessing
that particular channel during the read/write/irq operations.
Change-Id: I8f49d1d87978a5b68ea711d3e30606d72fd09f73
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
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Page poisoning is currently set up as a feature if architectures don't
have architecture debug page_alloc to allow unmapping of pages. It has
uses apart from that though. Clearing of the pages on free provides an
increase in security as it helps to limit the risk of information leaks.
Allow page poisoning to be enabled as a separate option independent of
kernel_map pages since the two features do separate work. Because of
how hiberanation is implemented, the checks on alloc cannot occur if
hibernation is enabled. The runtime alloc checks can also be enabled
with an option when !HIBERNATION.
Credit to Grsecurity/PaX team for inspiring this work
Change-Id: I77a36f844ddae54695089c98a97bf0a6e226a025
Signed-off-by: Laura Abbott <labbott@fedoraproject.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Mathias Krause <minipli@googlemail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Jianyu Zhan <nasa4836@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Git-commit: 8823b1dbc05fab1a8bec275eeae4709257c2661d
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
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Add a device tree property to override the minimum and maximum
charger buck/boost switching frequency.
Change-Id: I6b827157c23a389edf2daa412e6825b6ce07a886
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
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In split link panels, the four data lanes are split into
sublinks and the clock lane is shared among the sublink.
Add support for split link panels in mdss.
Change-Id: I40965c274a3591b0a00ca546052e7cb46967844d
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
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Update "apq8998" to "apq8098" as a proper name for all files
and strings used by apq8098 platform.
Change-Id: Id633d346946251751829fb597c860c8d41944265
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
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Add support to configure base termination current which is the
upper boundary at which fuel gauge will signal an end of charge
to the charger during discharging.
Change-Id: Ied2f89fc8e132161d55a9bfbcca6738fef164b20
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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Smb1355 is a derivative chip of smb1381, where features like
input current control and the tadc have been removed. Smb1355
can only be used in parallel mode and that too in mid-mid
configuration.
Note that even if smb1355 doesn't have an adc, its die temperature
could be measured by an external adc. So keep the support for
charger_temp and charger_temp_max properties.
Also smb1355's aux therm input will likely be connected to the
connector thermistor. Support connector_temp_health property.
Change-Id: I738d60ea3385c296187a9cc8afe8134feb8c615f
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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ESR pulse qualification threshold and measurement current should
get set properly without which ESR pulses can fire frequently
causing frequent wakeups. Add support to configure them. Use the
default values as per the hardware recommendation.
Change-Id: I160b2171c46df483c7fa4da2ce23009d99c6dcff
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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PCIe clients and endpoints have different boot
sequence. Expand the boot options in PCIe bus
driver to meet their requirements.
Change-Id: Ia244fd402b784e511eefb550d9814d3b708879fd
Signed-off-by: Tony Truong <truong@codeaurora.org>
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On Certain chipsets, SDR104 mode might be unstable causing CRC error on
the interface. So we need a workaround which would skip printing register
dumps on CRC errors and also downgrade bus speed mode to SDR50/DDR50 in
case of continuous CRC errors. This patch adds "qcom,sdr104-wa" property
to enable this workaround if required.
Change-Id: I626d8ef45a97e8e6558e7f20be496de1f5a2a438
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
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Add support for customized sound card that uses customized
TDM slot mapping and DAI links for automotive platform.
CRs-fixed: 2020063
Change-Id: I887b33d23d2af8af61cf15b499d14afbc9544e37
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
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