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* | | msm: mdss: add support for dedicated hardware cursorSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware cursor within mdss from mdss v1.5 onwards is programmed within the SSPP interface and is no longer a separate dedicated stage in the layer mixer. Cursor needs to be staged onto the existing layer mixer stages and always at the top level available. From this version onwards, cursors are expected to be programmed through the overlay interface by the user. Change-Id: Ia225dd92079e0153e9677ff035cf8531e62d5554 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org> Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
* | | msm: mdss: Restrict vote for bandwidth by histogram based on dtsKrishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Histogram read and histogram LUT writes vote for additional bandwidth on mdss ahb clocks for speeding up the register access. This is not required on 8916 and 8939 targets. Restricting the call for vote based on dts property. Change-Id: I944e07c80c678ef75bd7e4e0270be6a23becce00 Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | | msm: mdss: update MDSS driver to support latency ramDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different MDSS hardware variants support fixed pixel latency ram for each pipe vs SMP (Shared Memory Pool). Software does not have to handle SMP allocation/deallocation for hardware with fixed pixel latency ram. This change enables the driver to handle such MDSS hardware. Change-Id: Ia55f45d65c3eb19350c7195acd83af8ffc0e9a10 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | | msm: mdss: add support for edp panelKuogee Hsieh2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add edp support functions so that edp can be enabled through dtsi. CRs-Fixed: 661151 Change-Id: I6d29f39b836075c59a691ab27904dbe9ea0df28a Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* | | msm: mdss: add support for destination splitKalyan Thota2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MDSS 1.8.0 supports split mux with which we can support resolution of 2k driving both the interfaces on single control path. Add support for both video mode and command mode interfaces Change-Id: I40b6a66a9cb0b7a62fb269e31300df22e9b7cff9 Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
* | | msm: mdss: Add support to read DSI clamp offset from DTSandeep Panda2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since the DSI ULPS clamping registers offset varies from chipset to chipset, so read the offset values from chipset specific mdss dtsi file. Change-Id: I0dcdf8cf0d0f3f1851337e05add833fbdac0632c Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
* | | mdss: dsi: Add support to control bias voltage regulatorChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bias voltage regulator is controlled by wled driver for the sharp panel on 8994. Add support to control this regulator to fix suspend/resume issues. Add optional "qcom,dsi-panel-bias-vreg" property to support this on specific platforms. Change-Id: Ifb02a0467dc190e673781490a918c12293d41d58 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* | | clk: qcom: mdss: add mdss 20nm pll clock driver supportChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for new 20nm PLL clock driver to handle different DSI panel resolutions. Add seperate files to support this new 20nm PHY PLL block. Change-Id: I4ee5309449f317daddba7106cb8e1829fd6e76cf Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* | | msm: mdss: Parse fixed MMB's for VIG pipesJeykumar Sankaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to RGB fixed MMB's, msm8994 reserves fixed MMB's for VIG pipes too. Parse fixed MMB allocation for VIG pipes from device tree and update MMB alloc map. Change-Id: Ie7c7dea77fe8a2afc6bfeffdb5d7f69c48b802cd Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
* | | msm: mdss: Add traffic shaper for rotator pathJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rotator is a non real time client. Traffic shaper helps spread out rotator bandwidth request so that this non real-time client won't compete with other real time read clients. Change-Id: I07dbc0a6287e31d33084e27a8e1f3e9ea365d3ab Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | | msm: mdss: add support for RT/NRT trafficRadhika Ranjan Soni2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RT/NRT feature splits the AXI traffic over two AXI ports. By diverting RT/NRT traffic to individual AXI ports, NRT traffic can be throttled by NOC at SoC level based on AXI port#. Having this capability can help tweak QoS based on use-cases. This change adds support to identify real time and non-real time clients and acocrdingly program HW to take care of routing the RT/NRT traffic to respective AXI ports. Change-Id: Ic5d94423f125226539db9e21bc095dba803cc63e Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
* | | msm: mdss: add max mixer width property in dtKalyan Thota2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Max mixer width supported varies for different targets. Add support for max mixer property in the device tree. Change-Id: I2cbbb947eada13b89349702065d732dd54ed6ba3 Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
* | | msm: mdss: add support to enable idle power collapseAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for a new configuration entry to enable mdss power collapse for idle screen use-cases, when a command mode interface is active. Currently idle power collapse happens only if the Ultra-Low Power State feature of the DSI controller is enabled. Adding a separate configuration entry provides the flexibility to enable this feature independent of the state of the DSI controller. Change-Id: I4732a95a9f3d0db3e7ecc96a36414349ac6b5604 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | | ARM: dts: msm: add mdss gdsc supply to dsi controller deviceAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible for the DSI controller to be active when MDP is power collapsed. DSI controller needs to have it's own vote for mdss gdsc to ensure that gdsc remains on in such cases. Change-Id: I37f98c6e4f6d30908373b812fc50e29ba001b752 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | | msm: mdss: Organize regulator supplies used by DSI controllerAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Regulator supplies in the DSI driver are used for two different purposes. One set of regulators is used as a supply for the DSI controller while another set is used to supply voltage to the panel attached to the DSI controller. To support advanced power saving features, it is required to be able to power down just the DSI controller while keeping the panel on. To enable this, organize the supplies into logical power modules. Change-Id: I54f3ccba1c5ad1fe5c66e8700a012d22ab2684d6 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | | msm: mdss: send panic/roburst signal to bimc based on fill levelDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MDP hardware will send panic/roburst signal to bimc based on fill level for all pipes connected to realtime interferfaces. This allows bimc to priortize the MDP traffic across all bimc ports, regardless of other clients' priority. This feature is not for non-realtime clients like writeback. Change-Id: Iafe891c6aefad905d482bd7aa54e00562698676e Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | | msm: mdss: Add support for VBIF QoS remapperJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each MDP source pipe can generate 4 levels of priority and those priorities are remapped before reaching the AXI bus. These re-mapper settings depends on the chip-set and the nature of the control path source pipe is used in. Ex. re-mapper value for DMA pipe used in DSI, real-time control path, will be different than DMA pipe used in rotator, non-real-time control path. Provide support to implement this configuration. Change-Id: I254f76dd47e3c41adde9894a23232e2f83e6b79c Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | | msm: mdss: Add core clock level selection in MDSSJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently core clock is calculated for each frame and depending upon the calculated value clock driver rounds it to the nearest clock level from clock table. Now do quantization of required clock rate at mdp driver itself once before the request goes to clock driver. Change-Id: Ie30947fb8f7d2978bb121b28920c05888332bf3f Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | | msm: mdss: add property to set from device tree the overlap BW fudge factorIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current calculations apply one fudge factor to the final bandwidth regardless if this is a result from the overlap or prefill calculation. With this change the final bandwidth can be tuned up to apply a different fudge factor when the bandwidth depends on the overlap calculation. CRs-Fixed: 635005 Change-Id: Iaa9718bda3264a47bf70a2facba0d23e4b2414f3 Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | | msm: mdss: support LDO mode for DSI PHY regulatorMao Flynn2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSI PHY supports two regulator modes: LDO and DCDC. While DCDC offers power efficiency, but it requires an external inductor. So it is required to enable LDO mode to save the extra PCB board cost. Change-Id: I156ba8af7857743db5373a9e3f79d948cf9e1427 Signed-off-by: Mao Flynn <Flynn@codeaurora.org>
* | | mdss: Display related changes commit belowTerence Hampson2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While merging to 3.14 kernel this is only display related changes for commit below Change ID: Ie0d5b104882d1534fae262af85e99cc09a56ab04 msm: msm_bus: Move bus scaling to platform drivers Change-Id: Id726a65b5641b57c0edd3ba33f2e5b3f68aff643 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* | | msm: mdss: dsi: add pinctrl supportManoj Rao2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl support for the installation of the required GPIOs from DT. Document properties in bindings. Make appropriate changes in the driver to initialize and set the pins to active and sleep states during unblank and blank stages respectively in DSI driver. Change-Id: Ib58d9162d915adace38ca36a0a3af9fa964d8039 Signed-off-by: Manoj Rao <manojraj@codeaurora.org> Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* | | msm: mdss: add support of source split featureClarence Ip2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Source split feature relaxes some of the old MDP HW limitations and enables newer use-cases. This feature is available from MDSS 1.3.0 onwards. Some of the key highlights are: * single pipe can be staged on two layer mixers. * two pipes can be staged at a single blending stage given left pipe on that stage is higher priority compared to the right pipe. * Ex. 1080p video on can be played on a dual-dsi panel using single pipe compared to two pipes without this feature, saving power. * Ex. using above features, two pipes can equally split the load of a high downscaling surface and thus reducing peak bandwidth requirements. Change-Id: Ia08e37aca2ab0e80db6aef6c8e5ef37149b84e3a Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org> [cip@codeaurora.org: Resolved merge conflict] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* | | msm: mdss: add a separate register region for DSI PHYPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DSI PHY register offset from the controller base is different for different targets. So, add a separate register region for DSI PHY in the device tree. This register base and offset will be used to access the DSI PHY registers. Also change the register offsets which are dependent on the controller base address. Change-Id: Ie1d08950f3c8c8801908a1b3cf7db46a44b4e8c3 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | msm: mdss: Add support for ULPS mode for DSIAravind Venkateswaran2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For smart panels that can refresh display from their internal RAMs, it is possible to configure the DSI clock and data lanes in Ultra Low Power State (ULPS) during idle static screen usecase. Add support for this feature. Change-Id: I4e94d6a0201262f0675322efc9e39dd93c86edda Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | | ARM: dts: mdss: Add boolean property for LUT readabilityKrishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | LUT read is not supported by hardware in the case of msm8226. Adding property to dtsi file to denote the absense of support for read in hardware. Change-Id: I29cf869af4135e1199bc0feb4369700b994520ec Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | | msm: mdss: add bandwidth check per pipeIngrid Gallardo2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add check to verify that the bandwidth of a pipe does not exceed the threshold per pipe. The check happens during the overlay setup and if the pipe exceed the limit, the driver will try to decimate to reduce the bandwidth; but even if after decimation the limit is exceeded, it will fail the configuration. Change-Id: I7ad3654126a503e41540fca250276d564aecccdd Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
* | | msm: mdss: add support for RGB pipes without scalar blocksPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MDP revisions have RGB pipes which do not have scaling support. This change takes care of supporting those variants. Also export this property to the userspace using the MDP capabilities sysfs node. This will help in MDP composition related decision making. Change-Id: I9548bf720d5d80e0e75a71592d7394ee566dce3b Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | msm: mdss: Add support for multiple WFD writeback modesPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different versions of MDSS hardware have different WFD blocks such as 1.) Writeback WFD block connected to interface mixer. 2.) Writeback block shared between WFD and rotator. 3.) Dedicated WFD block using the writeback mixer. We need separate handling for each of these wfd writeback modes. Add support to take care of this. Make the necessary changes in the MDSS DT files to support this for different MDP revisions. Change-Id: Ib95699bd1d8f720f4f044608850eeed60455d6ed Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* | | msm: mdss: Dynamically change writeback path OTJayant Shekhar2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writeback path when used for WFD is processed at 1px/clk whereas when used for rotator, it is processed at 4px/clk. To ensure that writeback during WFD doesn't slow down, reduce the WB block rotator OT to different number depending on different target. Change-Id: I6f37557756d0c8c5037bbd251637ed872d872f74 Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
* | | msm: mdss: add sw_reset support for source pipesUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain use-cases when under-run happens and simultaneously pipe is un-staged from the mixer, pipe goes to bad state. In certain chip-sets, sw_reset sequence is available to bring back pipe in a good state. Add support for this sw_reset sequence. Change-Id: I819a0ed4073d72571f3f663164a41823e947b71f Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | msm: mdss: add dynamic clk status check to pipe idle verificationUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dynamic clk status of pipe can indicate if that pipe is active or not. This status in conjunction VBIF halt status of pipe describes the idle state of the pipe. Add support to parse necessary offsets from DT and use them to find idle state of the pipe. Change-Id: I83c6f323d48a85bfc08ff7bcee47f7c3038ea7e1 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | ARM: dts: msm: Removing len parameters for mdss device treeKrishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The len parameters for sizes of SSPP, DSPP, CTL and Mixer interfaces are not used in the code anymore. Removing those parameters from device tree. Change-Id: Ib49a3d79c27f3291d942e0f36fcb78da93eb43f2 Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | | msm: mdss: support mdp prefill bandwith for multiple platformsHuaibin Yang2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | To calculate mdp prefill bandwidth, mdp driver needs to get h/w dependent buffer constants from device tree. Also add h/w feature dependent logic. Change-Id: I8d56ec502a6fd56eaae5b65a326ef966be46f14b Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
* | | msm: mdss:Add splash logo configuration entry in fbDhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Framebuffer driver displays penguin logo image for all targets. Bootloader also displays the same image. However, customer has to change this boot image at two places if they want to display different image than penguin logo. This change allows customer to disable/enable the splash image from framebuffer driver. Change-Id: I56e78ce93aa8c218adffef03bfebd462d6bda254 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* | | msm: mdss: Add support to halt pipe fetchesUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a utility to halt any pipe fetches and wait on it until all fetches are completely halted. Use this utility during staging and un-staging of the pipe. Change-Id: Id865970063dffc2870be5fd2cf51b9711134dc89 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | ARM: dts: msm: Reading MDP offsets from device tree for PP functions.Krishna Chaitanya Parimi2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register address offset values are currently stored in macro variables. These are now being moved to device tree. These addresses cannot be calculated in cases of targets which have single DSPP like 8226. The required register address offset values are added to the respective target device tree files. The address validation functions corresponding to PP are modified to read the values from these newly added device tree entries. 8x10 target does not require this change as it uses MDP3 architecture. Change-Id: I9387c8fadc36e3bbaceb51b243d3a9537250a3be Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
* | | msm: Change devicetree prefix to qcom for Ion and memory reserveKumar Gala2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename properties and compatible strings to return to the old naming convention. In porting patch to 3.14 we had conflict with these files: Documentation/devicetree/bindings/arm/msm/memory-reserve.txt Documentation/devicetree/bindings/arm/msm/msm_memory_hole.txt Issue was these txt files no longer exist. Change-Id: I20a430fc061ed834c33a37873d0e1898129ed24b Signed-off-by: Kumar Gala <galak@codeaurora.org>
* | | msm: mdss: Read the max brightness level from device treePing Li2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | Parse the maximum brightness level supported by different targets from device tree instead of defining a macro for all targets. Change-Id: If997f87c75d763395844cc11dbb8b8c0c24f4212 Signed-off-by: Ping Li <quicpingli@codeaurora.org>
* | | msm: Change devicetree prefix to qti for Ion and memory reserveLaura Abbott2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The preferred prefix for devicetree is now 'qti' instead of 'qcom'. Change the prefix for devicetree bindings for memory reservations and Ion. While porting changes to 3.14 there were conflicts in: Documentation/devicetree/bindings/arm/msm/msm_memory_hole.txt Change-Id: Ic524eb4cfc9b9ab33a376606abc75eb244330123 Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
* | | msm: mdss: Parse max bandwidth property from device treeSree Sesha Aravind Vadrevu2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Maximum bandwidth on the AXI bus supported by MDSS is a hardware capability that needs to be exposed to userspace process via sysfs node for MDP composition decisions. Change-Id: I60e74e96666ca97f21a9880f49a95c3264d01870 Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org> Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* | | msm: mdss: move mdss fudge factors to device-treeUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MDSS has a common driver for multiple chip-sets. Each of these chip-sets can have their own fudge factors for calculations of resource demand. Move these pre-defined fudge factors to device-tree since they are platform dependent. Change-Id: Ia558a2ad0a096b49cdabf41dd25cf30c843149c4 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | msm: mdss: Allocate fb memory under 4GB physical address spaceUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux kernel framework of framebuffer APIs do not support LPAE systems. These APIs are using "unsigned long" data type instead of "phys_addr_t" for physical addresses which doesn't work with LPAE systems. Until framebuffer APIs are fixed, allocate fb memory on MSM chip-sets using dma_alloc_coherent and GFP_KERNEL to get the memory from below 4GB physical address space. Change-Id: Ieca41cae21c956a8b4cf1d5729d287bb0bb30f8d Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | msm: mdss: Configure minimum voltage for CX power railChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For smart panels, we observe abnormal waveforms and unexpected voltage spikes on DSI data lanes when the cx power rail goes to minimum voltage. Vote for the cx regulator in mdp driver and control the voltage to avoid frame shifting. Change-Id: I7ec9e29a4972373775406fa29a5037fd43fef315 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* | | msm: mdss: Reserve framebuffer memory for the splash screenSiddhartha Agrawal2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reserve memory for the framebuffer in the HLOS partition that would be used to display splash screen in the bootloader as well as the initial stages of the kernel bootup. This avoids copying splash screen memory to a local buffer in the kernel. The reserved memory would be freed when the first real update comes in from the userspace. Change-Id: I7dc256f8ffd69c24e56ac10ed57e37d96c8c9a2f Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org> Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
* | | mdss: display: Move reset sequence from dsi controller to panel dtsiCasey Piper2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Parse the reset sequence from the panel dtsi instead of the dsi controller to support different reset sequences for different panels. CRs-Fixed: 528698 Change-Id: Icef6e1aed5c57b6a8f1c2c2b0b7db2ffd040195f Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* | | msm: mdss: allow assertive display on write back framebufferAdrian Salido-Moreno2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reserve a mixer that supports AD to be used for write back and expose a sysfs node for frame buffer devices which are able to support AD. Change-Id: I0598a686d251444fc40bb8073ac50750036be7fe Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org> Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org> Signed-off-by: Ping Li <quicpingli@codeaurora.org>
* | | msm: mdss: Enable fixed MMBs support for RGB pipesUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RGB pipes in some of the chip-sets are statically tied to dedicated Memory Macro Blocks (MMBs) out of common shared memory pool. These MMBs cannot be used by other pipes. Enable support for this fixed MMBs by parsing indexes from device tree and reserving fixed MMBs first before general pool is used. Change-Id: Ic4bc7fa790f430a2853719fec7fd849149bc6976 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | msm: mdss: Move bus scale table implementation to device-treeUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bus scale table is chip-set dependent where number of paths per bandwidth use-case can differ chip-set to chip-set. Current implementation has a static table where it supports only one path per use-case. Expand MDSS bus scaling implementation to accommodate chip-sets where more than one path per use-case, i.e. apq8084, is possible and move table initialization to device-tree so that every chip-set configures its own table. Change-Id: Ia6f76654d129fe0ec1a7124aa87b16f96167fe84 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* | | msm: mdss: Support panel mode selection through GPIODhaval Patel2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some panel supports video mode and command mode selection through GPIO pin state. These dtsi entries allow to configure such panel mode. GPIO high or low value can be associated with any mode of panel. Change-Id: Idf073279e2f039fa07ad2449a327eab14a0142c7 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-02 12:01:23 +0000