| Commit message (Collapse) | Author | Age |
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The pin list is the same for any board using the CODEC.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
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The pin list is the same for any board using the CODEC.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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Exynos5420 added support for I2S TDM mode. For this, there are some
register changes in the I2S controller. This patch adds the relevant
register changes to support I2S in normal mode. This patch adds a
quirk for TDM mode and if TDM mode is present all the relevent changes
will be applied.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Samsung has different versions of I2S introduced in different
platforms. Each version has some new support added for multichannel,
secondary fifo, s/w reset control and internal mux for rclk src clk.
Each newly added change has a quirk. So this patch adds all the
required quirks as driver data and based on compatible string from
dtsi fetches the quirks.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The bindings do not carry any resources, as the module only registers
the ASoC platform driver.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The pxa ssp DAI acts as a user of a pxa ssp port, and needs an
appropriate 'port' phandle in DT to reference the upstream.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-pxa
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This patch contains an ugly hack for looking up the the DMA request
number. The problem here is that the implementation as it stands will
allocate the DMA channel from the user of the ssp port, and hence we
cannot allocate a real channel here.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Trivial add/add conflicts:
sound/soc/codecs/Kconfig
sound/soc/codecs/Makefile
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PCM1681 can be controlled via I2C, SPI or in bootstrap mode (no control mode). This code add
support only for I2C mode.
Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add PCM1792A spi mode codec support. This version implements only
a subset of functionalities. Tested connect to a pandaboard ES
device and based on recently pcm1681 codec.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch adds ac97-slave support.
For ac97, the registers have to be setup earlier than for other ssi
modes because there is some communication with the external device
before streaming. So this patch introduces a fsl_ssi_setup function to
setup the registers for different ssi operation modes seperately.
This patch was tested with imx27-pca100.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch implements a device-tree-only CPU DAI driver for Freescale
S/PDIF controller that supports stereo playback and record feature.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There may be some platforms using fsl-ssi that do not have a DMA driver
with generic DMA bindings. So this patch adds support for the generic
DMA bindings, while still accepting the old "fsl,dma-events" property if
"dmas" is not found.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add support for non-dma pcm for imx platforms with imx-pcm-fiq support.
Instead of imx-pcm-audio, in this case imx-pcm-fiq-audio device is added
and the SIER flags are set differently.
We need imx-pcm-fiq for some boards that use an incompatible codec.
imx-pcm-fiq handles those codecs differently and allows to operate with
them. DMA is not possible because some data sent by the codecs, e.g.
wm9712, is not in the datastream. Also some data is mixed up in the
fifos, so that we need to sort them out manually.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Adds a function to parse a default port configuration from devicetree.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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fsl-ssi was located in powerpc/fsl/ssi.txt. This is no powerpc specific
device, so it should be moved to sound/ as it connects to differen audio
codecs.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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As atmel-ssc can be used with DMA, the documentation should be updated.
Also, a configuration DMA example is given.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Description of the Asoc machine driver for an at91sam9x5 based board
with a wm8731 audio DAC. Wm8731 is clocked by a crystal and used as a
master on the SSC/I2S interface. Its connections are a headphone jack
and an Line input jack.
[Richard: this is based on an old patch from Nicolas that I forward
ported and reworked to use only device tree]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add wm8904 based audio machine driver for Atmel EK board
The following ek board based on it
- at91sam9n12ek
- sama5d3xek (d31, d33, d34, d35)
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Support for loading the ak4554 codec module via devicetree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch adds generic ac97 reset functions using pincontrol and gpio
parsed from devicetree.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij:
"Here is the bulk of pin control changes for the v3.12 series. Most of
the relevant information is in the tag.
I merged in v3.11-rc7 last week to get rid of a largeish conflict
within the sunxi (AllWinner) driver in linux-next and fix up the
non-trivial merge the right way. That driver had a rather large fix
adding locking late in the release cycle.
Overall the bulk changes this time is cleanups and refactorings and
not much new features, which is nice.
- Refactorings for generic pin config handling in the core.
- Factor out a set of device tree utilities for use in all drivers,
to parse and allocate maps from the device tree.
- Some fixes to the core such as more nitpicky locking.
- Pushed down config array iteration into the drivers.
This patch is necessary for drivers that want to iterate over
configs and pile up a stack of alterations to the same register(s),
or if the driver wants to take a local spinlock when committing the
configuration.
- A new driver for the Texas Instruments Palmas PMIC by Laxman
Dewangan. This is used on the Tegra systems.
- A major cleanup and modernization of the PFC (Super Hitachi and ARM
SHmobile) pin controller and subdrivers.
- Support for the A20 and A31 sunxi (AllWinner) SoCs.
- A huge pile of fixes and cleanups: Axel Lin, Jingoo Han Dan
Carpenter, Julia Lawall and Sachin Kamat did an excellent job here"
* tag 'pinctrl-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (124 commits)
pinctrl: sunxi: Fix off-by-one for valid offset range checking
pinctrl: sunxi: drop lock on error path
pinctrl: pinconf-generic: Remove ti prefix in dev_err messages
pinctrl: rockchip: Implement .request() and .free() callbacks
pinctrl: at91: fix get_pullup/down function return
pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()
pinctrl: Add s5pv210 support to pinctrl-exynos
pinctrl: utils: include export.h to avoid warnings
pinctrl: s3c24xx: off by one in s3c24xx_eint_init()
pinctrl: mvebu: testing the wrong variable
pinctrl: abx500: fix bitwise AND test
pinctrl: mvebu: Convert to use devm_ioremap_resource
pinctrl: Pass all configs to driver on pin_config_set()
pinctrl: tz1090-pdc: Convert to devm_ioremap_resource
pinctrl: tz1090: Convert to devm_ioremap_resource
pinctrl: tegra: Convert to devm_ioremap_resource
pinctrl: rockchip: Simplify pin_to_bank equation
pinctrl: spear: Convert to devm_ioremap_resource
pinctrl: rockchip: Remove of_match_ptr macro for DT only driver
pinctrl: palmas: PINCTRL_PALMAS needs to select PINMUX
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Merged in this to avoid conflicts with the big locking fixes
from upstream.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:
drivers/pinctrl/pinctrl-sunxi.c
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This patch implements pinctrl support and adds device tree bindings
for s5pv210.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This change makes documentation of the the gpio-ranges property shorter
and more succinct, more consistent with the style of the rest of the
document, and not mention Linux-specifics such as the API
pinctrl_request_gpio(); DT binding documents should be OS independant
where at all possible. As part of this, the gpio-ranges property's format
is described in BNF form, in order to match the rest of the document.
This change also deprecates the #gpio-range-cells property. Such
properties are useful when one node references a second node, and that
second node dictates the format of the reference. However, that is not
the case here; the definition of gpio-ranges itself always dictates its
format entirely, and hence the value #gpio-range-cells must always be 3,
and hence there is no point requiring any referenced node to include
this property. The only remaining need for this property is to ensure
compatibility of DTs with older SW that was written to support the
previous version of the binding.
v4:
* Mention #gpio-range-cells as being deprecated, rather than removing all
documentation of that property. This allows DTs to be written in a
backwards-compatible way if desired, and also allows older DTs to be
interpreted fully using the latest documentation.
v3:
* Mention BNF in commit description.
* Fixed typo.
* Dropped patch that removed the deprecated property from *.dts, since
it's required to boot older kernels.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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TI Palmas series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.
Add support for pincontrol driver Palmas series device like TPS65913,
TPS80036. The driver supports to be register from DT only.
Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Add ack by Lee.
- Correct the binding docs.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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pinctrl bindings can benefit from generic property names that define
which pins a "pin configuration node" affects, and which mux function
to select onto those pins. Document new properties for this purpose so
that other bindings may refer to them.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Reword the section of pinctrl-bindings.txt that describes generic
properties that pinctrl bindings may use. The aim is to make the text
clearer, and more explicitly call out the responsibility of individual
bindings that use the generic properties to define which of the
properties are used, and how.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer changes from Ingo Molnar:
"Various clocksource driver updates: extend the core with memory mapped
hardware (mmio) support and add new (ARM) Moxart SoC and sun4i
hardware support"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
clocksource: arch_timer: Add support for memory mapped timers
clocksource: arch_timer: Push the read/write wrappers deeper
Documentation: Add memory mapped ARM architected timer binding
clocksource: arch_timer: Pass clock event to set_mode callback
clocksource: arch_timer: Make register accessors less error-prone
ARM: clocksource: moxart: documentation: Update device tree bindings document
ARM: clocksource: moxart: Add bitops.h include
ARM: clocksource: moxart: documentation: Fix device tree bindings document
ARM: clocksource: Add support for MOXA ART SoCs
clocksource: cadence_ttc: Reuse clocksource as sched_clock
clocksource: cadence_ttc: Remove unused header
clocksource: sun4i: Fix bug when switching from periodic to oneshot modes
clocksource: sun4i: Cleanup parent clock setup
clocksource: sun4i: Remove TIMER_SCAL variable
clocksource: sun4i: Factor out some timer code
clocksource: sun4i: Fix the next event code
clocksource: sun4i: Don't forget to enable the clock we use
clocksource: sun4i: Add clocksource and sched clock drivers
clocksource: sun4i: rename AUTORELOAD define to RELOAD
clocksource: sun4i: Wrap macros arguments in parenthesis
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git://git.linaro.org/people/dlezcano/clockevents into timers/core
* Support for memory mapped arch_timers
* Trivial fixes to the moxart timer code
* Documentation updates
Trivial conflicts in drivers/clocksource/arm_arch_timer.c. Fixed up
the newly added __cpuinit annotations as well.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Add a binding for the arm architected timer hardware's memory
mapped interface. The mmio timer hardware is made up of one base
frame and a collection of up to 8 timer frames, where each of the
8 timer frames can have either one or two views. A frame
typically maps to a privilege level (user/kernel, hypervisor,
secure). The first view has full access to the registers within a
frame, while the second view can be restricted to particular
registers within a frame. Each frame must support a physical
timer. It's optional for a frame to support a virtual timer.
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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1. describe compatible variable "Must be" instead of "Should be".
2. change description so it's from the point of view of the device
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Fix device tree bindings document with the correct clock name.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Reason: Get upstream changes on which new patches depend on.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.
The MOXA ART SoC provides three separate timers with individual
count/load/match registers, two are used here:
TIMER1: clockevents, used to support oneshot and periodic events
TIMER2: set up as a free running counter, used as clocksource
Timers are preconfigured by bootloader to count down and interrupt
on match or zero. Count increments every APB clock cycle and is
automatically reloaded when it reaches zero.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Pull pwm changes from Thierry Reding:
"A set of patches makes the device tree documentation for the various
PWM drivers more consistent. Device tree support is added to the
Renesas TPU driver. The sysfs interface now makes use of dev_groups.
Other than that there is a healthy assortment of fixes and
enhancements for minor issues that have shown up"
* tag 'for-3.12-rc1' of git://gitorious.org/linux-pwm/linux-pwm:
pwm: pxa: Use module_platform_driver
pwm: tiehrpwm: add missing __iomem annotation
pwm: tiecap: add CONFIG_PM_SLEEP to ecap_pwm_{save,restore}_context()
pwm: simplify use of devm_ioremap_resource
pwm: renesas-tpu: Add DT support
ARM: dts: Use the PWM polarity flags
pwm: Update DT bindings to reference pwm.txt for cells documentation
pwm: Use the DT macro directly when parsing PWM DT flags
pwm: Add PWM polarity flag macro for DT
pwm: mxs: Check the return value from stmp_reset_block()
pwm: convert class code to use dev_groups
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Specify DT bindings for the TPU PWM controller and add OF support to the
driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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The PWM client cells format is documented in the generic pwm.txt
documentation and duplicated in all PWM driver bindings. Remove
duplicate information and reference pwm.txt instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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Define a PWM_POLARITY_INVERTED macro in include/dt-bindings/pwm/pwm.h to
be used by device tree sources.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata changes from Tejun Heo:
"Two interesting changes.
- libata acpi handling has been restructured so that the association
between ata devices and ACPI handles are less convoluted. This
change shouldn't change visible behavior.
- Queued TRIM support, which enables sending TRIM to the device
without draining in-flight RW commands, is added. Currently only
enabled for ahci (and likely to stay that way for the foreseeable
future).
Other changes are driver-specific updates / fixes"
* 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
libata: bugfix: Remove __le32 in ata_tf_to_fis()
libata: acpi: Remove ata_dev_acpi_handle stub in libata.h
libata: Add support for queued DSM TRIM
libata: Add support for SEND/RECEIVE FPDMA QUEUED
libata: Add H2D FIS "auxiliary" port flag
libata: Populate host-to-device FIS "auxiliary" field
ata: acpi: rework the ata acpi bind support
sata, highbank: send extra clock cycles in SGPIO patterns
sata, highbank: set tx_atten override bits
devicetree: create a separate binding description for sata_highbank
drivers/ata/sata_rcar.c: simplify use of devm_ioremap_resource
sata highbank: enable 64-bit DMA mask when using LPAE
ata: pata_samsung_cf: add missing __iomem annotation
ata: pata_arasan: Staticize local symbols
sata_mv: Remove unneeded CONFIG_HAVE_CLK ifdefs
ata: use dev_get_platdata()
sata_mv: Remove unneeded forward declaration
libata: acpi: remove dead code for ata_acpi_(un)bind
libata: move 'struct ata_taskfile' and friends from ata.h to libata.h
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Some SGPIO PICs don't follow the standard very well and expect a certain
number of clock cycles or port frames in each SGPIO pattern. Add two
optional parameters in the DTB that can provide the number of extra
clock cycles to be sent before and after SGPIO pattern. Read those
parameters from the DTB and send the extra clock cycles.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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Some board designs do not drive the SATA transmit lines within the
specification. The ECME can provide override settings, on a per board
basis, to bring the transmit lines within spec. Read those settings
from the DTB and program them in.
At the time of submission, no production hardware requires this patch.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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