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* clk: qcom: mdss: init mdss pll driver at subsys levelDhaval Patel2016-03-23
| | | | | | | | | | | | | | Boot loader enables resources for continuous splash screen feature and leaves it on when kernel boot up. MDSS PLL driver adds vote for for these resources in kernel. Some other driver can also request same resources and disables it in failure case. This will fade out splash image on screen. Initializing pll driver at subsystem level adds vote for resources at early stage. Change-Id: Icb80c73e185461a49f682a80ab0578883640e803 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* clk: mdss: add software mux for byte and pixel source clocksJeevan Shriram2016-03-23
| | | | | | | | | Implement the software mux to byte clock and pixel source clock with shadow implementation of PLL clock. This is used for configuring the dynamic refresh pll registers. Change-Id: I9c84cb76d040c5df7361291b6e1fc0fe69dc214f Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* clk: mdss: parse the dynamic refresh register baseJeevan Shriram2016-03-23
| | | | | | | | Add support for parsing dynamic refresh register base for register programming. Change-Id: I0f23f3c6c01e2ef47fec5048ae0c8ebf31566b61 Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* clk: mdss-edp-pll: Fix possible null dereferenceVeera Sundaram Sankaran2016-03-23
| | | | | | | Fixed null dereferencing in mdss clk Change-Id: I786fdc04ca605ccbf2dda5565968bee08ce031e5 Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
* clk: mdss-dsi-pll: add support for auto PLL calculator for 20nm PHYChandan Uddaraju2016-03-23
| | | | | | | | | | Add code to support DSI auto PLL calculator for 8994 platform that uses 20nm physical layer. Update the PLL configuration and DSI PHY regulator configurations to the recommended settings. Change-Id: Ia3d7042d537539491317f99d7bcc2c480f850216 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* clk: qcom: mdss: add PLL clock support for 20nm HDMI PHYCasey Piper2016-03-23
| | | | | | | | | | | Add support for HDMI PLL on msm8994. Support is added to register this new clock driver. Also modify makefile to compile new 20nm PLL source and add support for registering PLL clock driver for 20nm HDMI PHY. Change-Id: I57421ac638075358c46ddd938e441a8e525f3a5a Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* clk: qcom: mdss: fix debug clock names for DSI PLL on msm8994Chandan Uddaraju2016-03-23
| | | | | | | | Fix the debug clock names to match with proper clocks for msm8994. These clocks are part of 20nm PHY PLL configuration. Change-Id: I709d6df80330702304b91d76ec2cad0a7f494c1e Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
* clk: qcom: mdss: add mdss 20nm pll clock driver supportChandan Uddaraju2016-03-23
| | | | | | | | | | | | | | | Add support for new 20nm PLL clock driver to handle different DSI panel resolutions. Add seperate files to support this new 20nm PHY PLL block. Change-Id: I4ee5309449f317daddba7106cb8e1829fd6e76cf [veeras@codeaurora.org: As part of the 3.18 upgrade, removing all the msm/mdss display related changes from this commit as it was already updated during that msm/mdss folder update] Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org> Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
* clk: qcom: mdss: add DSI PLL clock driver support for msm8939Padmanabhan Komanduru2016-03-23
| | | | | | | | | | This change adds the DSI PLL clock driver support for msm8939. Add the compatibility string of the DSI PLL handle so that the detection and support of DSI PLL driver for 8939 happens dynamically. Change-Id: Iaa4be3541ce938816d5b9552b685ce05e7cdab64 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* clk: qcom: mdss: update PLL resources based on ref countPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | At present, the PLL resources are updated based on the enable/disable parameter that is passed to the API. Add support to update the PLL resources based on a ref count. This avoids additional delay due to repeated enable/disable of the resources and also maintains proper state of the PLL resources. Change-Id: I39b7ee2b33acb81acdb7dc1f4f387dc71381a464 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* clk: qcom: mdss: split the DSI PLL driver based on PLL modePadmanabhan Komanduru2016-03-23
| | | | | | | | | | Re-organize the DSI PLL driver code and split it based on the DSI PLL HPM/LPM mode. Add a common PLL util file to use the APIs which are common for both PLLs. Update the DSI PLL enable sequence with the recommended settings for LPM mode. Change-Id: I3f86554522e16579d5c2eccab976136c7afb0dd2 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* clk: qcom: mdss: Increase both edp pll's PPM and idle time settingKuogee Hsieh2016-03-23
| | | | | | | | | Increase both edp pll's PPM and idle time setting to fix edp pll unlock problem during stress test. CRs-Fixed: 614017 Change-Id: Ic8315fc77dd002e709a9b215b22cbf498edaf30b Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* clk: qcom: mdss: update resource management in PLL driverPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | | Remove mutex and ref count variables that synchronize the resource enable and disable calls since the regulator and clock drivers take care of maintaining the ref count for each resource. Also, remove resource enable and disable calls from mux_set_rate/mux_get_rate/clk_enable context of the DSI branch clocks to avoid warnings. Change-Id: Ieb32141156afcce008b3555af476c20f888f064b Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* clk: qcom: mdss: add DSI PLL clock driver support for 8916Padmanabhan Komanduru2016-03-23
| | | | | | | | | | | | | This change adds the DSI PLL clock driver support for 8916. In addition, it adds support of DSI PLL programming of different MDSS revisions using the same DSI PLL driver. Also rename the compatibility string of the DSI PLL handle so that the detection and support of DSI PLL driver for 8974 and 8916 happens dynamically. Change-Id: I169ebeaf23e4be8ff4b533fce1057144edd8b692 Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org> Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* clk: qcom: mdss: Do not include msm_iomap header fileDhaval Patel2016-03-23
| | | | | | | | Do not include msm_iomap header file because MDSS pll driver is not using it. Change-Id: Ibe47a7d643bd6c9c5e0a69aad1ff0cc44da09211 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* clk: qcom: mdss: Fix MDSS HDMI pll supportDhaval Patel2016-03-23
| | | | | | | | | | | | PHY registers are not updated during MDSS HDMI pll configuration due to wrong memory mapping. It also leads to crash when user connects the HDMI cable with target. This change fixes the memory mapping for PHY and also adds the missing register configuration entry for HDMI pll. Change-Id: Ie81045fed320993fbab6b02bec6b2b82e5b5d495 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* clk: qcom: mdss: Add mdss pll clock driver supportDhaval Patel2016-03-23
| | | | | | | | | | | | Each display output interface such as eDP, HDMI and DSI are clocked by different pll clocks to support various displays at different resolution simultaneously. The mdss pll driver handles all these display output interfaces' pll clocks separately. It also handles their resources through dtsi configuration. Change-Id: I1de2ae9a0549de901a6c82ea489199a722344dc4 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* msm: mdss: add DSI control parameters to debugfsXu Yang2016-03-23
| | | | | | | | | | | | | Export DSI control properties in debugfs nodes. DSI commands and properties can be get and set by reading and writing debugfs nodes which helps debug and panel bring up instead of changing dtsi files. Change-Id: I768a85447d88167894c46eb0770d2644910f84cd Signed-off-by: Xu Yang <yangxu@codeaurora.org> [cip@codeaurora.org: Remove u32 typecast for debugfs_create_bool] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* msm: mdss: add panel parameters to debugfsClarence Ip2016-03-23
| | | | | | | | | | | | Export panel properties in debugfs nodes. Panel property values can be get and set by reading and writing debugfs nodes, which helps panel bring up and debug instead of changing dtsi files. Change-Id: I2c658c4bf2a0f0c0713df0ab8898380227f0a03b Signed-off-by: Xu Yang <yangxu@codeaurora.org> [cip@codeaurora.org: Resolved merge conflicts, remove u32 typecast for debugfs_create_bool] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* mdss: mdp: Allow for rotator to output CRCB formatsTerence Hampson2016-03-23
| | | | | | | | | Enabling CRCB ordered chroma formats. This was a valid working formats in legacy rotator code, enabling same functionality in new rotator validation check. Change-Id: Iecc96861b5c7cd0a2929d222de3514d4d8f71d44 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* mdss: mdp: remove mdp source clockTerence Hampson2016-03-23
| | | | | | | | MDP core clock has been turned into a voter clock and can now be directly voted for. No longer need a reference to source clock. Change-Id: I7c9efc1d56d54840cea43776f53505a32a92f7a5 Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* msm: rotator: Rotator resource managementClarence Ip2016-03-23
| | | | | | | | | | | As a part of the effort to separate out rotator from MDP driver to be its own driver, Rotator will independently vote for resources it requires. Change-Id: Ic7f7705852ee29d69e45dd22238f3447646bde4d Signed-off-by: Terence Hampson <thampson@codeaurora.org> [cip@codeaurora.org: Removed msm8996-mdss.dtsi from commit] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* msm: mdss: check for split display flag during LM allocationPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | Command mode split display is only supported on DSPP0 and DSPP1. The current software logic doesn't check for split display flag causing mixer allocation failure for single DSI command mode panels on LM-1. Add the check to take care of this. Change-Id: Ia8e8f2550c921b2d62ad05b1b99c8bb7e5f54f09 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* msm: mdss: avoid check for ctl path number for sending panel commandsPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | For command mode, we check for control path number to send the panel OFF/LP1/LP2 commands. This causes issues when a command mode panel is not driven on control path #0. Modify the check to make sure panel commands are sent properly for all use cases using the split display validity APIs. Change-Id: Icbcf775020d4f65dc8bad8b3a84534842d114f0b Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* msm: mdss: use layer mixer number to select pingpong blockPadmanabhan Komanduru2016-03-23
| | | | | | | | | | | In the current implementation, the pingpong block is selected based on the interface number. This causes issues when a single DSI command mode panel is connected to Interface #n and not driven on control path #(n-1). Add change to select pingpong block based on LM number to handle this. Change-Id: I195d25bb7dd890c3b731e6ea38b1a41a321b1cf5 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
* msm: mdss: fix compilation errors if debugfs is disabledSubhash Jadavani2016-03-23
| | | | | | | This change fixes the compilation errors seen when DEBUG_FS is disabled. Change-Id: I28fb230c65b90a9c2ec33c5e4332164e37f2f241 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
* msm: mdss: add venus gdsc support in mdpDhaval Patel2016-03-23
| | | | | | | | | | Venus gdsc has to be turned on before turning on mdss gdsc due to hardware limitation for msm8996 v2 target. This change adds venus gdsc support in mdp driver. Change-Id: I2d6db6d43ac20d2e5196f5e31187246da38365d0 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* msm: mdss: Unblock PP and hist ioctls when PU is enabledPing Li2016-03-23
| | | | | | | | | | Currently driver has checks to ensure that partial update feature and post-processing feature are mutually exclusive. Ideally, this enforcement should be done by clients of PP driver. This patch removes all the partial update status checks for PP ioctls. Change-Id: I0e50c16c3647dcebdf2eff37c632e554cc51002b Signed-off-by: Ping Li <pingli@codeaurora.org>
* Revert "msm: mdss: Override partial update PP block using ioctl"Ken Zhang2016-03-23
| | | | | | | | | | | This reverts commit 679dc362a9effee922ef2ce1447424b318f667bc. The way overriding partial update via PP ioctl is obsolete, partial update control is going through sysfs. The left code is blocking pp ioctl even partial update is disabled dynamically. Change-Id: Icb455a0101b53c58ae6c1b2686bd2297b4832396 Signed-off-by: Ken Zhang <kenz@codeaurora.org> Signed-off-by: Ping Li <pingli@codeaurora.org>
* Revert "msm: mdss: enable mmagic gdsc before turning on mdp gdsc"Dhaval Patel2016-03-23
| | | | | | | | | | | | This reverts commit 3c2ffe73f03a1bfced4239b16d3284b2397f392c. Clock change added support to handle the mmagic gdsc as parent of core gdsc. This removes the requirement from each mm core to vote explicitly for mmagic gdsc. Change-Id: I10e0b3cc9bcb2bd5f4a850e1b8800b45f7305d67 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org> [cip@codeaurora.org: Removed dtsi updates] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* msm: mdss: use u64 instead of u32 for bitclock rate calculationDhaval Patel2016-03-23
| | | | | | | | | Bitclock calculation for high resolution panel overflows the 32bit variable which causes invalid pixel clock and byte clock setting. Updating it to 64bit fixes the overflow issue. Change-Id: If1f6fa3200783b87022366580fc18bfe6e3ddd8d Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* iommu: msm: Provide the IOMMU_NOEXEC flag explicitly during mappingRohit Vaswani2016-03-23
| | | | | | | | | | | | The logic for the iommu executable flag is inverted now and all the iommu mappings are executable by default. Provide the IOMMU_NOEXEC flag where the mapping needs to be non-executable. Change-Id: Ifa0aa3d17ae79c16abdf66d2177a09b868a9f45f Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> [cip@codeaurora.org: Removed __iommu_create_mapping/kgsl_iommu_map update] Signed-off-by: Clarence Ip <cip@codeaurora.org>
* mdss: msm: keep smmu power rail on during continuous splashDhaval Patel2016-03-23
| | | | | | | | | | | SMMU clocks and regulators should be on during continuous splash screen scenario. Turning them off causes the underrun. This change leaves these power rail on during probe and avoids additional refcount during attach. This refcount will be removed on detach during first suspend-resume. Change-Id: I70570dea67d9a95e86ddbe892252dcb493c8fa65 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
* msm: mdss: release mdp_busy flag at isrKuogee Hsieh2016-03-23
| | | | | | | | | | | | Release mdp_busy flag a CMD_MDP_DONE isr while doing hs_clk_lane recovery to mitigate possibility of causing false mdp_busy time out whey system load is heavy. Also checking CMD_MDP_DONE isr status before declare mdp_busy timeout. CRs-Fixed: 823949 Change-Id: Ia5fe60c9799944b8867c262661c4cd97cffba1c7 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* msm: mdss: read from HDMI CEC register only if CEC enabledCasey Piper2016-03-23
| | | | | | | | | If HDMI CEC is not enabled and the CEC sysfs node is written, an unclocked register access could occur. Access this register only if CEC is enabled and configured. Change-Id: I1a190a8302fdf7012723fb908c661098ebabead6 Signed-off-by: Casey Piper <cpiper@codeaurora.org>
* msm: mdss: add UBWC formats to mdp debugVeera Sundaram Sankaran2016-03-23
| | | | | | | | Add supported UBWC formats to mdp debug, so that it displays the correct format name. Change-Id: I055d49344b13a74c0164072fa1da910921ef0606 Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
* msm: mdss: change calculation reference to default frame rateJeevan Shriram2016-03-23
| | | | | | | | | | In the current implementation for dynamic fps in vfp method, while calculating the porch values current fps is taken as reference which may lead to precision loss and clock calculations go wrong. Use the default fps as reference for any change in fps. Change-Id: I9a36c33c9824c95abc4925a324f9cd2f47456e6a Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* msm: mdss: pipe: fix solid fill image programmingAdrian Salido-Moreno2016-03-23
| | | | | | | | | When programming pipe in solid fill, the image properties should be programmed to make sure that scaling blocks are bypassed. In order to do this we need to program out resolution to same size as source. Change-Id: If0a9182ca738e753f99a5b5e9cc20bc76b75238a Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* msm: mdss: ctl: fix mixer allocation logicAdrian Salido-Moreno2016-03-23
| | | | | | | | | | Current mixer allocation logic does initialization only if the mixer is part of the mixer pool, however code has additional path for alternative mixer which is not being initialized. Also don't need to reallocate the mixer if it's already allocated in case of split display. Change-Id: I1dbbbb86096c4825d214755d9cc7bf81b2abbbc8 Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* mdss: debug: add panel timings to mdp dumpAdrian Salido-Moreno2016-03-23
| | | | | | | Provide info about current panel timings when dumping mdp debugfs data. Change-Id: Id2b481797e86131e8d32d7fc59531964f0a21c0a Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
* msm: mdss: enable tearcheck after panel on for synchronizationJeevan Shriram2016-03-23
| | | | | | | | | | | | | | When pingpong split is enabled, we need to configure both PP0 and PP4 tear check blocks for synchronization between the two interfaces. In the existing implementation, the two tearcheck blocks are being enabled at different time and the two TE counters are asynchronous. This asynchronous behaviour could lead to DSI FIFO underflows and are fatal during subsequent panel on/off. This change enables both the tear check blocks together and waits for the TE signal to synchronize. Change-Id: I966dcead59028c729a71cc7e47343303b0b9a6b2 Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
* msm: mdss: wake up threads relying on shutdown noticeUjwal Patel2016-03-23
| | | | | | | | | | | | | | In the current framebuffer driver, user context may be put to sleep to serialize certain operations. These contexts are woken up on certain conditions, one of which is system shutdown notification. Current api used, wait_event_timeout, relies on wait queue to be woken up if any variable that could change the result of the sleep condition. So when shutdown context is active, it needs to wake up threads waiting on shutdown notification else they will timeout and may delay the shutdown process. Change-Id: I11b97e4c65b434c5f35d455a5040f407a1460516 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* msm: mdss: handle timeouts from pan_idle and wait_for_kickoffUjwal Patel2016-03-23
| | | | | | | | | | | | | | | | | | mdss_fb_pan_idle and mdss_fb_wait_for_kickoff are used to hold the current context until it is safe to proceed. Unless shutdown is going on, these contexts are woken up by corresponding display thread responsible for committing a frame to display. Display thread has various delays like waiting for fences to be signalled, waiting for previous frame to finish or waiting for a vsync etc. Under normal circumstances, these delays are very negligible and different threads work in good harmony. However in a heavily loaded system or some bad thread which disables interrupts for a long time, these delays can become very large. Increase timeout to arbitrarily derived value and add error messaging when the timeout is observed. Remove panic from the timeout to let the system recover by itself. Change-Id: I58fe4c0d8b0c43998f87384035a1eacc24d7230a Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
* msm: mdss: Add MDSS version macro for msm8952Nitesh Gupta2016-03-23
| | | | | | | This change adds MDSS version macro for msm8952 Change-Id: I096833c36229f2d623ab7efdeaf43035e5254973 Signed-off-by: Nitesh Gupta <niteshg@codeaurora.org>
* mdss: mdp: add mixer roi to mdp dump debugfsTerence Hampson2016-03-23
| | | | | | | | | In situation such as partial update mixer's roi and total height and width are different. Adding roi information to increase debugging information. Change-Id: Iec7de7ae35e6d052d2e3c71d88bb8feba4da245d Signed-off-by: Terence Hampson <thampson@codeaurora.org>
* msm: mdss: add MDP DSC configurationKuogee Hsieh2016-03-23
| | | | | | | | | | Configure MDP DSC related registers when it enabled. It updates the PP, DSC block, configure PP block output to big endian and configure video timing with compressed width. Change-Id: I072aba1935cd36b5206bf56580416d470707fe1b Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* msm: mdss: add DSC parameters calculationKuogee Hsieh2016-03-23
| | | | | | | | | Add DSC run time parameters calculation base on some predefined parameters input from dtsi. Also configure DSI controller properly if it is enabled. Change-Id: I24b7a2cb829084f76a159b54170b87d051c9eac6 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* msm: mdss: add DSC offset parsing in mdss moduleKuogee Hsieh2016-03-23
| | | | | | | | | DSC (display stream compression) is the new module and supported starting MSM8996 target. Input offsets from dtsi so that registers belong to DSC can be configured. Change-Id: I3f06b1a2524bd0d2d408baac4309061f1f9117e8 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* msm: mdss: add panel on command support after te enableKuogee Hsieh2016-03-23
| | | | | | | | | | Few DSI panels have requirement of receiving display on command after receiving sleep out command and pixel stream data. This can be achieved by sending panel on command followed by timing engine enable. This change adds the support for such DSI panelS. Change-Id: Ifa225aec4ad9bfd692e19c02bcb726c8d60ce4fb Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
* msm: mdss: configure overfetch in software pixel extDhaval Patel2016-03-23
| | | | | | | | | | | | MDSS hardware accepts 0 or greater value for repeat pixel. However, if software tries to configure the negative value it leads to underrun due to large value. In such cases, software should configure the overfetch block which allows the negative value. CRs-fixed: 814452 Change-Id: I915a1f10951ae12d451cbf4a5fdff427174d32dc Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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