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* Merge branch 'next/devel-exynos5250-1' of ↵Arnd Bergmann2012-05-16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc2 * 'next/devel-exynos5250-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add AUXDATA for i2c controllers ARM: dts: Update device tree source files for EXYNOS5250 ARM: EXYNOS: Add device tree support for interrupt combiner ARM: EXYNOS: Add irq_domain support for interrupt combiner ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5 ARM: EXYNOS: update irqs for EXYNOS5250 SoC ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll ARM: EXYNOS: add GPC4 bank instance ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition ARM: EXYNOS: Modify the GIC physical address for static io-mapping ARM: EXYNOS: Add watchdog timer clock instance Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: EXYNOS: Add AUXDATA for i2c controllersThomas Abraham2012-05-16
| | | | | | | | | | | | | | | | Use AUXDATA to set the device names for controller instances discovered from device tree. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: dts: Update device tree source files for EXYNOS5250Thomas Abraham2012-05-16
| | | | | | | | | | | | | | | | | | Update EXYNOS5 device tree source files for EXYNOS5250 SoC. This includes new additions to the EXYNOS5 dtsi and SMDK5250 dts files and few minor fixes. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Add device tree support for interrupt combinerThomas Abraham2012-05-16
| | | | | | | | | | | | | | | | | | Add device tree based instantiation of the interrupt combiner controller. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Add irq_domain support for interrupt combinerThomas Abraham2012-05-16
| | | | | | | | | | | | | | | | | | | | | | Add irq_domain support for hardware interrupts of the interrupt combiner. The hardware interrupts of all the instances of the combiner are grouped in a single irq_domain. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5Thomas Abraham2012-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | A seperate bus_type instance is not required for EXYNOS5. The existing bus_type instance used with EXYNOS4 is sufficient for both EXYNOS4 and EXYNOS5. This also solves issue of uninitialized usage of exynos4_subsys in EXYNOS4 power management code that is reused for EXYNOS5 also. In addition to that, the existing exynos4_subsys bus_type is renamed to exynos_subsys to indicate that it is reused on both EXYNOS4 and EXYNOS5 platforms. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: update irqs for EXYNOS5250 SoCKukjin Kim2012-05-16
| | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpllKisoo Yu2012-05-16
| | | | | | | | | | | | | | | | | | | | | | The fout clock of BPLL and MPLL have a selectable source on EXYNOS5250. The clock options are a fixed divided by 2 clock and the output of the PLL itself. Add support for these new clock instances. Signed-off-by: Kisoo Yu <ksoo.yu@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> [kgene.kim@samsung.com: moved common pll stuff into s5p-clock.c] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: add GPC4 bank instanceSangsu Park2012-05-16
| | | | | | | | | | | | | | | | | | Add GPC4 bank instance which is included in rev1 of EXYNOS5. Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definitionChanghwan Youn2012-05-15
| | | | | | | | | | | | | | | | Redefine IRQ_MCT_L0,1 irq definition as it is changed in rev1 of EXYNOS5. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Modify the GIC physical address for static io-mappingChanghwan Youn2012-05-15
| | | | | | | | | | | | | | | | Adapt to changes in GIC physical address in rev1 of EXYNOS5. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: EXYNOS: Add watchdog timer clock instanceThomas Abraham2012-05-15
| | | | | | | | | | | | | | Add watchdog timer clock instance for EXYNOS5 watchdog controller. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * Merge branch 'next/cleanup-plat-s5p' into next/devel-exynos5250-1Kukjin Kim2012-05-15
| |\
* | \ Merge branch 'samsung/cleanup-plat-s5p' into next/soc2Arnd Bergmann2012-05-16
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| * | ARM: SAMSUNG: merge plat-s5p into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | | | | | | | | | | Since just plat-samsung can support all of Samsung stuff so that there is no more need to keep the plat-s5p for S5P SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move options for common s5p into plat-samsung/KconfigKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move setup code for s5p mfc and mipiphy into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move platform device for s5p uart into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move hr timer for common s5p into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move pm part for common s5p into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move interrupt part for common s5p into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: SAMSUNG: move clock part for common s5p into plat-samsungKukjin Kim2012-05-13
| | | | | | | | | | | | Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | Merge branch 'next/devel-samsung' of ↵Arnd Bergmann2012-05-15
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc2 * 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Support Suspend/Resume for EXYNOS4412 ARM: EXYNOS: To use common config for EXYNOS4 and EXYNOS5 SPI ARM: EXYNOS: Support DMA for EXYNOS5250 SoC ARM: EXYNOS: Add platform resource definitions for FIMC-LITE ARM: EXYNOS: add platform device for core DRM subsystem ARM: EXYNOS: add dts files to dtbs target spi/s3c64xx: Allow usage for ARCH_S3C24XX ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devices ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443 ARM: S3C24XX: Add forgotten clock lookup table to S3C2443 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: EXYNOS: Support Suspend/Resume for EXYNOS4412Inderpal Singh2012-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides the suspend/resume support for EXYNOS4412. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | Merge branch 'next/devel-s3c24xx-hsspi' into next/devel-samsungKukjin Kim2012-05-14
| |\ \ \
| | * | | spi/s3c64xx: Allow usage for ARCH_S3C24XXHeiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain hsspi-controllers compatible with the s3c64xx type. The previous patches enabled platform support for it, so make the driver also usable for the S3C24xx architecture. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driverHeiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This lets the s3c64xx-spi driver know the specifics of the controller- variant and also setups the gpios and the misccr bit. This setup is valid for all S3C24XX SoCs containing a HSSPI controller (i.e. S3C2416/2450 and S3C2443) Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spiHeiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently usable are busclk0 and busclk2. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devicesHeiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The S3C_PA_SPIx constants are only used by the s3c64xx-spi driver and don't conflict with the older SoCs as they don't support hsspi. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443Heiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoCs starting with the S3C2443 contain SPI controllers compatible with the spi-s3c64xx driver and therefore need separate dma channels for rx and tx. This patch introduces dma channel declarations for these and changes the dma-s3c2443.c accordingly. None of the older SoCs use the spi-dma at all. Most boards bitbang their spi use and the spi-s3c24xx driver also does not use the dma system. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S3C24XX: Add forgotten clock lookup table to S3C2443Heiko Stuebner2012-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten. As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | ARM: EXYNOS: To use common config for EXYNOS4 and EXYNOS5 SPIKyoungil Kim2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The naming EXYNOS4 is changed to EXYNOS for using shared SPI config of EXYNOS4 and EXYNOS5. And S3C64XX_DEV_SPIn configs are added to MACH_SMDK5250 config to use SPI on the EYXNOS5250. Signed-off-by: Kyoungil Kim <ki0351.kim@samsung.com> [kgene.kim@samsung.com: updated because of non-existing config] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | ARM: EXYNOS: Support DMA for EXYNOS5250 SoCBoojin Kim2012-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mach-exynos/dma.c is updated to support both exynos4 and exynos5. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | ARM: EXYNOS: Add platform resource definitions for FIMC-LITESylwester Nawrocki2012-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the gate clocks and register region address definition for FIMC-LITE devices available in EXYNOS4X12 SoCs. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | Merge branch 'next/devel-samsung-iommu' into next/devel-samsungKukjin Kim2012-05-12
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-exynos/Makefile
| * | | | | ARM: EXYNOS: add platform device for core DRM subsystemMarek Szyprowski2012-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform device for Exynos DRM core. This device is used for creating DRM user-space device and allocating memory for display buffers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: EXYNOS: add dts files to dtbs targetOlof Johansson2012-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the currently in-tree device tree sources to the dtbs target. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | | Merge branch 'exynos/iommu' into next/soc2Arnd Bergmann2012-05-15
|\ \ \ \ \ \ | | |/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | This is a dependency for the following samsung changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | iommu/exynos: Add iommu driver for EXYNOS PlatformsKyongHo Cho2012-05-12
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the System MMU driver and IOMMU API implementation for EXYNOS SoC platforms. EXYNOS platforms has more than 10 System MMUs dedicated for each multimedia accelerators. The System MMU driver is already in arc/arm/plat-s5p but it is moved to drivers/iommu due to Ohad Ben-Cohen gathered IOMMU drivers there. Any device driver in EXYNOS platforms that needs to control its System MMU must call platform_set_sysmmu() to inform System MMU driver who will control it. platform_set_sysmmu() is defined in <mach/sysmmu.h> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | ARM: EXYNOS: Change System MMU platform device definitionsKyongHo Cho2012-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Handling System MMUs with an identifier is not flexible to manage System MMU platform devices because of the following reasons: 1. A device driver which needs to handle System MMU must know the ID. 2. A System MMU may not present in some implementations of Exynos family. 3. Handling System MMU with IOMMU API does not require an ID. This patch is the result of removing ID of System MMUs. Instead, a device driver that needs to handle its System MMU must use IOMMU API while its descriptor of platform device is given. This patch also includes the following enhancements: - A System MMU device becomes a child if its power domain device. - clkdev Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | S5P: SYSMMU: Remove System MMU device driverKyongHo Cho2012-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes System MMU device driver from arm/plat-s5p tree for transition to implement IOMMU driver. Although controlling System MMU in this removing driver is similar to the new IOMMU driver in the following patch, the new one is almost rewrite of this driver and there is no benefit to moving the driver file from arch/arm/ to drivers/iommu. Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | Merge branch 'spear/13xx' into next/soc2Arnd Bergmann2012-05-14
|\ \ \ \ \ | |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * spear/13xx: pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res SPEAr: Update MAINTAINERS and Documentation SPEAr13xx: Add defconfig SPEAr13xx: Add compilation support SPEAr13xx: Add dts and dtsi files pinctrl: Add SPEAr13xx pinctrl drivers pinctrl: SPEAr: Create macro for declaring GPIO PINS SPEAr13xx: Add common clock framework support SPEAr13xx: Add source files SPEAr13xx: Add header files Depends on clock, pinctrl and dt branches to go first. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | pinctrl: SPEAr1310: Fix pin numbers for clcd_high_resViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | SPEAr: Update MAINTAINERS and DocumentationViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset updates MAINTAINERS files, makes shiraz as second Maintainer for SPEAr SoCs. It also updates Documentation mostly for SPEAr13xx. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
| * | | | SPEAr13xx: Add defconfigViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
| * | | | SPEAr13xx: Add compilation supportViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
| * | | | SPEAr13xx: Add dts and dtsi filesViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds machines/boards dts{i} files for SPEAr1310 and SPEAr1340. Both are based on ARM, Cortex A9 processor family. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
| * | | | pinctrl: Add SPEAr13xx pinctrl driversViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two machines: SPEAr1310 and SPEAr1340. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: SPEAr: Create macro for declaring GPIO PINSViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Same GPIO pins declarations would be required for other SoCs and that will be a lot of lines of code. Its better to create common macros for it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | SPEAr13xx: Add common clock framework supportViresh Kumar2012-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPEAr1310 and SPEAr1340's clock framework support. It is based on earlier support for SPEAr3xx family. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@ti.com>
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