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-rw-r--r--include/drm/drm_crtc.h2
-rw-r--r--include/dt-bindings/clock/audio-ext-clk.h12
-rw-r--r--include/dt-bindings/clock/mdss-pll-clk.h9
-rw-r--r--include/dt-bindings/clock/qcom,gcc-sdm660.h7
-rw-r--r--include/dt-bindings/clock/qcom,mmcc-msm8996.h485
-rw-r--r--include/linux/blk_types.h13
-rw-r--r--include/linux/cpumask.h2
-rw-r--r--include/linux/iio/consumer.h10
-rw-r--r--include/linux/ipa.h4
-rw-r--r--include/linux/irq.h11
-rw-r--r--include/linux/leds.h1
-rw-r--r--include/linux/mdss_io_util.h3
-rw-r--r--include/linux/mdss_smmu_ext.h53
-rw-r--r--include/linux/mfd/wcd9xxx/core.h3
-rw-r--r--include/linux/mmc/host.h2
-rw-r--r--include/linux/mmc/ring_buffer.h55
-rw-r--r--include/linux/msm_ext_display.h15
-rw-r--r--include/linux/msm_gsi.h21
-rw-r--r--include/linux/pfk.h6
-rw-r--r--include/linux/pid.h4
-rw-r--r--include/linux/power_supply.h25
-rw-r--r--include/linux/qcom_tspp.h11
-rw-r--r--include/linux/qdsp6v2/apr_tal.h3
-rw-r--r--include/linux/qdsp6v2/rtac.h4
-rw-r--r--include/linux/regulator/qpnp-regulator.h6
-rw-r--r--include/linux/sched.h21
-rw-r--r--include/linux/sched/sysctl.h9
-rw-r--r--include/linux/thermal.h1
-rw-r--r--include/linux/usb/ccid_desc.h112
-rw-r--r--include/linux/usb/composite.h2
-rw-r--r--include/linux/usb/xhci_pdriver.h4
-rw-r--r--include/net/cfg80211.h65
-rw-r--r--include/net/mac80211.h77
-rw-r--r--include/soc/qcom/cx_ipeak.h46
-rw-r--r--include/soc/qcom/icnss.h13
-rw-r--r--include/soc/qcom/qseecomi.h5
-rw-r--r--include/soc/qcom/service-notifier.h11
-rw-r--r--include/sound/apr_audio-v2.h431
-rw-r--r--include/sound/cpe_core.h4
-rw-r--r--include/sound/jack.h12
-rw-r--r--include/sound/q6adm-v2.h13
-rw-r--r--include/sound/q6afe-v2.h11
-rw-r--r--include/sound/q6asm-v2.h18
-rw-r--r--include/sound/q6lsm.h71
-rw-r--r--include/trace/events/power.h2
-rw-r--r--include/trace/events/sched.h97
-rw-r--r--include/uapi/drm/Kbuild2
-rw-r--r--include/uapi/drm/drm_fourcc.h8
-rw-r--r--include/uapi/drm/drm_mode.h2
-rw-r--r--include/uapi/drm/msm_drm.h54
-rw-r--r--include/uapi/drm/msm_drm_pp.h82
-rw-r--r--include/uapi/drm/sde_drm.h298
-rw-r--r--include/uapi/linux/android/binder.h104
-rw-r--r--include/uapi/linux/dvb/dmx.h3
-rw-r--r--include/uapi/linux/msm_audio_calibration.h27
-rw-r--r--include/uapi/linux/msm_ipa.h4
-rw-r--r--include/uapi/linux/msm_mdp.h1
-rw-r--r--include/uapi/linux/msm_mdp_ext.h106
-rw-r--r--include/uapi/linux/nl80211.h83
-rw-r--r--include/uapi/linux/v4l2-controls.h3
-rw-r--r--include/uapi/media/msm_vidc.h2
-rw-r--r--include/uapi/sound/compress_params.h10
-rw-r--r--include/uapi/sound/lsm_params.h51
-rw-r--r--include/uapi/video/msm_hdmi_modes.h13
64 files changed, 2220 insertions, 425 deletions
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 3f0c6909dda1..aab1530661a5 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -61,7 +61,7 @@ struct drm_mode_object {
struct drm_object_properties *properties;
};
-#define DRM_OBJECT_MAX_PROPERTY 24
+#define DRM_OBJECT_MAX_PROPERTY 64
struct drm_object_properties {
int count, atomic_count;
/* NOTE: if we ever start dynamically destroying properties (ie.
diff --git a/include/dt-bindings/clock/audio-ext-clk.h b/include/dt-bindings/clock/audio-ext-clk.h
index a384ddf68ea0..6fe8a466cf0e 100644
--- a/include/dt-bindings/clock/audio-ext-clk.h
+++ b/include/dt-bindings/clock/audio-ext-clk.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,11 +15,11 @@
/* Audio External Clocks */
#define AUDIO_PMI_CLK 0
-#define AUDIO_PMIC_LNBB_CLK 1
-#define AUDIO_AP_CLK 2
-#define AUDIO_AP_CLK2 3
-#define AUDIO_LPASS_MCLK 4
-#define AUDIO_LPASS_MCLK2 5
+#define AUDIO_PMIC_LNBB_CLK 0
+#define AUDIO_AP_CLK 1
+#define AUDIO_AP_CLK2 2
+#define AUDIO_LPASS_MCLK 3
+#define AUDIO_LPASS_MCLK2 4
#define clk_audio_ap_clk 0x9b5727cb
#define clk_audio_pmi_clk 0xcbfe416d
diff --git a/include/dt-bindings/clock/mdss-pll-clk.h b/include/dt-bindings/clock/mdss-pll-clk.h
index 8cd0b2a9bc98..9015b4c0e1c9 100644
--- a/include/dt-bindings/clock/mdss-pll-clk.h
+++ b/include/dt-bindings/clock/mdss-pll-clk.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,4 +39,11 @@
#define SHADOW_POST_N1_DIV_1_CLK 22
#define SHADOW_VCO_CLK_1_CLK 23
+/* DP PLL clocks */
+#define DP_VCO_CLK 0
+#define DP_LINK_2X_CLK_DIVSEL_FIVE 1
+#define DP_VCO_DIVSEL_FOUR_CLK_SRC 2
+#define DP_VCO_DIVSEL_TWO_CLK_SRC 3
+#define DP_VCO_DIVIDED_CLK_SRC_MUX 4
+
#endif
diff --git a/include/dt-bindings/clock/qcom,gcc-sdm660.h b/include/dt-bindings/clock/qcom,gcc-sdm660.h
index 4bf87f6c08bf..cd5b78e59c5b 100644
--- a/include/dt-bindings/clock/qcom,gcc-sdm660.h
+++ b/include/dt-bindings/clock/qcom,gcc-sdm660.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -77,11 +77,9 @@
#define GCC_GP2_CLK 62
#define GCC_GP3_CLK 63
#define GCC_GPU_BIMC_GFX_CLK 64
-#define GCC_GPU_BIMC_GFX_SRC_CLK 65
#define GCC_GPU_CFG_AHB_CLK 66
#define GCC_GPU_GPLL0_CLK 67
#define GCC_GPU_GPLL0_DIV_CLK 68
-#define GCC_GPU_SNOC_DVM_GFX_CLK 69
#define GCC_HMSS_AHB_CLK 70
#define GCC_HMSS_DVM_BUS_CLK 71
#define GCC_HMSS_RBCPR_CLK 72
@@ -101,7 +99,6 @@
#define GCC_QSPI_SER_CLK 86
#define GCC_RX0_USB2_CLKREF_CLK 87
#define GCC_RX1_USB2_CLKREF_CLK 88
-#define GCC_RX2_QLINK_CLKREF_CLK 89
#define GCC_SDCC1_AHB_CLK 90
#define GCC_SDCC1_APPS_CLK 91
#define GCC_SDCC1_ICE_CORE_CLK 92
@@ -134,7 +131,7 @@
#define GPLL0_OUT_AUX2 119
#define GPLL0_OUT_EARLY 120
#define GPLL0_OUT_MAIN 121
-#define GPLL0_OUT_TEST 122
+#define GPLL0_AO 122
#define GPLL1 123
#define GPLL1_OUT_AUX 124
#define GPLL1_OUT_AUX2 125
diff --git a/include/dt-bindings/clock/qcom,mmcc-msm8996.h b/include/dt-bindings/clock/qcom,mmcc-msm8996.h
index f924b92b0188..436badbaad7d 100644
--- a/include/dt-bindings/clock/qcom,mmcc-msm8996.h
+++ b/include/dt-bindings/clock/qcom,mmcc-msm8996.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,213 +14,177 @@
#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8996_H
#define _DT_BINDINGS_CLK_MSM_MMCC_8996_H
-#define MMPLL0_EARLY 0
-#define MMPLL0_PLL 1
-#define MMPLL1_EARLY 2
-#define MMPLL1_PLL 3
-#define MMPLL2_EARLY 4
-#define MMPLL2_PLL 5
-#define MMPLL3_EARLY 6
-#define MMPLL3_PLL 7
-#define MMPLL4_EARLY 8
-#define MMPLL4_PLL 9
-#define MMPLL5_EARLY 10
-#define MMPLL5_PLL 11
-#define MMPLL8_EARLY 12
-#define MMPLL8_PLL 13
-#define MMPLL9_EARLY 14
-#define MMPLL9_PLL 15
-#define AHB_CLK_SRC 16
-#define AXI_CLK_SRC 17
-#define MAXI_CLK_SRC 18
-#define DSA_CORE_CLK_SRC 19
-#define GFX3D_CLK_SRC 20
-#define RBBMTIMER_CLK_SRC 21
-#define ISENSE_CLK_SRC 22
-#define RBCPR_CLK_SRC 23
-#define VIDEO_CORE_CLK_SRC 24
-#define VIDEO_SUBCORE0_CLK_SRC 25
-#define VIDEO_SUBCORE1_CLK_SRC 26
-#define PCLK0_CLK_SRC 27
-#define PCLK1_CLK_SRC 28
-#define MDP_CLK_SRC 29
-#define EXTPCLK_CLK_SRC 30
-#define VSYNC_CLK_SRC 31
-#define HDMI_CLK_SRC 32
-#define BYTE0_CLK_SRC 33
-#define BYTE1_CLK_SRC 34
-#define ESC0_CLK_SRC 35
-#define ESC1_CLK_SRC 36
-#define CAMSS_GP0_CLK_SRC 37
-#define CAMSS_GP1_CLK_SRC 38
-#define MCLK0_CLK_SRC 39
-#define MCLK1_CLK_SRC 40
-#define MCLK2_CLK_SRC 41
-#define MCLK3_CLK_SRC 42
-#define CCI_CLK_SRC 43
-#define CSI0PHYTIMER_CLK_SRC 44
-#define CSI1PHYTIMER_CLK_SRC 45
-#define CSI2PHYTIMER_CLK_SRC 46
-#define CSIPHY0_3P_CLK_SRC 47
-#define CSIPHY1_3P_CLK_SRC 48
-#define CSIPHY2_3P_CLK_SRC 49
-#define JPEG0_CLK_SRC 50
-#define JPEG2_CLK_SRC 51
-#define JPEG_DMA_CLK_SRC 52
-#define VFE0_CLK_SRC 53
-#define VFE1_CLK_SRC 54
-#define CPP_CLK_SRC 55
-#define CSI0_CLK_SRC 56
-#define CSI1_CLK_SRC 57
-#define CSI2_CLK_SRC 58
-#define CSI3_CLK_SRC 59
-#define FD_CORE_CLK_SRC 60
-#define MMSS_CXO_CLK 61
-#define MMSS_SLEEPCLK_CLK 62
-#define MMSS_MMAGIC_AHB_CLK 63
-#define MMSS_MMAGIC_CFG_AHB_CLK 64
-#define MMSS_MISC_AHB_CLK 65
-#define MMSS_MISC_CXO_CLK 66
-#define MMSS_BTO_AHB_CLK 67
-#define MMSS_MMAGIC_AXI_CLK 68
-#define MMSS_S0_AXI_CLK 69
+/* Hardware/Dummy/Voter clocks */
+#define GPLL0_DIV 0
+#define MDSS_MDP_VOTE_CLK 1
+#define MDSS_ROTATOR_VOTE_CLK 2
+
+/* RCG and Branches */
+#define MMPLL0_EARLY 10
+#define MMPLL0_PLL 11
+#define MMPLL1_EARLY 12
+#define MMPLL1_PLL 13
+#define MMPLL2_EARLY 14
+#define MMPLL2_PLL 15
+#define MMPLL3_EARLY 16
+#define MMPLL3_PLL 17
+#define MMPLL4_EARLY 18
+#define MMPLL4_PLL 19
+#define MMPLL5_EARLY 20
+#define MMPLL5_PLL 21
+#define MMPLL8_EARLY 22
+#define MMPLL8_PLL 23
+#define MMPLL9_EARLY 24
+#define MMPLL9_PLL 25
+#define AHB_CLK_SRC 26
+#define MAXI_CLK_SRC 27
+#define RBCPR_CLK_SRC 28
+#define VIDEO_CORE_CLK_SRC 29
+#define VIDEO_SUBCORE0_CLK_SRC 30
+#define VIDEO_SUBCORE1_CLK_SRC 31
+#define PCLK0_CLK_SRC 32
+#define PCLK1_CLK_SRC 33
+#define MDP_CLK_SRC 34
+#define EXTPCLK_CLK_SRC 35
+#define VSYNC_CLK_SRC 36
+#define HDMI_CLK_SRC 37
+#define BYTE0_CLK_SRC 38
+#define BYTE1_CLK_SRC 39
+#define ESC0_CLK_SRC 40
+#define ESC1_CLK_SRC 41
+#define CAMSS_GP0_CLK_SRC 42
+#define CAMSS_GP1_CLK_SRC 43
+#define MCLK0_CLK_SRC 44
+#define MCLK1_CLK_SRC 45
+#define MCLK2_CLK_SRC 46
+#define MCLK3_CLK_SRC 47
+#define CCI_CLK_SRC 48
+#define CSI0PHYTIMER_CLK_SRC 49
+#define CSI1PHYTIMER_CLK_SRC 50
+#define CSI2PHYTIMER_CLK_SRC 51
+#define CSIPHY0_3P_CLK_SRC 52
+#define CSIPHY1_3P_CLK_SRC 53
+#define CSIPHY2_3P_CLK_SRC 54
+#define JPEG0_CLK_SRC 55
+#define JPEG2_CLK_SRC 56
+#define JPEG_DMA_CLK_SRC 57
+#define VFE0_CLK_SRC 58
+#define VFE1_CLK_SRC 59
+#define CPP_CLK_SRC 60
+#define CSI0_CLK_SRC 61
+#define CSI1_CLK_SRC 62
+#define CSI2_CLK_SRC 63
+#define CSI3_CLK_SRC 64
+#define FD_CORE_CLK_SRC 65
+#define MMSS_MMAGIC_AHB_CLK 66
+#define MMSS_MMAGIC_CFG_AHB_CLK 67
+#define MMSS_MISC_AHB_CLK 68
+#define MMSS_MISC_CXO_CLK 69
#define MMSS_MMAGIC_MAXI_CLK 70
-#define DSA_CORE_CLK 71
-#define DSA_NOC_CFG_AHB_CLK 72
-#define MMAGIC_CAMSS_AXI_CLK 73
-#define MMAGIC_CAMSS_NOC_CFG_AHB_CLK 74
-#define THROTTLE_CAMSS_CXO_CLK 75
-#define THROTTLE_CAMSS_AHB_CLK 76
-#define THROTTLE_CAMSS_AXI_CLK 77
-#define SMMU_VFE_AHB_CLK 78
-#define SMMU_VFE_AXI_CLK 79
-#define SMMU_CPP_AHB_CLK 80
-#define SMMU_CPP_AXI_CLK 81
-#define SMMU_JPEG_AHB_CLK 82
-#define SMMU_JPEG_AXI_CLK 83
-#define MMAGIC_MDSS_AXI_CLK 84
-#define MMAGIC_MDSS_NOC_CFG_AHB_CLK 85
-#define THROTTLE_MDSS_CXO_CLK 86
-#define THROTTLE_MDSS_AHB_CLK 87
-#define THROTTLE_MDSS_AXI_CLK 88
-#define SMMU_ROT_AHB_CLK 89
-#define SMMU_ROT_AXI_CLK 90
-#define SMMU_MDP_AHB_CLK 91
-#define SMMU_MDP_AXI_CLK 92
-#define MMAGIC_VIDEO_AXI_CLK 93
-#define MMAGIC_VIDEO_NOC_CFG_AHB_CLK 94
-#define THROTTLE_VIDEO_CXO_CLK 95
-#define THROTTLE_VIDEO_AHB_CLK 96
-#define THROTTLE_VIDEO_AXI_CLK 97
-#define SMMU_VIDEO_AHB_CLK 98
-#define SMMU_VIDEO_AXI_CLK 99
-#define MMAGIC_BIMC_AXI_CLK 100
-#define MMAGIC_BIMC_NOC_CFG_AHB_CLK 101
-#define GPU_GX_GFX3D_CLK 102
-#define GPU_GX_RBBMTIMER_CLK 103
-#define GPU_AHB_CLK 104
-#define GPU_AON_ISENSE_CLK 105
-#define VMEM_MAXI_CLK 106
-#define VMEM_AHB_CLK 107
-#define MMSS_RBCPR_CLK 108
-#define MMSS_RBCPR_AHB_CLK 109
-#define VIDEO_CORE_CLK 110
-#define VIDEO_AXI_CLK 111
-#define VIDEO_MAXI_CLK 112
-#define VIDEO_AHB_CLK 113
-#define VIDEO_SUBCORE0_CLK 114
-#define VIDEO_SUBCORE1_CLK 115
-#define MDSS_AHB_CLK 116
-#define MDSS_HDMI_AHB_CLK 117
-#define MDSS_AXI_CLK 118
-#define MDSS_PCLK0_CLK 119
-#define MDSS_PCLK1_CLK 120
-#define MDSS_MDP_CLK 121
-#define MDSS_EXTPCLK_CLK 122
-#define MDSS_VSYNC_CLK 123
-#define MDSS_HDMI_CLK 124
-#define MDSS_BYTE0_CLK 125
-#define MDSS_BYTE1_CLK 126
-#define MDSS_ESC0_CLK 127
-#define MDSS_ESC1_CLK 128
-#define CAMSS_TOP_AHB_CLK 129
-#define CAMSS_AHB_CLK 130
-#define CAMSS_MICRO_AHB_CLK 131
-#define CAMSS_GP0_CLK 132
-#define CAMSS_GP1_CLK 133
-#define CAMSS_MCLK0_CLK 134
-#define CAMSS_MCLK1_CLK 135
-#define CAMSS_MCLK2_CLK 136
-#define CAMSS_MCLK3_CLK 137
-#define CAMSS_CCI_CLK 138
-#define CAMSS_CCI_AHB_CLK 139
-#define CAMSS_CSI0PHYTIMER_CLK 140
-#define CAMSS_CSI1PHYTIMER_CLK 141
-#define CAMSS_CSI2PHYTIMER_CLK 142
-#define CAMSS_CSIPHY0_3P_CLK 143
-#define CAMSS_CSIPHY1_3P_CLK 144
-#define CAMSS_CSIPHY2_3P_CLK 145
-#define CAMSS_JPEG0_CLK 146
-#define CAMSS_JPEG2_CLK 147
-#define CAMSS_JPEG_DMA_CLK 148
-#define CAMSS_JPEG_AHB_CLK 149
-#define CAMSS_JPEG_AXI_CLK 150
-#define CAMSS_VFE_AHB_CLK 151
-#define CAMSS_VFE_AXI_CLK 152
-#define CAMSS_VFE0_CLK 153
-#define CAMSS_VFE0_STREAM_CLK 154
-#define CAMSS_VFE0_AHB_CLK 155
-#define CAMSS_VFE1_CLK 156
-#define CAMSS_VFE1_STREAM_CLK 157
-#define CAMSS_VFE1_AHB_CLK 158
-#define CAMSS_CSI_VFE0_CLK 159
-#define CAMSS_CSI_VFE1_CLK 160
-#define CAMSS_CPP_VBIF_AHB_CLK 161
-#define CAMSS_CPP_AXI_CLK 162
-#define CAMSS_CPP_CLK 163
-#define CAMSS_CPP_AHB_CLK 164
-#define CAMSS_CSI0_CLK 165
-#define CAMSS_CSI0_AHB_CLK 166
-#define CAMSS_CSI0PHY_CLK 167
-#define CAMSS_CSI0RDI_CLK 168
-#define CAMSS_CSI0PIX_CLK 169
-#define CAMSS_CSI1_CLK 170
-#define CAMSS_CSI1_AHB_CLK 171
-#define CAMSS_CSI1PHY_CLK 172
-#define CAMSS_CSI1RDI_CLK 173
-#define CAMSS_CSI1PIX_CLK 174
-#define CAMSS_CSI2_CLK 175
-#define CAMSS_CSI2_AHB_CLK 176
-#define CAMSS_CSI2PHY_CLK 177
-#define CAMSS_CSI2RDI_CLK 178
-#define CAMSS_CSI2PIX_CLK 179
-#define CAMSS_CSI3_CLK 180
-#define CAMSS_CSI3_AHB_CLK 181
-#define CAMSS_CSI3PHY_CLK 182
-#define CAMSS_CSI3RDI_CLK 183
-#define CAMSS_CSI3PIX_CLK 184
-#define CAMSS_ISPIF_AHB_CLK 185
-#define FD_CORE_CLK 186
-#define FD_CORE_UAR_CLK 187
-#define FD_AHB_CLK 188
-#define MMSS_SPDM_CSI0_CLK 189
-#define MMSS_SPDM_JPEG_DMA_CLK 190
-#define MMSS_SPDM_CPP_CLK 191
-#define MMSS_SPDM_PCLK0_CLK 192
-#define MMSS_SPDM_AHB_CLK 193
-#define MMSS_SPDM_GFX3D_CLK 194
-#define MMSS_SPDM_PCLK1_CLK 195
-#define MMSS_SPDM_JPEG2_CLK 196
-#define MMSS_SPDM_DEBUG_CLK 197
-#define MMSS_SPDM_VFE1_CLK 198
-#define MMSS_SPDM_VFE0_CLK 199
-#define MMSS_SPDM_VIDEO_CORE_CLK 200
-#define MMSS_SPDM_AXI_CLK 201
-#define MMSS_SPDM_MDP_CLK 202
-#define MMSS_SPDM_JPEG0_CLK 203
-#define MMSS_SPDM_RM_AXI_CLK 204
-#define MMSS_SPDM_RM_MAXI_CLK 205
+#define MMAGIC_CAMSS_AXI_CLK 71
+#define MMAGIC_CAMSS_NOC_CFG_AHB_CLK 72
+#define SMMU_VFE_AHB_CLK 73
+#define SMMU_VFE_AXI_CLK 74
+#define SMMU_CPP_AHB_CLK 75
+#define SMMU_CPP_AXI_CLK 76
+#define SMMU_JPEG_AHB_CLK 77
+#define SMMU_JPEG_AXI_CLK 78
+#define MMAGIC_MDSS_AXI_CLK 79
+#define MMAGIC_MDSS_NOC_CFG_AHB_CLK 80
+#define SMMU_ROT_AHB_CLK 81
+#define SMMU_ROT_AXI_CLK 82
+#define SMMU_MDP_AHB_CLK 83
+#define SMMU_MDP_AXI_CLK 84
+#define MMAGIC_VIDEO_AXI_CLK 85
+#define MMAGIC_VIDEO_NOC_CFG_AHB_CLK 86
+#define SMMU_VIDEO_AHB_CLK 87
+#define SMMU_VIDEO_AXI_CLK 88
+#define MMAGIC_BIMC_NOC_CFG_AHB_CLK 89
+#define VMEM_MAXI_CLK 90
+#define VMEM_AHB_CLK 91
+#define MMSS_RBCPR_CLK 92
+#define MMSS_RBCPR_AHB_CLK 93
+#define VIDEO_CORE_CLK 94
+#define VIDEO_AXI_CLK 95
+#define VIDEO_MAXI_CLK 96
+#define VIDEO_AHB_CLK 97
+#define VIDEO_SUBCORE0_CLK 98
+#define VIDEO_SUBCORE1_CLK 99
+#define MDSS_AHB_CLK 100
+#define MDSS_HDMI_AHB_CLK 101
+#define MDSS_AXI_CLK 102
+#define MDSS_PCLK0_CLK 103
+#define MDSS_PCLK1_CLK 104
+#define MDSS_MDP_CLK 105
+#define MDSS_EXTPCLK_CLK 106
+#define MDSS_VSYNC_CLK 107
+#define MDSS_HDMI_CLK 108
+#define MDSS_BYTE0_CLK 109
+#define MDSS_BYTE1_CLK 110
+#define MDSS_ESC0_CLK 111
+#define MDSS_ESC1_CLK 112
+#define CAMSS_TOP_AHB_CLK 113
+#define CAMSS_AHB_CLK 114
+#define CAMSS_MICRO_AHB_CLK 115
+#define CAMSS_GP0_CLK 116
+#define CAMSS_GP1_CLK 117
+#define CAMSS_MCLK0_CLK 118
+#define CAMSS_MCLK1_CLK 119
+#define CAMSS_MCLK2_CLK 120
+#define CAMSS_MCLK3_CLK 121
+#define CAMSS_CCI_CLK 122
+#define CAMSS_CCI_AHB_CLK 123
+#define CAMSS_CSI0PHYTIMER_CLK 124
+#define CAMSS_CSI1PHYTIMER_CLK 125
+#define CAMSS_CSI2PHYTIMER_CLK 126
+#define CAMSS_CSIPHY0_3P_CLK 127
+#define CAMSS_CSIPHY1_3P_CLK 128
+#define CAMSS_CSIPHY2_3P_CLK 129
+#define CAMSS_JPEG0_CLK 130
+#define CAMSS_JPEG2_CLK 131
+#define CAMSS_JPEG_DMA_CLK 132
+#define CAMSS_JPEG_AHB_CLK 133
+#define CAMSS_JPEG_AXI_CLK 134
+#define CAMSS_VFE_AHB_CLK 135
+#define CAMSS_VFE_AXI_CLK 136
+#define CAMSS_VFE0_CLK 137
+#define CAMSS_VFE0_STREAM_CLK 138
+#define CAMSS_VFE0_AHB_CLK 139
+#define CAMSS_VFE1_CLK 140
+#define CAMSS_VFE1_STREAM_CLK 141
+#define CAMSS_VFE1_AHB_CLK 142
+#define CAMSS_CSI_VFE0_CLK 143
+#define CAMSS_CSI_VFE1_CLK 144
+#define CAMSS_CPP_VBIF_AHB_CLK 145
+#define CAMSS_CPP_AXI_CLK 146
+#define CAMSS_CPP_CLK 147
+#define CAMSS_CPP_AHB_CLK 148
+#define CAMSS_CSI0_CLK 149
+#define CAMSS_CSI0_AHB_CLK 150
+#define CAMSS_CSI0PHY_CLK 151
+#define CAMSS_CSI0RDI_CLK 152
+#define CAMSS_CSI0PIX_CLK 153
+#define CAMSS_CSI1_CLK 154
+#define CAMSS_CSI1_AHB_CLK 155
+#define CAMSS_CSI1PHY_CLK 156
+#define CAMSS_CSI1RDI_CLK 157
+#define CAMSS_CSI1PIX_CLK 158
+#define CAMSS_CSI2_CLK 159
+#define CAMSS_CSI2_AHB_CLK 160
+#define CAMSS_CSI2PHY_CLK 161
+#define CAMSS_CSI2RDI_CLK 162
+#define CAMSS_CSI2PIX_CLK 163
+#define CAMSS_CSI3_CLK 164
+#define CAMSS_CSI3_AHB_CLK 165
+#define CAMSS_CSI3PHY_CLK 166
+#define CAMSS_CSI3RDI_CLK 167
+#define CAMSS_CSI3PIX_CLK 168
+#define CAMSS_ISPIF_AHB_CLK 169
+#define FD_CORE_CLK 170
+#define FD_CORE_UAR_CLK 171
+#define FD_AHB_CLK 172
+/* Block resets */
#define MMAGICAHB_BCR 0
#define MMAGIC_CFG_BCR 1
#define MISC_BCR 2
@@ -241,63 +205,60 @@
#define THROTTLE_VIDEO_BCR 17
#define SMMU_VIDEO_BCR 18
#define MMAGIC_BIMC_BCR 19
-#define GPU_GX_BCR 20
-#define GPU_BCR 21
-#define GPU_AON_BCR 22
-#define VMEM_BCR 23
-#define MMSS_RBCPR_BCR 24
-#define VIDEO_BCR 25
-#define MDSS_BCR 26
-#define CAMSS_TOP_BCR 27
-#define CAMSS_AHB_BCR 28
-#define CAMSS_MICRO_BCR 29
-#define CAMSS_CCI_BCR 30
-#define CAMSS_PHY0_BCR 31
-#define CAMSS_PHY1_BCR 32
-#define CAMSS_PHY2_BCR 33
-#define CAMSS_CSIPHY0_3P_BCR 34
-#define CAMSS_CSIPHY1_3P_BCR 35
-#define CAMSS_CSIPHY2_3P_BCR 36
-#define CAMSS_JPEG_BCR 37
-#define CAMSS_VFE_BCR 38
-#define CAMSS_VFE0_BCR 39
-#define CAMSS_VFE1_BCR 40
-#define CAMSS_CSI_VFE0_BCR 41
-#define CAMSS_CSI_VFE1_BCR 42
-#define CAMSS_CPP_TOP_BCR 43
-#define CAMSS_CPP_BCR 44
-#define CAMSS_CSI0_BCR 45
-#define CAMSS_CSI0RDI_BCR 46
-#define CAMSS_CSI0PIX_BCR 47
-#define CAMSS_CSI1_BCR 48
-#define CAMSS_CSI1RDI_BCR 49
-#define CAMSS_CSI1PIX_BCR 50
-#define CAMSS_CSI2_BCR 51
-#define CAMSS_CSI2RDI_BCR 52
-#define CAMSS_CSI2PIX_BCR 53
-#define CAMSS_CSI3_BCR 54
-#define CAMSS_CSI3RDI_BCR 55
-#define CAMSS_CSI3PIX_BCR 56
-#define CAMSS_ISPIF_BCR 57
-#define FD_BCR 58
-#define MMSS_SPDM_RM_BCR 59
+#define VMEM_BCR 20
+#define MMSS_RBCPR_BCR 21
+#define VIDEO_BCR 22
+#define MDSS_BCR 23
+#define CAMSS_TOP_BCR 24
+#define CAMSS_AHB_BCR 25
+#define CAMSS_MICRO_BCR 26
+#define CAMSS_CCI_BCR 27
+#define CAMSS_PHY0_BCR 28
+#define CAMSS_PHY1_BCR 29
+#define CAMSS_PHY2_BCR 30
+#define CAMSS_CSIPHY0_3P_BCR 31
+#define CAMSS_CSIPHY1_3P_BCR 32
+#define CAMSS_CSIPHY2_3P_BCR 33
+#define CAMSS_JPEG_BCR 34
+#define CAMSS_VFE_BCR 35
+#define CAMSS_VFE0_BCR 36
+#define CAMSS_VFE1_BCR 37
+#define CAMSS_CSI_VFE0_BCR 38
+#define CAMSS_CSI_VFE1_BCR 39
+#define CAMSS_CPP_TOP_BCR 40
+#define CAMSS_CPP_BCR 41
+#define CAMSS_CSI0_BCR 42
+#define CAMSS_CSI0RDI_BCR 43
+#define CAMSS_CSI0PIX_BCR 44
+#define CAMSS_CSI1_BCR 45
+#define CAMSS_CSI1RDI_BCR 46
+#define CAMSS_CSI1PIX_BCR 47
+#define CAMSS_CSI2_BCR 48
+#define CAMSS_CSI2RDI_BCR 49
+#define CAMSS_CSI2PIX_BCR 50
+#define CAMSS_CSI3_BCR 51
+#define CAMSS_CSI3RDI_BCR 52
+#define CAMSS_CSI3PIX_BCR 53
+#define CAMSS_ISPIF_BCR 54
+#define FD_BCR 55
+#define MMSS_SPDM_RM_BCR 56
/* Indexes for GDSCs */
-#define MMAGIC_VIDEO_GDSC 0
-#define MMAGIC_MDSS_GDSC 1
-#define MMAGIC_CAMSS_GDSC 2
-#define GPU_GDSC 3
-#define VENUS_GDSC 4
-#define VENUS_CORE0_GDSC 5
-#define VENUS_CORE1_GDSC 6
-#define CAMSS_GDSC 7
-#define VFE0_GDSC 8
-#define VFE1_GDSC 9
-#define JPEG_GDSC 10
-#define CPP_GDSC 11
-#define FD_GDSC 12
-#define MDSS_GDSC 13
-#define GPU_GX_GDSC 14
-#define MMAGIC_BIMC_GDSC 15
+#define MMAGIC_VIDEO_GDSC 0
+#define MMAGIC_MDSS_GDSC 1
+#define MMAGIC_CAMSS_GDSC 2
+#define GPU_GDSC 3
+#define VENUS_GDSC 4
+#define VENUS_CORE0_GDSC 5
+#define VENUS_CORE1_GDSC 6
+#define CAMSS_GDSC 7
+#define VFE0_GDSC 8
+#define VFE1_GDSC 9
+#define JPEG_GDSC 10
+#define CPP_GDSC 11
+#define FD_GDSC 12
+#define MDSS_GDSC 13
+#define GPU_GX_GDSC 14
+#define MMAGIC_BIMC_GDSC 15
#endif
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index da8ca5a7da58..6d73a04d0150 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -39,6 +39,15 @@ struct bvec_iter {
current bvec */
};
+#ifdef CONFIG_BLOCK_PERF_FRAMEWORK
+/* Double declaration from ktime.h so as to not break the include dependency
+ * chain. Should be kept up to date.
+ */
+union blk_ktime {
+ s64 tv64;
+};
+#endif
+
/*
* main unit of I/O for the block layer and lower layers (ie drivers and
* stacking drivers)
@@ -54,6 +63,10 @@ struct bio {
struct bvec_iter bi_iter;
+#ifdef CONFIG_BLOCK_PERF_FRAMEWORK
+ union blk_ktime submit_time;
+ unsigned int blk_sector_count;
+#endif
/* Number of segments in this BIO after
* physical address coalescing is performed.
*/
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index 0eab4811ee92..d81d6a2db342 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -113,7 +113,7 @@ extern const struct cpumask *const cpu_isolated_mask;
#define cpu_possible(cpu) ((cpu) == 0)
#define cpu_present(cpu) ((cpu) == 0)
#define cpu_active(cpu) ((cpu) == 0)
-#define cpu_isolated(cpu) ((cpu) == 0)
+#define cpu_isolated(cpu) ((cpu) != 0)
#endif
/* verify cpu argument to cpumask_* operators */
diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
index fad58671c49e..62acf17a894b 100644
--- a/include/linux/iio/consumer.h
+++ b/include/linux/iio/consumer.h
@@ -161,6 +161,16 @@ int iio_read_channel_processed(struct iio_channel *chan, int *val);
int iio_write_channel_raw(struct iio_channel *chan, int val);
/**
+ * iio_write_channel_processed() - write to a given channel
+ * @chan: The channel being queried.
+ * @val: Value being written.
+ *
+ * Note processed writes to iio channels are converted to raw
+ * values before being written.
+ */
+int iio_write_channel_processed(struct iio_channel *chan, int val);
+
+/**
* iio_get_channel_type() - get the type of a channel
* @channel: The channel being queried.
* @type: The type of the channel.
diff --git a/include/linux/ipa.h b/include/linux/ipa.h
index d545604cc22d..c11a5c4afece 100644
--- a/include/linux/ipa.h
+++ b/include/linux/ipa.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -901,6 +901,7 @@ struct IpaHwRingStats_t {
* injected due to vdev_id change
* @num_ic_inj_fw_desc_change : Number of times the Imm Cmd is
* injected due to fw_desc change
+ * @num_qmb_int_handled : Number of QMB interrupts handled
*/
struct IpaHwStatsWDIRxInfoData_t {
u32 max_outstanding_pkts;
@@ -914,6 +915,7 @@ struct IpaHwStatsWDIRxInfoData_t {
u32 num_pkts_in_dis_uninit_state;
u32 num_ic_inj_vdev_change;
u32 num_ic_inj_fw_desc_change;
+ u32 num_qmb_int_handled;
u32 reserved1;
u32 reserved2;
} __packed;
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 3c1c96786248..b0bcc1561d3d 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -73,6 +73,7 @@ enum irqchip_irq_state;
* it from the spurious interrupt detection
* mechanism and from core side polling.
* IRQ_DISABLE_UNLAZY - Disable lazy irq disable
+ * IRQ_AFFINITY_MANAGED - Affinity is auto-managed by the kernel
*/
enum {
IRQ_TYPE_NONE = 0x00000000,
@@ -99,13 +100,14 @@ enum {
IRQ_PER_CPU_DEVID = (1 << 17),
IRQ_IS_POLLED = (1 << 18),
IRQ_DISABLE_UNLAZY = (1 << 19),
+ IRQ_AFFINITY_MANAGED = (1 << 21),
};
#define IRQF_MODIFY_MASK \
(IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \
- IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY)
+ IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY | IRQ_AFFINITY_MANAGED)
#define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
@@ -191,6 +193,7 @@ struct irq_data {
* IRQD_IRQ_INPROGRESS - In progress state of the interrupt
* IRQD_WAKEUP_ARMED - Wakeup mode armed
* IRQD_FORWARDED_TO_VCPU - The interrupt is forwarded to a VCPU
+ * IRQD_AFFINITY_MANAGED - Affinity is auto-managed by the kernel
*/
enum {
IRQD_TRIGGER_MASK = 0xf,
@@ -206,6 +209,7 @@ enum {
IRQD_IRQ_INPROGRESS = (1 << 18),
IRQD_WAKEUP_ARMED = (1 << 19),
IRQD_FORWARDED_TO_VCPU = (1 << 20),
+ IRQD_AFFINITY_MANAGED = (1 << 21),
};
#define __irqd_to_state(d) ((d)->common->state_use_accessors)
@@ -299,6 +303,11 @@ static inline void irqd_clr_forwarded_to_vcpu(struct irq_data *d)
__irqd_to_state(d) &= ~IRQD_FORWARDED_TO_VCPU;
}
+static inline bool irqd_affinity_is_managed(struct irq_data *d)
+{
+ return __irqd_to_state(d) & IRQD_AFFINITY_MANAGED;
+}
+
static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
{
return d->hwirq;
diff --git a/include/linux/leds.h b/include/linux/leds.h
index bba189a62dfd..197b61500ab7 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -49,6 +49,7 @@ struct led_classdev {
#define SET_BRIGHTNESS_ASYNC (1 << 21)
#define SET_BRIGHTNESS_SYNC (1 << 22)
#define LED_DEV_CAP_FLASH (1 << 23)
+#define LED_KEEP_TRIGGER (1 << 24)
/* Set LED brightness level */
/* Must not sleep, use a workqueue if needed */
diff --git a/include/linux/mdss_io_util.h b/include/linux/mdss_io_util.h
index 6ad21e887877..5b2587b28737 100644
--- a/include/linux/mdss_io_util.h
+++ b/include/linux/mdss_io_util.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012, 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -77,6 +77,7 @@ struct dss_clk {
char clk_name[32];
enum dss_clk_type type;
unsigned long rate;
+ unsigned long max_rate;
};
struct dss_module_power {
diff --git a/include/linux/mdss_smmu_ext.h b/include/linux/mdss_smmu_ext.h
new file mode 100644
index 000000000000..12ad4305f145
--- /dev/null
+++ b/include/linux/mdss_smmu_ext.h
@@ -0,0 +1,53 @@
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef MDSS_SMMU_EXT_H
+#define MDSS_SMMU_EXT_H
+
+/**
+ * struct msm_smmu:interface exposed to the clients which use smmu driver.
+ * @dev: smmu device for attach/dettach
+ * @domain: domain for the context bank.
+ * @is_secure: bool variable to check for secure domain.
+ * @iommu_ctrl: iommu ctrl function for enable/disable attach.
+ * @secure_session_ctrl: ctrl function for enable/disable session.
+ * @wait_for_transition:function to wait till secure transtion is complete.
+ * @reg_lock /reg_unlock: Lock to access shared registers.
+ */
+struct mdss_smmu_intf {
+ struct device *dev;
+ int domain;
+ bool is_secure;
+ int (*iommu_ctrl)(int);
+ int (*secure_session_ctrl)(int);
+ int (*wait_for_transition)(int state, int request);
+ void (*reg_lock)(void);
+ void (*reg_unlock)(void);
+ bool (*handoff_pending)(void);
+};
+
+typedef void (*msm_smmu_handler_t) (struct mdss_smmu_intf *smmu);
+
+/**
+ * mdss_smmu_request_mappings: function to request smmu mappings.
+ * Client driver can request smmu dev via this API.
+ * dev will be returned in the same call context
+ * if probe is not finished then dev will be
+ * returned once it is completed.
+ * @callback: callback function that is called to return smmu
+ * dev
+ */
+
+int mdss_smmu_request_mappings(msm_smmu_handler_t callback);
+
+#endif /* MDSS_SMMU_EXT_H */
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
index 11e8d89c337b..6eb8c1893a53 100644
--- a/include/linux/mfd/wcd9xxx/core.h
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -334,6 +334,7 @@ struct wcd9xxx {
struct slim_device *slim_slave;
struct mutex io_lock;
struct mutex xfer_lock;
+ struct mutex reset_lock;
u8 version;
int reset_gpio;
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 276dbf19805b..804d89a825fc 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -22,6 +22,7 @@
#include <linux/mmc/core.h>
#include <linux/mmc/card.h>
#include <linux/mmc/pm.h>
+#include <linux/mmc/ring_buffer.h>
#define MMC_AUTOSUSPEND_DELAY_MS 3000
@@ -571,6 +572,7 @@ struct mmc_host {
} perf;
bool perf_enable;
#endif
+ struct mmc_trace_buffer trace_buf;
enum dev_state dev_status;
bool wakeup_on_idle;
struct mmc_cmdq_context_info cmdq_ctx;
diff --git a/include/linux/mmc/ring_buffer.h b/include/linux/mmc/ring_buffer.h
new file mode 100644
index 000000000000..e6bf163ffcfe
--- /dev/null
+++ b/include/linux/mmc/ring_buffer.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MMC_RING_BUFFER__
+#define __MMC_RING_BUFFER__
+
+#include <linux/mmc/card.h>
+#include <linux/smp.h>
+
+#include "core.h"
+
+#define MMC_TRACE_RBUF_SZ_ORDER 2 /* 2^2 pages */
+#define MMC_TRACE_RBUF_SZ (PAGE_SIZE * (1 << MMC_TRACE_RBUF_SZ_ORDER))
+#define MMC_TRACE_EVENT_SZ 256
+#define MMC_TRACE_RBUF_NUM_EVENTS (MMC_TRACE_RBUF_SZ / MMC_TRACE_EVENT_SZ)
+
+struct mmc_host;
+struct mmc_trace_buffer {
+ int wr_idx;
+ bool stop_tracing;
+ spinlock_t trace_lock;
+ char *data;
+};
+
+#ifdef CONFIG_MMC_RING_BUFFER
+void mmc_stop_tracing(struct mmc_host *mmc);
+void mmc_trace_write(struct mmc_host *mmc, const char *fmt, ...);
+void mmc_trace_init(struct mmc_host *mmc);
+void mmc_trace_free(struct mmc_host *mmc);
+void mmc_dump_trace_buffer(struct mmc_host *mmc, struct seq_file *s);
+#else
+static inline void mmc_stop_tracing(struct mmc_host *mmc) {}
+static inline void mmc_trace_write(struct mmc_host *mmc,
+ const char *fmt, ...) {}
+static inline void mmc_trace_init(struct mmc_host *mmc) {}
+static inline void mmc_trace_free(struct mmc_host *mmc) {}
+static inline void mmc_dump_trace_buffer(struct mmc_host *mmc,
+ struct seq_file *s) {}
+#endif
+
+#define MMC_TRACE(mmc, fmt, ...) \
+ mmc_trace_write(mmc, fmt, ##__VA_ARGS__)
+
+#endif /* __MMC_RING_BUFFER__ */
diff --git a/include/linux/msm_ext_display.h b/include/linux/msm_ext_display.h
index b3a7e4ad722a..4378080da0d9 100644
--- a/include/linux/msm_ext_display.h
+++ b/include/linux/msm_ext_display.h
@@ -1,6 +1,6 @@
/* include/linux/msm_ext_display.h
*
- * Copyright (c) 2014-2016 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,11 +24,11 @@
/**
* Flags to be used with the HPD operation of the external display
* interface:
- * MSM_EXT_DISP_HPD_NO_AUDIO: audio will not be routed to external display
- * MSM_EXT_DISP_HPD_NO_VIDEO: video will not be routed to external display
+ * MSM_EXT_DISP_HPD_AUDIO: audio will be routed to external display
+ * MSM_EXT_DISP_HPD_VIDEO: video will be routed to external display
*/
-#define MSM_EXT_DISP_HPD_NO_AUDIO BIT(0)
-#define MSM_EXT_DISP_HPD_NO_VIDEO BIT(1)
+#define MSM_EXT_DISP_HPD_AUDIO BIT(0)
+#define MSM_EXT_DISP_HPD_VIDEO BIT(1)
/**
* struct ext_disp_cable_notify - cable notify handler structure
@@ -91,7 +91,7 @@ enum msm_ext_disp_power_state {
/**
* struct msm_ext_disp_intf_ops - operations exposed to display interface
* @hpd: updates external display interface state
- * @notify: updates audio framework with interface state
+ * @notify: acknowledgment to power on or off
*/
struct msm_ext_disp_intf_ops {
int (*hpd)(struct platform_device *pdev,
@@ -100,8 +100,7 @@ struct msm_ext_disp_intf_ops {
u32 flags);
int (*notify)(struct platform_device *pdev,
enum msm_ext_disp_cable_state state);
- int (*ack)(struct platform_device *pdev,
- u32 ack);
+ int (*ack)(struct platform_device *pdev, u32 ack);
};
/**
diff --git a/include/linux/msm_gsi.h b/include/linux/msm_gsi.h
index fb2607dd365b..6037fbf00a23 100644
--- a/include/linux/msm_gsi.h
+++ b/include/linux/msm_gsi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1040,6 +1040,19 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,
*/
int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size);
+/**
+ * gsi_get_inst_ram_offset_and_size - Peripheral should call this function
+ * to get instruction RAM base address offset and size. Peripheral typically
+ * uses this info to load GSI FW into the IRAM.
+ *
+ * @base_offset:[OUT] - IRAM base offset address
+ * @size: [OUT] - IRAM size
+
+ * @Return none
+ */
+void gsi_get_inst_ram_offset_and_size(unsigned long *base_offset,
+ unsigned long *size);
+
/*
* Here is a typical sequence of calls
*
@@ -1227,9 +1240,15 @@ static inline int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,
{
return -GSI_STATUS_UNSUPPORTED_OP;
}
+
static inline int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size)
{
return -GSI_STATUS_UNSUPPORTED_OP;
}
+
+static inline void gsi_get_inst_ram_offset_and_size(unsigned long *base_offset,
+ unsigned long *size)
+{
+}
#endif
#endif
diff --git a/include/linux/pfk.h b/include/linux/pfk.h
index 2fc64442b8ee..82ee74199752 100644
--- a/include/linux/pfk.h
+++ b/include/linux/pfk.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,6 +24,7 @@ int pfk_load_key_start(const struct bio *bio,
int pfk_load_key_end(const struct bio *bio, bool *is_pfe);
int pfk_remove_key(const unsigned char *key, size_t key_size);
bool pfk_allow_merge_bio(const struct bio *bio1, const struct bio *bio2);
+void pfk_clear_on_reset(void);
#else
static inline int pfk_load_key_start(const struct bio *bio,
@@ -48,6 +49,9 @@ static inline bool pfk_allow_merge_bio(const struct bio *bio1,
return true;
}
+static inline void pfk_clear_on_reset(void)
+{}
+
#endif /* CONFIG_PFK */
#endif /* PFK_H */
diff --git a/include/linux/pid.h b/include/linux/pid.h
index 23705a53abba..97b745ddece5 100644
--- a/include/linux/pid.h
+++ b/include/linux/pid.h
@@ -8,7 +8,9 @@ enum pid_type
PIDTYPE_PID,
PIDTYPE_PGID,
PIDTYPE_SID,
- PIDTYPE_MAX
+ PIDTYPE_MAX,
+ /* only valid to __task_pid_nr_ns() */
+ __PIDTYPE_TGID
};
/*
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index 20280ff20e52..457d862cb9a8 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -61,6 +61,7 @@ enum {
POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE,
POWER_SUPPLY_HEALTH_WARM,
POWER_SUPPLY_HEALTH_COOL,
+ POWER_SUPPLY_HEALTH_HOT,
};
enum {
@@ -104,6 +105,12 @@ enum {
POWER_SUPPLY_DP_DM_ICL_UP = 12,
};
+enum {
+ POWER_SUPPLY_PARALLEL_NONE,
+ POWER_SUPPLY_PARALLEL_USBIN_USBIN,
+ POWER_SUPPLY_PARALLEL_MID_MID,
+};
+
enum power_supply_property {
/* Properties of type `int' */
POWER_SUPPLY_PROP_STATUS = 0,
@@ -184,6 +191,7 @@ enum power_supply_property {
POWER_SUPPLY_PROP_INPUT_CURRENT_MAX,
POWER_SUPPLY_PROP_INPUT_CURRENT_TRIM,
POWER_SUPPLY_PROP_INPUT_CURRENT_SETTLED,
+ POWER_SUPPLY_PROP_INPUT_VOLTAGE_SETTLED,
POWER_SUPPLY_PROP_VCHG_LOOP_DBC_BYPASS,
POWER_SUPPLY_PROP_CHARGE_COUNTER_SHADOW,
POWER_SUPPLY_PROP_HI_POWER,
@@ -208,6 +216,8 @@ enum power_supply_property {
POWER_SUPPLY_PROP_DP_DM,
POWER_SUPPLY_PROP_INPUT_CURRENT_LIMITED,
POWER_SUPPLY_PROP_INPUT_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CURRENT_QNOVO,
+ POWER_SUPPLY_PROP_VOLTAGE_QNOVO,
POWER_SUPPLY_PROP_RERUN_AICL,
POWER_SUPPLY_PROP_CYCLE_COUNT_ID,
POWER_SUPPLY_PROP_SAFETY_TIMER_EXPIRED,
@@ -224,10 +234,16 @@ enum power_supply_property {
POWER_SUPPLY_PROP_CHARGER_TEMP,
POWER_SUPPLY_PROP_CHARGER_TEMP_MAX,
POWER_SUPPLY_PROP_PARALLEL_DISABLE,
- POWER_SUPPLY_PROP_PARALLEL_PERCENT,
POWER_SUPPLY_PROP_PE_START,
POWER_SUPPLY_PROP_SET_SHIP_MODE,
POWER_SUPPLY_PROP_SOC_REPORTING_READY,
+ POWER_SUPPLY_PROP_DEBUG_BATTERY,
+ POWER_SUPPLY_PROP_FCC_DELTA,
+ POWER_SUPPLY_PROP_ICL_REDUCTION,
+ POWER_SUPPLY_PROP_PARALLEL_MODE,
+ POWER_SUPPLY_PROP_DIE_HEALTH,
+ POWER_SUPPLY_PROP_CONNECTOR_HEALTH,
+ POWER_SUPPLY_PROP_CTM_CURRENT_MAX,
/* Local extensions of type int64_t */
POWER_SUPPLY_PROP_CHARGE_COUNTER_EXT,
/* Properties of type `const char *' */
@@ -251,9 +267,10 @@ enum power_supply_type {
POWER_SUPPLY_TYPE_USB_PD, /* Power Delivery */
POWER_SUPPLY_TYPE_WIRELESS, /* Accessory Charger Adapters */
POWER_SUPPLY_TYPE_BMS, /* Battery Monitor System */
- POWER_SUPPLY_TYPE_USB_PARALLEL, /* USB Parallel Path */
- POWER_SUPPLY_TYPE_WIPOWER, /* Wipower */
- POWER_SUPPLY_TYPE_TYPEC, /*Type-C */
+ POWER_SUPPLY_TYPE_PARALLEL, /* Parallel Path */
+ POWER_SUPPLY_TYPE_MAIN, /* Main Path */
+ POWER_SUPPLY_TYPE_WIPOWER, /* Wipower */
+ POWER_SUPPLY_TYPE_TYPEC, /* Type-C */
POWER_SUPPLY_TYPE_UFP, /* Type-C UFP */
POWER_SUPPLY_TYPE_DFP, /* TYpe-C DFP */
};
diff --git a/include/linux/qcom_tspp.h b/include/linux/qcom_tspp.h
index 28e6695fb057..1b34c389d7f0 100644
--- a/include/linux/qcom_tspp.h
+++ b/include/linux/qcom_tspp.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -70,6 +70,11 @@ struct tspp_select_source {
int enable_inverse;
};
+enum tsif_tts_source {
+ TSIF_TTS_TCR = 0, /* Time stamps from TCR counter */
+ TSIF_TTS_LPASS_TIMER /* Time stamps from AV/Qtimer Timer */
+};
+
typedef void (tspp_notifier)(int channel_id, void *user);
typedef void* (tspp_allocator)(int channel_id, u32 size,
phys_addr_t *phys_base, void *user);
@@ -96,4 +101,8 @@ int tspp_allocate_buffers(u32 dev, u32 channel_id, u32 count,
u32 size, u32 int_freq, tspp_allocator *alloc,
tspp_memfree *memfree, void *user);
+int tspp_get_tts_source(u32 dev, int *tts_source);
+int tspp_get_lpass_time_counter(u32 dev, enum tspp_source source,
+ u64 *lpass_time_counter);
+
#endif /* _MSM_TSPP_H_ */
diff --git a/include/linux/qdsp6v2/apr_tal.h b/include/linux/qdsp6v2/apr_tal.h
index c2c49dd748de..bf324064960b 100644
--- a/include/linux/qdsp6v2/apr_tal.h
+++ b/include/linux/qdsp6v2/apr_tal.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, 2016 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2011, 2016-2017 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,7 +32,6 @@
#if defined(CONFIG_MSM_QDSP6_APRV2_GLINK) || \
defined(CONFIG_MSM_QDSP6_APRV3_GLINK)
#define APR_MAX_BUF 512
-#define APR_NUM_OF_TX_BUF 30
#else
#define APR_MAX_BUF 8092
#endif
diff --git a/include/linux/qdsp6v2/rtac.h b/include/linux/qdsp6v2/rtac.h
index 3e5433b23a51..eeea0eb0a837 100644
--- a/include/linux/qdsp6v2/rtac.h
+++ b/include/linux/qdsp6v2/rtac.h
@@ -1,4 +1,5 @@
-/* Copyright (c) 2011, 2013-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011, 2013-2015, 2017, The Linux Foundation. All rights
+ * reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -95,4 +96,5 @@ int rtac_clear_mapping(uint32_t cal_type);
bool rtac_make_afe_callback(uint32_t *payload, u32 payload_size);
void rtac_set_afe_handle(void *handle);
void get_rtac_adm_data(struct rtac_adm *adm_data);
+void rtac_update_afe_topology(u32 port_id);
#endif
diff --git a/include/linux/regulator/qpnp-regulator.h b/include/linux/regulator/qpnp-regulator.h
index c7afeb50f244..36288c068ac3 100644
--- a/include/linux/regulator/qpnp-regulator.h
+++ b/include/linux/regulator/qpnp-regulator.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2013, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -158,8 +158,8 @@ enum qpnp_boost_current_limit {
struct qpnp_regulator_platform_data {
struct regulator_init_data init_data;
int pull_down_enable;
- unsigned pin_ctrl_enable;
- unsigned pin_ctrl_hpm;
+ unsigned int pin_ctrl_enable;
+ unsigned int pin_ctrl_hpm;
int system_load;
int enable_time;
int ocp_enable;
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 0d1d21e9f081..708c4284b8d9 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -335,8 +335,6 @@ enum task_event {
enum migrate_types {
GROUP_TO_RQ,
RQ_TO_GROUP,
- RQ_TO_RQ,
- GROUP_TO_GROUP,
};
#include <linux/spinlock.h>
@@ -2109,15 +2107,8 @@ static inline pid_t task_tgid_nr(struct task_struct *tsk)
return tsk->tgid;
}
-pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns);
-
-static inline pid_t task_tgid_vnr(struct task_struct *tsk)
-{
- return pid_vnr(task_tgid(tsk));
-}
-
-
static inline int pid_alive(const struct task_struct *p);
+static inline pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns);
static inline pid_t task_ppid_nr_ns(const struct task_struct *tsk, struct pid_namespace *ns)
{
pid_t pid = 0;
@@ -2158,6 +2149,16 @@ static inline pid_t task_session_vnr(struct task_struct *tsk)
return __task_pid_nr_ns(tsk, PIDTYPE_SID, NULL);
}
+static inline pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns)
+{
+ return __task_pid_nr_ns(tsk, __PIDTYPE_TGID, ns);
+}
+
+static inline pid_t task_tgid_vnr(struct task_struct *tsk)
+{
+ return __task_pid_nr_ns(tsk, __PIDTYPE_TGID, NULL);
+}
+
/* obsolete, do not use */
static inline pid_t task_pgrp_nr(struct task_struct *tsk)
{
diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h
index f7aeb14f4d63..ef8a092251aa 100644
--- a/include/linux/sched/sysctl.h
+++ b/include/linux/sched/sysctl.h
@@ -45,6 +45,14 @@ extern unsigned int sysctl_sched_initial_task_util;
extern unsigned int sysctl_sched_cstate_aware;
#ifdef CONFIG_SCHED_HMP
+
+enum freq_reporting_policy {
+ FREQ_REPORT_MAX_CPU_LOAD_TOP_TASK,
+ FREQ_REPORT_CPU_LOAD,
+ FREQ_REPORT_TOP_TASK,
+ FREQ_REPORT_INVALID_POLICY
+};
+
extern int sysctl_sched_freq_inc_notify;
extern int sysctl_sched_freq_dec_notify;
extern unsigned int sysctl_sched_freq_reporting_policy;
@@ -63,7 +71,6 @@ extern unsigned int sysctl_sched_boost;
extern unsigned int sysctl_sched_small_wakee_task_load_pct;
extern unsigned int sysctl_sched_big_waker_task_load_pct;
extern unsigned int sysctl_sched_select_prev_cpu_us;
-extern unsigned int sysctl_sched_enable_colocation;
extern unsigned int sysctl_sched_restrict_cluster_spill;
extern unsigned int sysctl_sched_new_task_windows;
extern unsigned int sysctl_sched_pred_alert_freq;
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index b90f8f5c663d..4d2cf47aba27 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -178,6 +178,7 @@ struct sensor_info {
struct work_struct work;
struct task_struct *sysfs_notify_thread;
struct completion sysfs_notify_complete;
+ bool deregister_active;
};
/**
diff --git a/include/linux/usb/ccid_desc.h b/include/linux/usb/ccid_desc.h
new file mode 100644
index 000000000000..9a0c72650cd2
--- /dev/null
+++ b/include/linux/usb/ccid_desc.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2011, 2017 The Linux Foundation. All rights reserved.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details
+ */
+
+#ifndef __LINUX_USB_CCID_DESC_H
+#define __LINUX_USB_CCID_DESC_H
+
+/*CCID specification version 1.10*/
+#define CCID1_10 0x0110
+
+#define SMART_CARD_DEVICE_CLASS 0x0B
+/* Smart Card Device Class Descriptor Type */
+#define CCID_DECRIPTOR_TYPE 0x21
+
+/* Table 5.3-1 Summary of CCID Class Specific Request */
+#define CCIDGENERICREQ_ABORT 0x01
+#define CCIDGENERICREQ_GET_CLOCK_FREQUENCIES 0x02
+#define CCIDGENERICREQ_GET_DATA_RATES 0x03
+
+/* 6.1 Command Pipe, Bulk-OUT Messages */
+#define PC_TO_RDR_ICCPOWERON 0x62
+#define PC_TO_RDR_ICCPOWEROFF 0x63
+#define PC_TO_RDR_GETSLOTSTATUS 0x65
+#define PC_TO_RDR_XFRBLOCK 0x6F
+#define PC_TO_RDR_GETPARAMETERS 0x6C
+#define PC_TO_RDR_RESETPARAMETERS 0x6D
+#define PC_TO_RDR_SETPARAMETERS 0x61
+#define PC_TO_RDR_ESCAPE 0x6B
+#define PC_TO_RDR_ICCCLOCK 0x6E
+#define PC_TO_RDR_T0APDU 0x6A
+#define PC_TO_RDR_SECURE 0x69
+#define PC_TO_RDR_MECHANICAL 0x71
+#define PC_TO_RDR_ABORT 0x72
+#define PC_TO_RDR_SETDATARATEANDCLOCKFREQUENCY 0x73
+
+/* 6.2 Response Pipe, Bulk-IN Messages */
+#define RDR_TO_PC_DATABLOCK 0x80
+#define RDR_TO_PC_SLOTSTATUS 0x81
+#define RDR_TO_PC_PARAMETERS 0x82
+#define RDR_TO_PC_ESCAPE 0x83
+#define RDR_TO_PC_DATARATEANDCLOCKFREQUENCY 0x84
+
+/* 6.3 Interrupt-IN Messages */
+#define RDR_TO_PC_NOTIFYSLOTCHANGE 0x50
+#define RDR_TO_PC_HARDWAREERROR 0x51
+
+/* Table 6.2-2 Slot error register when bmCommandStatus = 1 */
+#define CMD_ABORTED 0xFF
+#define ICC_MUTE 0xFE
+#define XFR_PARITY_ERROR 0xFD
+#define XFR_OVERRUN 0xFC
+#define HW_ERROR 0xFB
+#define BAD_ATR_TS 0xF8
+#define BAD_ATR_TCK 0xF7
+#define ICC_PROTOCOL_NOT_SUPPORTED 0xF6
+#define ICC_CLASS_NOT_SUPPORTED 0xF5
+#define PROCEDURE_BYTE_CONFLICT 0xF4
+#define DEACTIVATED_PROTOCOL 0xF3
+#define BUSY_WITH_AUTO_SEQUENCE 0xF2
+#define PIN_TIMEOUT 0xF0
+#define PIN_CANCELLED 0xEF
+#define CMD_SLOT_BUSY 0xE0
+
+/* CCID rev 1.1, p.27 */
+#define VOLTS_AUTO 0x00
+#define VOLTS_5_0 0x01
+#define VOLTS_3_0 0x02
+#define VOLTS_1_8 0x03
+
+/* 6.3.1 RDR_to_PC_NotifySlotChange */
+#define ICC_NOT_PRESENT 0x00
+#define ICC_PRESENT 0x01
+#define ICC_CHANGE 0x02
+#define ICC_INSERTED_EVENT (ICC_PRESENT+ICC_CHANGE)
+
+/* Identifies the length of type of subordinate descriptors of a CCID device
+ * Table 5.1-1 Smart Card Device Class descriptors
+ */
+struct usb_ccid_class_descriptor {
+ unsigned char bLength;
+ unsigned char bDescriptorType;
+ unsigned short bcdCCID;
+ unsigned char bMaxSlotIndex;
+ unsigned char bVoltageSupport;
+ unsigned long dwProtocols;
+ unsigned long dwDefaultClock;
+ unsigned long dwMaximumClock;
+ unsigned char bNumClockSupported;
+ unsigned long dwDataRate;
+ unsigned long dwMaxDataRate;
+ unsigned char bNumDataRatesSupported;
+ unsigned long dwMaxIFSD;
+ unsigned long dwSynchProtocols;
+ unsigned long dwMechanical;
+ unsigned long dwFeatures;
+ unsigned long dwMaxCCIDMessageLength;
+ unsigned char bClassGetResponse;
+ unsigned char bClassEnvelope;
+ unsigned short wLcdLayout;
+ unsigned char bPINSupport;
+ unsigned char bMaxCCIDBusySlots;
+} __packed;
+#endif
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index bc5637ab01df..4cde40dac778 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -55,7 +55,7 @@
#define USB_GADGET_DELAYED_STATUS 0x7fff /* Impossibly large value */
/* big enough to hold our biggest descriptor */
-#define USB_COMP_EP0_BUFSIZ 1024
+#define USB_COMP_EP0_BUFSIZ 4096
#define USB_MS_TO_HS_INTERVAL(x) (ilog2((x * 1000 / 125)) + 1)
struct usb_configuration;
diff --git a/include/linux/usb/xhci_pdriver.h b/include/linux/usb/xhci_pdriver.h
index 376654b5b0f7..a44b53c33e75 100644
--- a/include/linux/usb/xhci_pdriver.h
+++ b/include/linux/usb/xhci_pdriver.h
@@ -19,9 +19,13 @@
* @usb3_lpm_capable: determines if this xhci platform supports USB3
* LPM capability
*
+ * @imod_interval: minimum inter-interrupt interval. Specified in
+ * 250nsec increments.
+ *
*/
struct usb_xhci_pdata {
unsigned usb3_lpm_capable:1;
+ unsigned imod_interval;
};
#endif /* __USB_CORE_XHCI_PDRIVER_H */
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 94ace231b3bd..1ce3ea1fd917 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -69,6 +69,8 @@ struct wiphy;
#define CFG80211_ABORT_SCAN 1
#define CFG80211_UPDATE_CONNECT_PARAMS 1
#define CFG80211_BEACON_TX_RATE_CUSTOM_BACKPORT 1
+#define CFG80211_RAND_TA_FOR_PUBLIC_ACTION_FRAME 1
+#define CFG80211_REPORT_BETTER_BSS_IN_SCHED_SCAN 1
/*
* wireless hardware capability structures
@@ -1568,6 +1570,17 @@ struct cfg80211_sched_scan_plan {
};
/**
+ * struct cfg80211_bss_select_adjust - BSS selection with RSSI adjustment.
+ *
+ * @band: band of BSS which should match for RSSI level adjustment.
+ * @delta: value of RSSI level adjustment.
+ */
+struct cfg80211_bss_select_adjust {
+ enum nl80211_band band;
+ s8 delta;
+};
+
+/**
* struct cfg80211_sched_scan_request - scheduled scan request description
*
* @ssids: SSIDs to scan for (passed in the probe_reqs in active scans)
@@ -1602,6 +1615,16 @@ struct cfg80211_sched_scan_plan {
* cycle. The driver may ignore this parameter and start
* immediately (or at any other time), if this feature is not
* supported.
+ * @relative_rssi_set: Indicates whether @relative_rssi is set or not.
+ * @relative_rssi: Relative RSSI threshold in dB to restrict scan result
+ * reporting in connected state to cases where a matching BSS is determined
+ * to have better or slightly worse RSSI than the current connected BSS.
+ * The relative RSSI threshold values are ignored in disconnected state.
+ * @rssi_adjust: delta dB of RSSI preference to be given to the BSSs that belong
+ * to the specified band while deciding whether a better BSS is reported
+ * using @relative_rssi. If delta is a negative number, the BSSs that
+ * belong to the specified band will be penalized by delta dB in relative
+ * comparisions.
*/
struct cfg80211_sched_scan_request {
struct cfg80211_ssid *ssids;
@@ -1621,6 +1644,10 @@ struct cfg80211_sched_scan_request {
u8 mac_addr[ETH_ALEN] __aligned(2);
u8 mac_addr_mask[ETH_ALEN] __aligned(2);
+ bool relative_rssi_set;
+ s8 relative_rssi;
+ struct cfg80211_bss_select_adjust rssi_adjust;
+
/* internal */
struct wiphy *wiphy;
struct net_device *dev;
@@ -1906,6 +1933,22 @@ struct cfg80211_ibss_params {
};
/**
+ * struct cfg80211_bss_selection - connection parameters for BSS selection.
+ *
+ * @behaviour: requested BSS selection behaviour.
+ * @param: parameters for requestion behaviour.
+ * @band_pref: preferred band for %NL80211_BSS_SELECT_ATTR_BAND_PREF.
+ * @adjust: parameters for %NL80211_BSS_SELECT_ATTR_RSSI_ADJUST.
+ */
+struct cfg80211_bss_selection {
+ enum nl80211_bss_select_attr behaviour;
+ union {
+ enum ieee80211_band band_pref;
+ struct cfg80211_bss_select_adjust adjust;
+ } param;
+};
+
+/**
* struct cfg80211_connect_params - Connection parameters
*
* This structure provides information needed to complete IEEE 802.11
@@ -1942,6 +1985,7 @@ struct cfg80211_ibss_params {
* @vht_capa_mask: The bits of vht_capa which are to be used.
* @pbss: if set, connect to a PCP instead of AP. Valid for DMG
* networks.
+ * @bss_select: criteria to be used for BSS selection.
* @prev_bssid: previous BSSID, if not %NULL use reassociate frame
*/
struct cfg80211_connect_params {
@@ -1966,6 +2010,7 @@ struct cfg80211_connect_params {
struct ieee80211_vht_cap vht_capa;
struct ieee80211_vht_cap vht_capa_mask;
bool pbss;
+ struct cfg80211_bss_selection bss_select;
const u8 *prev_bssid;
};
@@ -3283,6 +3328,9 @@ struct wiphy_iftype_ext_capab {
* low rssi when a frame is heard on different channel, then it should set
* this variable to the maximal offset for which it can compensate.
* This value should be set in MHz.
+ * @bss_select_support: bitmask indicating the BSS selection criteria supported
+ * by the driver in the .connect() callback. The bit position maps to the
+ * attribute indices defined in &enum nl80211_bss_select_attr.
*/
struct wiphy {
/* assign these fields before you register the wiphy */
@@ -3410,6 +3458,8 @@ struct wiphy {
u8 max_num_csa_counters;
u8 max_adj_channel_rssi_comp;
+ u32 bss_select_support;
+
char priv[0] __aligned(NETDEV_ALIGN);
};
@@ -5424,6 +5474,21 @@ int cfg80211_iter_combinations(struct wiphy *wiphy,
void *data),
void *data);
+/*
+ * cfg80211_stop_iface - trigger interface disconnection
+ *
+ * @wiphy: the wiphy
+ * @wdev: wireless device
+ * @gfp: context flags
+ *
+ * Trigger interface to be stopped as if AP was stopped, IBSS/mesh left, STA
+ * disconnected.
+ *
+ * Note: This doesn't need any locks and is asynchronous.
+ */
+void cfg80211_stop_iface(struct wiphy *wiphy, struct wireless_dev *wdev,
+ gfp_t gfp);
+
/**
* cfg80211_shutdown_all_interfaces - shut down all interfaces for a wiphy
* @wiphy: the wiphy to shut down
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 760bc4d5a2cf..e4a54cd23211 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -1014,6 +1014,14 @@ ieee80211_tx_info_clear_status(struct ieee80211_tx_info *info)
* @RX_FLAG_AMPDU_DELIM_CRC_KNOWN: The delimiter CRC field is known (the CRC
* is stored in the @ampdu_delimiter_crc field)
* @RX_FLAG_LDPC: LDPC was used
+ * @RX_FLAG_ONLY_MONITOR: Report frame only to monitor interfaces without
+ * processing it in any regular way.
+ * This is useful if drivers offload some frames but still want to report
+ * them for sniffing purposes.
+ * @RX_FLAG_SKIP_MONITOR: Process and report frame to all interfaces except
+ * monitor interfaces.
+ * This is useful if drivers offload some frames but still want to report
+ * them for sniffing purposes.
* @RX_FLAG_STBC_MASK: STBC 2 bit bitmask. 1 - Nss=1, 2 - Nss=2, 3 - Nss=3
* @RX_FLAG_10MHZ: 10 MHz (half channel) was used
* @RX_FLAG_5MHZ: 5 MHz (quarter channel) was used
@@ -1054,6 +1062,8 @@ enum mac80211_rx_flags {
RX_FLAG_MACTIME_END = BIT(21),
RX_FLAG_VHT = BIT(22),
RX_FLAG_LDPC = BIT(23),
+ RX_FLAG_ONLY_MONITOR = BIT(24),
+ RX_FLAG_SKIP_MONITOR = BIT(25),
RX_FLAG_STBC_MASK = BIT(26) | BIT(27),
RX_FLAG_10MHZ = BIT(28),
RX_FLAG_5MHZ = BIT(29),
@@ -1072,6 +1082,7 @@ enum mac80211_rx_flags {
* @RX_VHT_FLAG_160MHZ: 160 MHz was used
* @RX_VHT_FLAG_BF: packet was beamformed
*/
+
enum mac80211_rx_vht_flags {
RX_VHT_FLAG_80MHZ = BIT(0),
RX_VHT_FLAG_160MHZ = BIT(1),
@@ -2674,6 +2685,33 @@ enum ieee80211_ampdu_mlme_action {
};
/**
+ * struct ieee80211_ampdu_params - AMPDU action parameters
+ *
+ * @action: the ampdu action, value from %ieee80211_ampdu_mlme_action.
+ * @sta: peer of this AMPDU session
+ * @tid: tid of the BA session
+ * @ssn: start sequence number of the session. TX/RX_STOP can pass 0. When
+ * action is set to %IEEE80211_AMPDU_RX_START the driver passes back the
+ * actual ssn value used to start the session and writes the value here.
+ * @buf_size: reorder buffer size (number of subframes). Valid only when the
+ * action is set to %IEEE80211_AMPDU_RX_START or
+ * %IEEE80211_AMPDU_TX_OPERATIONAL
+ * @amsdu: indicates the peer's ability to receive A-MSDU within A-MPDU.
+ * valid when the action is set to %IEEE80211_AMPDU_TX_OPERATIONAL
+ * @timeout: BA session timeout. Valid only when the action is set to
+ * %IEEE80211_AMPDU_RX_START
+ */
+struct ieee80211_ampdu_params {
+ enum ieee80211_ampdu_mlme_action action;
+ struct ieee80211_sta *sta;
+ u16 tid;
+ u16 ssn;
+ u8 buf_size;
+ bool amsdu;
+ u16 timeout;
+};
+
+/**
* enum ieee80211_frame_release_type - frame release reason
* @IEEE80211_FRAME_RELEASE_PSPOLL: frame released for PS-Poll
* @IEEE80211_FRAME_RELEASE_UAPSD: frame(s) released due to
@@ -3017,13 +3055,9 @@ enum ieee80211_reconfig_type {
* @ampdu_action: Perform a certain A-MPDU action
* The RA/TID combination determines the destination and TID we want
* the ampdu action to be performed for. The action is defined through
- * ieee80211_ampdu_mlme_action. Starting sequence number (@ssn)
- * is the first frame we expect to perform the action on. Notice
- * that TX/RX_STOP can pass NULL for this parameter.
- * The @buf_size parameter is only valid when the action is set to
- * %IEEE80211_AMPDU_TX_OPERATIONAL and indicates the peer's reorder
- * buffer size (number of subframes) for this session -- the driver
- * may neither send aggregates containing more subframes than this
+ * ieee80211_ampdu_mlme_action.
+ * When the action is set to %IEEE80211_AMPDU_TX_OPERATIONAL the driver
+ * may neither send aggregates containing more subframes than @buf_size
* nor send aggregates in a way that lost frames would exceed the
* buffer size. If just limiting the aggregate size, this would be
* possible with a buf_size of 8:
@@ -3034,9 +3068,6 @@ enum ieee80211_reconfig_type {
* buffer size of 8. Correct ways to retransmit #1 would be:
* - TX: 1 or 18 or 81
* Even "189" would be wrong since 1 could be lost again.
- * The @amsdu parameter is valid when the action is set to
- * %IEEE80211_AMPDU_TX_OPERATIONAL and indicates the peer's ability
- * to receive A-MSDU within A-MPDU.
*
* Returns a negative error code on failure.
* The callback can sleep.
@@ -3378,9 +3409,7 @@ struct ieee80211_ops {
int (*tx_last_beacon)(struct ieee80211_hw *hw);
int (*ampdu_action)(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
- enum ieee80211_ampdu_mlme_action action,
- struct ieee80211_sta *sta, u16 tid, u16 *ssn,
- u8 buf_size, bool amsdu);
+ struct ieee80211_ampdu_params *params);
int (*get_survey)(struct ieee80211_hw *hw, int idx,
struct survey_info *survey);
void (*rfkill_poll)(struct ieee80211_hw *hw);
@@ -3751,11 +3780,12 @@ void ieee80211_restart_hw(struct ieee80211_hw *hw);
* This function must be called with BHs disabled.
*
* @hw: the hardware this frame came in on
+ * @sta: the station the frame was received from, or %NULL
* @skb: the buffer to receive, owned by mac80211 after this call
* @napi: the NAPI context
*/
-void ieee80211_rx_napi(struct ieee80211_hw *hw, struct sk_buff *skb,
- struct napi_struct *napi);
+void ieee80211_rx_napi(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
+ struct sk_buff *skb, struct napi_struct *napi);
/**
* ieee80211_rx - receive frame
@@ -3779,7 +3809,7 @@ void ieee80211_rx_napi(struct ieee80211_hw *hw, struct sk_buff *skb,
*/
static inline void ieee80211_rx(struct ieee80211_hw *hw, struct sk_buff *skb)
{
- ieee80211_rx_napi(hw, skb, NULL);
+ ieee80211_rx_napi(hw, NULL, skb, NULL);
}
/**
@@ -5467,4 +5497,19 @@ void ieee80211_unreserve_tid(struct ieee80211_sta *sta, u8 tid);
*/
struct sk_buff *ieee80211_tx_dequeue(struct ieee80211_hw *hw,
struct ieee80211_txq *txq);
+
+/**
+ * ieee80211_txq_get_depth - get pending frame/byte count of given txq
+ *
+ * The values are not guaranteed to be coherent with regard to each other, i.e.
+ * txq state can change half-way of this function and the caller may end up
+ * with "new" frame_cnt and "old" byte_cnt or vice-versa.
+ *
+ * @txq: pointer obtained from station or virtual interface
+ * @frame_cnt: pointer to store frame count
+ * @byte_cnt: pointer to store byte count
+ */
+void ieee80211_txq_get_depth(struct ieee80211_txq *txq,
+ unsigned long *frame_cnt,
+ unsigned long *byte_cnt);
#endif /* MAC80211_H */
diff --git a/include/soc/qcom/cx_ipeak.h b/include/soc/qcom/cx_ipeak.h
new file mode 100644
index 000000000000..b47e6b4f9b9d
--- /dev/null
+++ b/include/soc/qcom/cx_ipeak.h
@@ -0,0 +1,46 @@
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_COM_CX_IPEAK_H
+#define __SOC_COM_CX_IPEAK_H
+
+struct device_node;
+struct cx_ipeak_client;
+
+#ifndef CONFIG_QCOM_CX_IPEAK
+
+static inline struct cx_ipeak_client *cx_ipeak_register(
+ struct device_node *dev_node,
+ const char *client_name)
+{
+ return NULL;
+}
+
+static inline void cx_ipeak_unregister(struct cx_ipeak_client *client)
+{
+}
+
+static inline int cx_ipeak_update(struct cx_ipeak_client *ipeak_client,
+ bool vote)
+{
+ return 0;
+}
+#else
+
+struct cx_ipeak_client *cx_ipeak_register(struct device_node *dev_node,
+ const char *client_name);
+void cx_ipeak_unregister(struct cx_ipeak_client *client);
+int cx_ipeak_update(struct cx_ipeak_client *ipeak_client, bool vote);
+
+#endif
+
+#endif /*__SOC_COM_CX_IPEAK_H*/
diff --git a/include/soc/qcom/icnss.h b/include/soc/qcom/icnss.h
index 7770f06b5e08..731fa6970b95 100644
--- a/include/soc/qcom/icnss.h
+++ b/include/soc/qcom/icnss.h
@@ -17,6 +17,16 @@
#define ICNSS_MAX_IRQ_REGISTRATIONS 12
#define ICNSS_MAX_TIMESTAMP_LEN 32
+enum icnss_uevent {
+ ICNSS_UEVENT_FW_READY,
+ ICNSS_UEVENT_FW_CRASHED,
+};
+
+struct icnss_uevent_data {
+ enum icnss_uevent uevent;
+ void *data;
+};
+
struct icnss_driver_ops {
char *name;
int (*probe)(struct device *dev);
@@ -28,6 +38,7 @@ struct icnss_driver_ops {
int (*pm_resume)(struct device *dev);
int (*suspend_noirq)(struct device *dev);
int (*resume_noirq)(struct device *dev);
+ int (*uevent)(struct device *dev, struct icnss_uevent_data *uevent);
};
@@ -104,7 +115,7 @@ extern int icnss_ce_request_irq(unsigned int ce_id,
irqreturn_t (*handler)(int, void *),
unsigned long flags, const char *name, void *ctx);
extern int icnss_get_ce_id(int irq);
-extern int icnss_set_fw_debug_mode(bool enable_fw_log);
+extern int icnss_set_fw_log_mode(uint8_t fw_log_mode);
extern int icnss_athdiag_read(struct device *dev, uint32_t offset,
uint32_t mem_type, uint32_t data_len,
uint8_t *output);
diff --git a/include/soc/qcom/qseecomi.h b/include/soc/qcom/qseecomi.h
index e33fd9fc1841..6497d962e347 100644
--- a/include/soc/qcom/qseecomi.h
+++ b/include/soc/qcom/qseecomi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -511,6 +511,9 @@ __packed struct qseecom_continue_blocked_request_ireq {
#define TZ_OS_REGISTER_LISTENER_ID \
TZ_SYSCALL_CREATE_SMC_ID(TZ_OWNER_QSEE_OS, TZ_SVC_LISTENER, 0x01)
+#define TZ_OS_REGISTER_LISTENER_SMCINVOKE_ID \
+ TZ_SYSCALL_CREATE_SMC_ID(TZ_OWNER_QSEE_OS, TZ_SVC_LISTENER, 0x06)
+
#define TZ_OS_REGISTER_LISTENER_ID_PARAM_ID \
TZ_SYSCALL_CREATE_PARAM_ID_3( \
TZ_SYSCALL_PARAM_TYPE_VAL, TZ_SYSCALL_PARAM_TYPE_BUF_RW, \
diff --git a/include/soc/qcom/service-notifier.h b/include/soc/qcom/service-notifier.h
index 0106801fc173..740f7f644a02 100644
--- a/include/soc/qcom/service-notifier.h
+++ b/include/soc/qcom/service-notifier.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,9 +25,12 @@ enum qmi_servreg_notif_service_state_enum_type_v01 {
};
enum pd_subsys_state {
- CRASHED,
- SHUTDOWN,
- UNKNOWN,
+ ROOT_PD_DOWN,
+ ROOT_PD_UP,
+ ROOT_PD_ERR_FATAL,
+ ROOT_PD_WDOG_BITE,
+ ROOT_PD_SHUTDOWN,
+ USER_PD_STATE_CHANGE,
};
#if defined(CONFIG_MSM_SERVICE_NOTIFIER)
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index ceba9f7d759a..ddc21d0c1bbb 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -42,6 +42,8 @@ struct param_outband {
#define ADM_MATRIX_ID_AUDIO_TX 1
#define ADM_MATRIX_ID_COMPRESSED_AUDIO_RX 2
+
+#define ADM_MATRIX_ID_LISTEN_TX 4
/* Enumeration for an audio Tx matrix ID.*/
#define ADM_MATRIX_ID_AUDIOX 1
@@ -1349,6 +1351,8 @@ struct afe_mod_enable_param {
* #AFE_MODULE_SIDETONE_IIR_FILTER module.
*/
#define AFE_PARAM_ID_SIDETONE_IIR_FILTER_CONFIG 0x00010204
+#define MAX_SIDETONE_IIR_DATA_SIZE 224
+#define MAX_NO_IIR_FILTER_STAGE 10
struct afe_sidetone_iir_filter_config_params {
u16 num_biquad_stages;
@@ -1360,6 +1364,7 @@ struct afe_sidetone_iir_filter_config_params {
/* Pregain for the compensating filter response.
* Supported values: Any number in Q13 format
*/
+ uint8_t iir_config[MAX_SIDETONE_IIR_DATA_SIZE];
} __packed;
#define AFE_MODULE_LOOPBACK 0x00010205
@@ -1511,6 +1516,55 @@ struct afe_loopback_cfg_v1 {
} __packed;
+struct afe_loopback_sidetone_gain {
+ u16 rx_port_id;
+ u16 gain;
+} __packed;
+
+struct loopback_cfg_data {
+ u32 loopback_cfg_minor_version;
+/* Minor version used for tracking the version of the RMC module
+ * configuration interface.
+ * Supported values: #AFE_API_VERSION_LOOPBACK_CONFIG
+ */
+ u16 dst_port_id;
+ /* Destination Port Id. */
+ u16 routing_mode;
+/* Specifies data path type from src to dest port.
+ * Supported values:
+ * #LB_MODE_DEFAULT
+ * #LB_MODE_SIDETONE
+ * #LB_MODE_EC_REF_VOICE_AUDIO
+ * #LB_MODE_EC_REF_VOICE_A
+ * #LB_MODE_EC_REF_VOICE
+ */
+
+ u16 enable;
+/* Specifies whether to enable (1) or
+ * disable (0) an AFE loopback.
+ */
+ u16 reserved;
+/* Reserved for 32-bit alignment. This field must be set to 0.
+ */
+} __packed;
+
+struct afe_st_loopback_cfg_v1 {
+ struct apr_hdr hdr;
+ struct afe_port_cmd_set_param_v2 param;
+ struct afe_port_param_data_v2 gain_pdata;
+ struct afe_loopback_sidetone_gain gain_data;
+ struct afe_port_param_data_v2 cfg_pdata;
+ struct loopback_cfg_data cfg_data;
+} __packed;
+
+struct afe_loopback_iir_cfg_v2 {
+ struct apr_hdr hdr;
+ struct afe_port_cmd_set_param_v2 param;
+ struct afe_port_param_data_v2 st_iir_enable_pdata;
+ struct afe_mod_enable_param st_iir_mode_enable_data;
+ struct afe_port_param_data_v2 st_iir_filter_config_pdata;
+ struct afe_sidetone_iir_filter_config_params st_iir_filter_config_data;
+} __packed;
#define AFE_MODULE_SPEAKER_PROTECTION 0x00010209
#define AFE_PARAM_ID_SPKR_PROT_CONFIG 0x0001020a
#define AFE_API_VERSION_SPKR_PROT_CONFIG 0x1
@@ -1764,11 +1818,14 @@ struct afe_port_data_cmd_rt_proxy_port_read_v2 {
#define AFE_PORT_SAMPLE_RATE_16K 16000
#define AFE_PORT_SAMPLE_RATE_48K 48000
#define AFE_PORT_SAMPLE_RATE_96K 96000
+#define AFE_PORT_SAMPLE_RATE_176P4K 176400
#define AFE_PORT_SAMPLE_RATE_192K 192000
+#define AFE_PORT_SAMPLE_RATE_352P8K 352800
#define AFE_LINEAR_PCM_DATA 0x0
#define AFE_NON_LINEAR_DATA 0x1
#define AFE_LINEAR_PCM_DATA_PACKED_60958 0x2
#define AFE_NON_LINEAR_DATA_PACKED_60958 0x3
+#define AFE_GENERIC_COMPRESSED 0x8
/* This param id is used to configure I2S interface */
#define AFE_PARAM_ID_I2S_CONFIG 0x0001020D
@@ -2417,6 +2474,13 @@ struct afe_param_id_slimbus_cfg {
*/
#define AFE_PARAM_ID_USB_AUDIO_DEV_PARAMS 0x000102A5
+
+/* ID of the parameter used to set the endianness value for the
+ * USB audio device. It should be used with
+ * AFE_MODULE_AUDIO_DEV_INTERFACE
+ */
+#define AFE_PARAM_ID_USB_AUDIO_DEV_LPCM_FMT 0x000102AA
+
/* Minor version used for tracking USB audio configuration */
#define AFE_API_MINIOR_VERSION_USB_AUDIO_CONFIG 0x1
@@ -2432,6 +2496,15 @@ struct afe_param_id_usb_audio_dev_params {
u32 dev_token;
} __packed;
+struct afe_param_id_usb_audio_dev_lpcm_fmt {
+/* Minor version used for tracking USB audio device parameter.
+ * Supported values: AFE_API_MINIOR_VERSION_USB_AUDIO_CONFIG
+ */
+ u32 cfg_minor_version;
+/* Endianness of actual end USB audio device */
+ u32 endian;
+} __packed;
+
/* ID of the parameter used by AFE_PARAM_ID_USB_AUDIO_CONFIG to configure
* USB audio interface. It should be used with AFE_MODULE_AUDIO_DEV_INTERFACE
*/
@@ -2476,13 +2549,18 @@ struct afe_param_id_usb_audio_cfg {
u16 reserved;
/* device token of actual end USB aduio device */
u32 dev_token;
+/* endianness of this interface */
+ u32 endian;
} __packed;
struct afe_usb_audio_dev_param_command {
struct apr_hdr hdr;
struct afe_port_cmd_set_param_v2 param;
struct afe_port_param_data_v2 pdata;
- struct afe_param_id_usb_audio_dev_params usb_dev;
+ union {
+ struct afe_param_id_usb_audio_dev_params usb_dev;
+ struct afe_param_id_usb_audio_dev_lpcm_fmt lpcm_fmt;
+ };
} __packed;
/*
@@ -2680,25 +2758,31 @@ struct afe_param_id_tdm_cfg {
- #AFE_PORT_SAMPLE_RATE_16K
- #AFE_PORT_SAMPLE_RATE_24K
- #AFE_PORT_SAMPLE_RATE_32K
- - #AFE_PORT_SAMPLE_RATE_48K @tablebulletend */
+ - #AFE_PORT_SAMPLE_RATE_48K
+ - #AFE_PORT_SAMPLE_RATE_176P4K
+ - #AFE_PORT_SAMPLE_RATE_352P8K @tablebulletend
+ */
u32 bit_width;
/**< Bit width of the sample.
- @values 16, 24 */
+ * @values 16, 24, 32
+ */
u16 data_format;
- /**< Data format: linear and compressed
-
+ /**< Data format: linear ,compressed, generic compresssed
@values
- #AFE_LINEAR_PCM_DATA
- - #AFE_NON_LINEAR_DATA @tablebulletend */
+ - #AFE_NON_LINEAR_DATA
+ - #AFE_GENERIC_COMPRESSED
+ */
u16 sync_mode;
/**< TDM synchronization setting.
@values (short, long, slot) sync mode
- #AFE_PORT_TDM_SHORT_SYNC_BIT_MODE
- #AFE_PORT_TDM_LONG_SYNC_MODE
- - #AFE_PORT_TDM_SHORT_SYNC_SLOT_MODE @tablebulletend */
+ - #AFE_PORT_TDM_SHORT_SYNC_SLOT_MODE @tablebulletend
+ */
u16 sync_src;
/**< Synchronization source.
@@ -3554,7 +3638,7 @@ struct afe_lpass_core_shared_clk_config_command {
#define DEFAULT_COPP_TOPOLOGY 0x00010314
#define DEFAULT_POPP_TOPOLOGY 0x00010BE4
#define COMPRESSED_PASSTHROUGH_DEFAULT_TOPOLOGY 0x0001076B
-#define COMPRESS_PASSTHROUGH_NONE_TOPOLOGY 0x00010774
+#define COMPRESSED_PASSTHROUGH_NONE_TOPOLOGY 0x00010774
#define VPM_TX_SM_ECNS_COPP_TOPOLOGY 0x00010F71
#define VPM_TX_DM_FLUENCE_COPP_TOPOLOGY 0x00010F72
#define VPM_TX_QMIC_FLUENCE_COPP_TOPOLOGY 0x00010F75
@@ -3860,6 +3944,8 @@ struct asm_softvolume_params {
#define ASM_MEDIA_FMT_EVRCWB_FS 0x00010BF0
+#define ASM_MEDIA_FMT_GENERIC_COMPRESSED 0x00013212
+
#define ASM_MAX_EQ_BANDS 12
#define ASM_DATA_CMD_MEDIA_FMT_UPDATE_V2 0x00010D98
@@ -3869,6 +3955,40 @@ u32 fmt_blk_size;
/* Media format block size in bytes.*/
} __packed;
+struct asm_generic_compressed_fmt_blk_t {
+ struct apr_hdr hdr;
+ struct asm_data_cmd_media_fmt_update_v2 fmt_blk;
+
+ /*
+ * Channel mapping array of bitstream output.
+ * Channel[i] mapping describes channel i inside the buffer, where
+ * i < num_channels. All valid used channels must be
+ * present at the beginning of the array.
+ */
+ uint8_t channel_mapping[8];
+
+ /*
+ * Number of channels of the incoming bitstream.
+ * Supported values: 1,2,3,4,5,6,7,8
+ */
+ uint16_t num_channels;
+
+ /*
+ * Nominal bits per sample value of the incoming bitstream.
+ * Supported values: 16, 32
+ */
+ uint16_t bits_per_sample;
+
+ /*
+ * Nominal sampling rate of the incoming bitstream.
+ * Supported values: 8000, 11025, 16000, 22050, 24000, 32000,
+ * 44100, 48000, 88200, 96000, 176400, 192000,
+ * 352800, 384000
+ */
+ uint32_t sampling_rate;
+
+} __packed;
+
struct asm_multi_channel_pcm_fmt_blk_v2 {
struct apr_hdr hdr;
struct asm_data_cmd_media_fmt_update_v2 fmt_blk;
@@ -4263,6 +4383,9 @@ struct asm_multi_channel_pcm_enc_cfg_v2 {
/* Enumeration for the raw AAC format. */
#define ASM_MEDIA_FMT_AAC_FORMAT_FLAG_RAW 3
+/* Enumeration for the AAC LATM format. */
+#define ASM_MEDIA_FMT_AAC_FORMAT_FLAG_LATM 4
+
#define ASM_MEDIA_FMT_AAC_AOT_LC 2
#define ASM_MEDIA_FMT_AAC_AOT_SBR 5
#define ASM_MEDIA_FMT_AAC_AOT_PS 29
@@ -4921,8 +5044,8 @@ struct asm_amrwbplus_fmt_blk_v2 {
} __packed;
-#define ASM_MEDIA_FMT_AC3 0x00010DEE
-#define ASM_MEDIA_FMT_EAC3 0x00010DEF
+#define ASM_MEDIA_FMT_AC3 0x00010DEE
+#define ASM_MEDIA_FMT_EAC3 0x00010DEF
#define ASM_MEDIA_FMT_DTS 0x00010D88
#define ASM_MEDIA_FMT_MP2 0x00010DE9
#define ASM_MEDIA_FMT_FLAC 0x00010C16
@@ -4931,7 +5054,6 @@ struct asm_amrwbplus_fmt_blk_v2 {
#define ASM_MEDIA_FMT_APE 0x00012F32
#define ASM_MEDIA_FMT_DSD 0x00012F3E
-
/* Media format ID for adaptive transform acoustic coding. This
* ID is used by the #ASM_STREAM_CMD_OPEN_WRITE_COMPRESSED command
* only.
@@ -5955,6 +6077,138 @@ struct asm_stream_cmd_open_loopback_v2 {
/* Reserved for future use. This field must be set to zero. */
} __packed;
+
+#define ASM_STREAM_CMD_OPEN_TRANSCODE_LOOPBACK 0x00010DBA
+
+/* Bitmask for the stream's Performance mode. */
+#define ASM_BIT_MASK_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK \
+ (0x70000000UL)
+
+/* Bit shift for the stream's Performance mode. */
+#define ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK 28
+
+/* Bitmask for the decoder converter enable flag. */
+#define ASM_BIT_MASK_DECODER_CONVERTER_FLAG (0x00000078UL)
+
+/* Shift value for the decoder converter enable flag. */
+#define ASM_SHIFT_DECODER_CONVERTER_FLAG 3
+
+/* Converter mode is None (Default). */
+#define ASM_CONVERTER_MODE_NONE 0
+
+/* Converter mode is DDP-to-DD. */
+#define ASM_DDP_DD_CONVERTER_MODE 1
+
+/* Identifies a special converter mode where source and sink formats
+ * are the same but postprocessing must applied. Therefore, Decode
+ * @rarrow Re-encode is necessary.
+ */
+#define ASM_POST_PROCESS_CONVERTER_MODE 2
+
+
+struct asm_stream_cmd_open_transcode_loopback_t {
+ struct apr_hdr hdr;
+ u32 mode_flags;
+/* Mode Flags specifies the performance mode in which this stream
+ * is to be opened.
+ * Supported values{for bits 30 to 28}(stream_perf_mode flag)
+ *
+ * #ASM_LEGACY_STREAM_SESSION -- This mode ensures backward
+ * compatibility to the original behavior
+ * of ASM_STREAM_CMD_OPEN_TRANSCODE_LOOPBACK
+ *
+ * #ASM_LOW_LATENCY_STREAM_SESSION -- Opens a loopback session by using
+ * shortened buffers in low latency POPP
+ * - Recommendation: Do not enable high latency algorithms. They might
+ * negate the benefits of opening a low latency stream, and they
+ * might also suffer quality degradation from unexpected jitter.
+ * - This Low Latency mode is supported only for PCM In and PCM Out
+ * loopbacks. An error is returned if Low Latency mode is opened for
+ * other transcode loopback modes.
+ * - To configure this subfield, use
+ * ASM_BIT_MASK_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK and
+ * ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK.
+ *
+ * Supported values{for bits 6 to 3} (decoder-converter compatibility)
+ * #ASM_CONVERTER_MODE_NONE (0x0) -- Default
+ * #ASM_DDP_DD_CONVERTER_MODE (0x1)
+ * #ASM_POST_PROCESS_CONVERTER_MODE (0x2)
+ * 0x3-0xF -- Reserved for future use
+ * - Use #ASM_BIT_MASK_DECODER_CONVERTER_FLAG and
+ * ASM_SHIFT_DECODER_CONVERTER_FLAG to set this bit
+ * All other bits are reserved; clients must set them to 0.
+ */
+
+ u32 src_format_id;
+/* Specifies the media format of the input audio stream.
+ *
+ * Supported values
+ * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V2
+ * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V3
+ * - #ASM_MEDIA_FMT_DTS
+ * - #ASM_MEDIA_FMT_EAC3_DEC
+ * - #ASM_MEDIA_FMT_EAC3
+ * - #ASM_MEDIA_FMT_AC3_DEC
+ * - #ASM_MEDIA_FMT_AC3
+ */
+ u32 sink_format_id;
+/* Specifies the media format of the output stream.
+ *
+ * Supported values
+ * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V2
+ * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V3
+ * - #ASM_MEDIA_FMT_DTS (not supported in Low Latency mode)
+ * - #ASM_MEDIA_FMT_EAC3_DEC (not supported in Low Latency mode)
+ * - #ASM_MEDIA_FMT_EAC3 (not supported in Low Latency mode)
+ * - #ASM_MEDIA_FMT_AC3_DEC (not supported in Low Latency mode)
+ * - #ASM_MEDIA_FMT_AC3 (not supported in Low Latency mode)
+ */
+
+ u32 audproc_topo_id;
+/* Postprocessing topology ID, which specifies the topology (order of
+ * processing) of postprocessing algorithms.
+ *
+ * Supported values
+ * - #ASM_STREAM_POSTPROC_TOPO_ID_DEFAULT
+ * - #ASM_STREAM_POSTPROC_TOPO_ID_PEAKMETER
+ * - #ASM_STREAM_POSTPROC_TOPO_ID_MCH_PEAK_VOL
+ * - #ASM_STREAM_POSTPROC_TOPO_ID_NONE
+ * Topologies can be added through #ASM_CMD_ADD_TOPOLOGIES.
+ * This field is ignored for the Converter mode, in which no
+ * postprocessing is performed.
+ */
+
+ u16 src_endpoint_type;
+/* Specifies the source endpoint that provides the input samples.
+ *
+ * Supported values
+ * - 0 -- Tx device matrix or stream router (gateway to the hardware
+ * ports)
+ * - All other values are reserved
+ * Clients must set this field to 0. Otherwise, an error is returned.
+ */
+
+ u16 sink_endpoint_type;
+/* Specifies the sink endpoint type.
+ *
+ * Supported values
+ * - 0 -- Rx device matrix or stream router (gateway to the hardware
+ * ports)
+ * - All other values are reserved
+ * Clients must set this field to 0. Otherwise, an error is returned.
+ */
+
+ u16 bits_per_sample;
+/* Number of bits per sample processed by the ASM modules.
+ * Supported values 16, 24
+ */
+
+ u16 reserved;
+/* This field must be set to 0.
+ */
+} __packed;
+
+
#define ASM_STREAM_CMD_CLOSE 0x00010BCD
#define ASM_STREAM_CMD_FLUSH 0x00010BCE
@@ -8806,6 +9060,31 @@ struct asm_dts_eagle_param_get {
struct asm_stream_cmd_get_pp_params_v2 param;
} __packed;
+/* Opcode to set BT address and license for aptx decoder */
+#define APTX_DECODER_BT_ADDRESS 0x00013201
+#define APTX_CLASSIC_DEC_LICENSE_ID 0x00013202
+
+struct aptx_dec_bt_addr_cfg {
+ uint32_t lap;
+ uint32_t uap;
+ uint32_t nap;
+} __packed;
+
+struct aptx_dec_bt_dev_addr {
+ struct apr_hdr hdr;
+ struct asm_stream_cmd_set_encdec_param encdec;
+ struct aptx_dec_bt_addr_cfg bt_addr_cfg;
+} __packed;
+
+struct asm_aptx_dec_fmt_blk_v2 {
+ struct apr_hdr hdr;
+ struct asm_data_cmd_media_fmt_update_v2 fmtblk;
+ u32 sample_rate;
+/* Number of samples per second.
+ * Supported values: 44100 and 48000 Hz
+ */
+} __packed;
+
/* LSM Specific */
#define VW_FEAT_DIM (39)
@@ -8833,6 +9112,7 @@ struct asm_dts_eagle_param_get {
#define LSM_SESSION_EVENT_DETECTION_STATUS_V2 (0x00012B01)
#define LSM_DATA_EVENT_READ_DONE (0x00012B02)
#define LSM_DATA_EVENT_STATUS (0x00012B03)
+#define LSM_SESSION_EVENT_DETECTION_STATUS_V3 (0x00012B04)
#define LSM_MODULE_ID_VOICE_WAKEUP (0x00012C00)
#define LSM_PARAM_ID_ENDPOINT_DETECT_THRESHOLD (0x00012C01)
@@ -8845,6 +9125,12 @@ struct asm_dts_eagle_param_get {
#define LSM_PARAM_ID_LAB_ENABLE (0x00012C09)
#define LSM_PARAM_ID_LAB_CONFIG (0x00012C0A)
#define LSM_MODULE_ID_FRAMEWORK (0x00012C0E)
+#define LSM_PARAM_ID_SWMAD_CFG (0x00012C18)
+#define LSM_PARAM_ID_SWMAD_MODEL (0x00012C19)
+#define LSM_PARAM_ID_SWMAD_ENABLE (0x00012C1A)
+#define LSM_PARAM_ID_POLLING_ENABLE (0x00012C1B)
+#define LSM_PARAM_ID_MEDIA_FMT (0x00012C1E)
+#define LSM_PARAM_ID_FWK_MODE_CONFIG (0x00012C27)
/* HW MAD specific */
#define AFE_MODULE_HW_MAD (0x00010230)
@@ -9751,6 +10037,108 @@ struct afe_port_group_create {
union afe_port_group_config data;
} __packed;
+/* ID of the parameter used by #AFE_MODULE_AUDIO_DEV_INTERFACE to specify
+ * the timing statistics of the corresponding device interface.
+ * Client can periodically query for the device time statistics to help adjust
+ * the PLL based on the drift value. The get param command must be sent to
+ * AFE port ID corresponding to device interface
+
+ * This parameter ID supports following get param commands:
+ * #AFE_PORT_CMD_GET_PARAM_V2 and
+ * #AFE_PORT_CMD_GET_PARAM_V3.
+ */
+#define AFE_PARAM_ID_DEV_TIMING_STATS 0x000102AD
+
+/* Version information used to handle future additions to AFE device
+ * interface timing statistics (for backward compatibility).
+ */
+#define AFE_API_VERSION_DEV_TIMING_STATS 0x1
+
+/* Enumeration for specifying a sink(Rx) device */
+#define AFE_SINK_DEVICE 0x0
+
+/* Enumeration for specifying a source(Tx) device */
+#define AFE_SOURCE_DEVICE 0x1
+
+/* Enumeration for specifying the drift reference is of type AV Timer */
+#define AFE_REF_TIMER_TYPE_AVTIMER 0x0
+
+/* Message payload structure for the
+ * AFE_PARAM_ID_DEV_TIMING_STATS parameter.
+ */
+struct afe_param_id_dev_timing_stats {
+ /* Minor version used to track the version of device interface timing
+ * statistics. Currently, the supported version is 1.
+ * @values #AFE_API_VERSION_DEV_TIMING_STATS
+ */
+ u32 minor_version;
+
+ /* Indicates the device interface direction as either
+ * source (Tx) or sink (Rx).
+ * @values
+ * #AFE_SINK_DEVICE
+ * #AFE_SOURCE_DEVICE
+ */
+ u16 device_direction;
+
+ /* Reference timer for drift accumulation and time stamp information.
+ * @values
+ * #AFE_REF_TIMER_TYPE_AVTIMER @tablebulletend
+ */
+ u16 reference_timer;
+
+ /*
+ * Flag to indicate if resync is required on the client side for
+ * drift correction. Flag is set to TRUE for the first get_param
+ * response after device interface starts. This flag value can be
+ * used by client to identify if device interface restart has
+ * happened and if any re-sync is required at their end for drift
+ * correction.
+ * @values
+ * 0: FALSE (Resync not required)
+ * 1: TRUE (Resync required) @tablebulletend
+ */
+ u32 resync_flag;
+
+ /* Accumulated drift value in microseconds. This value is updated
+ * every 100th ms.
+ * Positive drift value indicates AV timer is running faster than device
+ * Negative drift value indicates AV timer is running slower than device
+ * @values Any valid int32 number
+ */
+ s32 acc_drift_value;
+
+ /* Lower 32 bits of the 64-bit absolute timestamp of reference
+ * timer in microseconds.
+
+ * This timestamp corresponds to the time when the drift values
+ * are accumlated for every 100th ms.
+ * @values Any valid uint32 number
+ */
+ u32 ref_timer_abs_ts_lsw;
+
+ /* Upper 32 bits of the 64-bit absolute timestamp of reference
+ * timer in microseconds.
+ * This timestamp corresponds to the time when the drift values
+ * are accumlated for every 100th ms.
+ * @values Any valid uint32 number
+ */
+ u32 ref_timer_abs_ts_msw;
+} __packed;
+
+struct afe_av_dev_drift_get_param {
+ struct apr_hdr hdr;
+ struct afe_port_cmd_get_param_v2 get_param;
+ struct afe_port_param_data_v2 pdata;
+ struct afe_param_id_dev_timing_stats timing_stats;
+} __packed;
+
+struct afe_av_dev_drift_get_param_resp {
+ uint32_t status;
+ struct afe_port_param_data_v2 pdata;
+ struct afe_param_id_dev_timing_stats timing_stats;
+} __packed;
+
/* Command for Matrix or Stream Router */
#define ASM_SESSION_CMD_SET_MTMX_STRTR_PARAMS_V2 0x00010DCE
/* Module for AVSYNC */
@@ -9961,6 +10349,8 @@ enum {
COMPRESSED_PASSTHROUGH,
COMPRESSED_PASSTHROUGH_CONVERT,
COMPRESSED_PASSTHROUGH_DSD,
+ LISTEN,
+ COMPRESSED_PASSTHROUGH_GEN,
};
#define AUDPROC_MODULE_ID_COMPRESSED_MUTE 0x00010770
@@ -10032,4 +10422,21 @@ struct adm_param_fluence_sourcetracking_t {
#define AUDPROC_PARAM_ID_AUDIOSPHERE_DESIGN_MULTICHANNEL_INPUT 0x0001091D
#define AUDPROC_PARAM_ID_AUDIOSPHERE_OPERATING_INPUT_MEDIA_INFO 0x0001091E
+
+#define AUDPROC_MODULE_ID_VOICE_TX_SECNS 0x10027059
+#define AUDPROC_PARAM_IDX_SEC_PRIMARY_MIC_CH 0x10014444
+
+struct admx_sec_primary_mic_ch {
+ uint16_t version;
+ uint16_t reserved;
+ uint16_t sec_primary_mic_ch;
+ uint16_t reserved1;
+} __packed;
+
+
+struct adm_set_sec_primary_ch_params {
+ struct adm_cmd_set_pp_params_v5 params;
+ struct adm_param_data_v5 data;
+ struct admx_sec_primary_mic_ch sec_primary_mic_ch_data;
+} __packed;
#endif /*_APR_AUDIO_V2_H_ */
diff --git a/include/sound/cpe_core.h b/include/sound/cpe_core.h
index 323a63fd6238..846cf819b9e5 100644
--- a/include/sound/cpe_core.h
+++ b/include/sound/cpe_core.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2016, Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2017, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -162,7 +162,7 @@ struct wcd_cpe_lsm_ops {
int (*lsm_set_one_param)(void *core_handle,
struct cpe_lsm_session *session,
struct lsm_params_info *p_info,
- void *data, enum LSM_PARAM_TYPE param_type);
+ void *data, uint32_t param_type);
void (*lsm_get_snd_model_offset)
(void *core_handle, struct cpe_lsm_session *,
size_t *offset);
diff --git a/include/sound/jack.h b/include/sound/jack.h
index 424f8fbae601..0d2a334fbeaa 100644
--- a/include/sound/jack.h
+++ b/include/sound/jack.h
@@ -66,12 +66,12 @@ enum snd_jack_types {
SND_JACK_MICROPHONE2,
/* Kept separate from switches to facilitate implementation */
- SND_JACK_BTN_0 = 0x4000,
- SND_JACK_BTN_1 = 0x2000,
- SND_JACK_BTN_2 = 0x1000,
- SND_JACK_BTN_3 = 0x0800,
- SND_JACK_BTN_4 = 0x0400,
- SND_JACK_BTN_5 = 0x0200,
+ SND_JACK_BTN_0 = 0x8000,
+ SND_JACK_BTN_1 = 0x4000,
+ SND_JACK_BTN_2 = 0x2000,
+ SND_JACK_BTN_3 = 0x1000,
+ SND_JACK_BTN_4 = 0x0800,
+ SND_JACK_BTN_5 = 0x0400,
};
/* Keep in sync with definitions above */
diff --git a/include/sound/q6adm-v2.h b/include/sound/q6adm-v2.h
index 47e8e2a73920..42d048f24e12 100644
--- a/include/sound/q6adm-v2.h
+++ b/include/sound/q6adm-v2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -58,9 +58,9 @@ enum {
struct route_payload {
unsigned int copp_idx[MAX_COPPS_PER_PORT];
unsigned int port_id[MAX_COPPS_PER_PORT];
- int app_type;
- int acdb_dev_id;
- int sample_rate;
+ int app_type[MAX_COPPS_PER_PORT];
+ int acdb_dev_id[MAX_COPPS_PER_PORT];
+ int sample_rate[MAX_COPPS_PER_PORT];
unsigned short num_copps;
unsigned int session_id;
};
@@ -96,7 +96,7 @@ int adm_unmap_rtac_block(uint32_t *mem_map_handle);
int adm_close(int port, int topology, int perf_mode);
int adm_matrix_map(int path, struct route_payload payload_map,
- int perf_mode);
+ int perf_mode, uint32_t passthr_mode);
int adm_connect_afe_port(int mode, int session_id, int port_id);
@@ -138,6 +138,9 @@ int adm_set_softvolume(int port_id, int copp_idx,
int adm_set_mic_gain(int port_id, int copp_idx, int volume);
+int adm_send_set_multichannel_ec_primary_mic_ch(int port_id, int copp_idx,
+ int primary_mic_ch);
+
int adm_param_enable(int port_id, int copp_idx, int module_id, int enable);
int adm_send_calibration(int port_id, int copp_idx, int path, int perf_mode,
diff --git a/include/sound/q6afe-v2.h b/include/sound/q6afe-v2.h
index e0da428fa52f..b1c3b0baf4b3 100644
--- a/include/sound/q6afe-v2.h
+++ b/include/sound/q6afe-v2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -42,6 +42,8 @@
#define AFE_CLK_VERSION_V1 1
#define AFE_CLK_VERSION_V2 2
+typedef int (*routing_cb)(int port);
+
enum {
/* IDX 0->4 */
IDX_PRIMARY_I2S_RX,
@@ -265,7 +267,7 @@ struct aanc_data {
int afe_open(u16 port_id, union afe_port_config *afe_config, int rate);
int afe_close(int port_id);
int afe_loopback(u16 enable, u16 rx_port, u16 tx_port);
-int afe_sidetone(u16 tx_port_id, u16 rx_port_id, u16 enable, uint16_t gain);
+int afe_sidetone_enable(u16 tx_port_id, u16 rx_port_id, bool enable);
int afe_loopback_gain(u16 port_id, u16 volume);
int afe_validate_port(u16 port_id);
int afe_get_port_index(u16 port_id);
@@ -362,5 +364,8 @@ int afe_send_custom_tdm_header_cfg(
struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg,
u16 port_id);
int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
- u32 rate);
+ u32 rate, u16 num_groups);
+void afe_set_routing_callback(routing_cb);
+int afe_get_av_dev_drift(struct afe_param_id_dev_timing_stats *timing_stats,
+ u16 port);
#endif /* __Q6AFE_V2_H__ */
diff --git a/include/sound/q6asm-v2.h b/include/sound/q6asm-v2.h
index efa5af8e661c..76bb795119c2 100644
--- a/include/sound/q6asm-v2.h
+++ b/include/sound/q6asm-v2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -53,6 +53,8 @@
#define FORMAT_G711_MLAW_FS 0x001b
#define FORMAT_DTS 0x001c
#define FORMAT_DSD 0x001d
+#define FORMAT_APTX 0x001e
+#define FORMAT_GEN_COMPR 0x001f
#define ENCDEC_SBCBITRATE 0x0001
#define ENCDEC_IMMEDIATE_DECODE 0x0002
@@ -270,7 +272,7 @@ int q6asm_open_read_v3(struct audio_client *ac, uint32_t format,
uint16_t bits_per_sample);
int q6asm_open_read_v4(struct audio_client *ac, uint32_t format,
- uint16_t bits_per_sample);
+ uint16_t bits_per_sample, bool ts_mode);
int q6asm_open_write(struct audio_client *ac, uint32_t format
/*, uint16_t bits_per_sample*/);
@@ -499,6 +501,11 @@ int q6asm_media_format_block_multi_ch_pcm_v2(
uint32_t rate, uint32_t channels,
bool use_default_chmap, char *channel_map,
uint16_t bits_per_sample);
+int q6asm_media_format_block_gen_compr(
+ struct audio_client *ac,
+ uint32_t rate, uint32_t channels,
+ bool use_default_chmap, char *channel_map,
+ uint16_t bits_per_sample);
int q6asm_media_format_block_multi_ch_pcm_v3(struct audio_client *ac,
uint32_t rate, uint32_t channels,
@@ -552,6 +559,9 @@ int q6asm_media_format_block_ape(struct audio_client *ac,
int q6asm_media_format_block_dsd(struct audio_client *ac,
struct asm_dsd_cfg *cfg, int stream_id);
+int q6asm_stream_media_format_block_aptx_dec(struct audio_client *ac,
+ uint32_t sr, int stream_id);
+
int q6asm_ds1_set_endp_params(struct audio_client *ac,
int param_id, int param_value);
@@ -574,6 +584,10 @@ int q6asm_dts_eagle_set(struct audio_client *ac, int param_id, uint32_t size,
int q6asm_dts_eagle_get(struct audio_client *ac, int param_id, uint32_t size,
void *data, struct param_outband *po, int m_id);
+/* Send aptx decoder BT address */
+int q6asm_set_aptx_dec_bt_addr(struct audio_client *ac,
+ struct aptx_dec_bt_addr_cfg *cfg);
+
/* Set SoftPause Params */
int q6asm_set_softpause(struct audio_client *ac,
struct asm_softpause_params *param);
diff --git a/include/sound/q6lsm.h b/include/sound/q6lsm.h
index fb848bc70873..4805246766d6 100644
--- a/include/sound/q6lsm.h
+++ b/include/sound/q6lsm.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2017, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,10 @@
#define MAX_NUM_CONFIDENCE 20
+#define ADM_LSM_PORT_ID 0xADCB
+
+#define LSM_MAX_NUM_CHANNELS 8
+
typedef void (*lsm_app_cb)(uint32_t opcode, uint32_t token,
uint32_t *payload, void *priv);
@@ -49,11 +53,12 @@ struct lsm_lab_buffer {
uint32_t mem_map_handle;
};
-struct lsm_lab_hw_params {
+struct lsm_hw_params {
u16 sample_rate;
u16 sample_size;
u32 buf_sz;
u32 period_count;
+ u16 num_chs;
};
struct lsm_client {
@@ -79,8 +84,12 @@ struct lsm_client {
bool lab_enable;
bool lab_started;
struct lsm_lab_buffer *lab_buffer;
- struct lsm_lab_hw_params hw_params;
+ struct lsm_hw_params hw_params;
bool use_topology;
+ int session_state;
+ bool poll_enable;
+ int perf_mode;
+ uint32_t event_mode;
};
struct lsm_stream_cmd_open_tx {
@@ -134,6 +143,27 @@ struct lsm_param_connect_to_port {
uint16_t reserved;
} __packed;
+struct lsm_param_poll_enable {
+ struct lsm_param_payload_common common;
+ uint32_t minor_version;
+ /* indicates to voice wakeup that HW MAD/SW polling is enabled or not */
+ uint32_t polling_enable;
+} __packed;
+
+struct lsm_param_fwk_mode_cfg {
+ struct lsm_param_payload_common common;
+ uint32_t minor_version;
+ uint32_t mode;
+} __packed;
+
+struct lsm_param_media_fmt {
+ struct lsm_param_payload_common common;
+ uint32_t minor_version;
+ uint32_t sample_rate;
+ uint16_t num_channels;
+ uint16_t bit_width;
+ uint8_t channel_mapping[LSM_MAX_NUM_CHANNELS];
+} __packed;
/*
* This param cannot be sent in this format.
@@ -163,11 +193,22 @@ struct lsm_cmd_set_params_conf {
struct lsm_param_min_confidence_levels conf_payload;
} __packed;
-struct lsm_cmd_set_opmode_connectport {
+struct lsm_cmd_set_params_opmode {
+ struct apr_hdr msg_hdr;
+ struct lsm_set_params_hdr params_hdr;
+ struct lsm_param_op_mode op_mode;
+} __packed;
+
+struct lsm_cmd_set_connectport {
+ struct apr_hdr msg_hdr;
+ struct lsm_set_params_hdr params_hdr;
+ struct lsm_param_connect_to_port connect_to_port;
+} __packed;
+
+struct lsm_cmd_poll_enable {
struct apr_hdr msg_hdr;
struct lsm_set_params_hdr params_hdr;
- struct lsm_param_connect_to_port connect_to_port;
- struct lsm_param_op_mode op_mode;
+ struct lsm_param_poll_enable poll_enable;
} __packed;
struct lsm_param_epd_thres {
@@ -250,6 +291,19 @@ struct lsm_cmd_read_done {
uint32_t flags;
} __packed;
+struct lsm_cmd_set_fwk_mode_cfg {
+ struct apr_hdr msg_hdr;
+ struct lsm_set_params_hdr params_hdr;
+ struct lsm_param_fwk_mode_cfg fwk_mode_cfg;
+} __packed;
+
+struct lsm_cmd_set_media_fmt {
+ struct apr_hdr msg_hdr;
+ struct lsm_set_params_hdr params_hdr;
+ struct lsm_param_media_fmt media_fmt;
+} __packed;
+
+
struct lsm_client *q6lsm_client_alloc(lsm_app_cb cb, void *priv);
void q6lsm_client_free(struct lsm_client *client);
int q6lsm_open(struct lsm_client *client, uint16_t app_id);
@@ -274,8 +328,11 @@ int q6lsm_read(struct lsm_client *client, struct lsm_cmd_read *read);
int q6lsm_lab_buffer_alloc(struct lsm_client *client, bool alloc);
int q6lsm_set_one_param(struct lsm_client *client,
struct lsm_params_info *p_info, void *data,
- enum LSM_PARAM_TYPE param_type);
+ uint32_t param_type);
void q6lsm_sm_set_param_data(struct lsm_client *client,
struct lsm_params_info *p_info,
size_t *offset);
+int q6lsm_set_port_connected(struct lsm_client *client);
+int q6lsm_set_fwk_mode_cfg(struct lsm_client *client, uint32_t event_mode);
+int q6lsm_set_media_fmt_params(struct lsm_client *client);
#endif /* __Q6LSM_H__ */
diff --git a/include/trace/events/power.h b/include/trace/events/power.h
index 8387688fb71b..19136453a5e2 100644
--- a/include/trace/events/power.h
+++ b/include/trace/events/power.h
@@ -304,6 +304,7 @@ DEFINE_EVENT(wakeup_source, wakeup_source_deactivate,
* The clock events are used for clock enable/disable and for
* clock rate change
*/
+#if defined(CONFIG_COMMON_CLK_MSM)
DECLARE_EVENT_CLASS(clock,
TP_PROTO(const char *name, unsigned int state, unsigned int cpu_id),
@@ -401,6 +402,7 @@ TRACE_EVENT(clock_state,
__get_str(name), __entry->prepare_count,
__entry->count, __entry->rate, __entry->vdd_level)
);
+#endif /* CONFIG_COMMON_CLK_MSM */
/*
* The power domain events are used for power domains transitions
diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h
index 9d58d703527c..0cd236442864 100644
--- a/include/trace/events/sched.h
+++ b/include/trace/events/sched.h
@@ -292,6 +292,55 @@ const char *__window_print(struct trace_seq *p, const u32 *buf, int buf_len)
return ret;
}
+
+static inline s64 __rq_update_sum(struct rq *rq, bool curr, bool new)
+{
+ if (curr)
+ if (new)
+ return rq->nt_curr_runnable_sum;
+ else
+ return rq->curr_runnable_sum;
+ else
+ if (new)
+ return rq->nt_prev_runnable_sum;
+ else
+ return rq->prev_runnable_sum;
+}
+
+static inline s64 __grp_update_sum(struct rq *rq, bool curr, bool new)
+{
+ if (curr)
+ if (new)
+ return rq->grp_time.nt_curr_runnable_sum;
+ else
+ return rq->grp_time.curr_runnable_sum;
+ else
+ if (new)
+ return rq->grp_time.nt_prev_runnable_sum;
+ else
+ return rq->grp_time.prev_runnable_sum;
+}
+
+static inline s64
+__get_update_sum(struct rq *rq, enum migrate_types migrate_type,
+ bool src, bool new, bool curr)
+{
+ switch (migrate_type) {
+ case RQ_TO_GROUP:
+ if (src)
+ return __rq_update_sum(rq, curr, new);
+ else
+ return __grp_update_sum(rq, curr, new);
+ case GROUP_TO_RQ:
+ if (src)
+ return __grp_update_sum(rq, curr, new);
+ else
+ return __rq_update_sum(rq, curr, new);
+ default:
+ WARN_ON_ONCE(1);
+ return -1;
+ }
+}
#endif
TRACE_EVENT(sched_update_task_ravg,
@@ -534,17 +583,13 @@ TRACE_EVENT(sched_update_pred_demand,
TRACE_EVENT(sched_migration_update_sum,
- TP_PROTO(struct task_struct *p, enum migrate_types migrate_type, struct migration_sum_data *d),
+ TP_PROTO(struct task_struct *p, enum migrate_types migrate_type, struct rq *rq),
- TP_ARGS(p, migrate_type, d),
+ TP_ARGS(p, migrate_type, rq),
TP_STRUCT__entry(
__field(int, tcpu )
__field(int, pid )
- __field( u64, cs )
- __field( u64, ps )
- __field( s64, nt_cs )
- __field( s64, nt_ps )
__field(enum migrate_types, migrate_type )
__field( s64, src_cs )
__field( s64, src_ps )
@@ -560,30 +605,22 @@ TRACE_EVENT(sched_migration_update_sum,
__entry->tcpu = task_cpu(p);
__entry->pid = p->pid;
__entry->migrate_type = migrate_type;
- __entry->src_cs = d->src_rq ?
- d->src_rq->curr_runnable_sum :
- d->src_cpu_time->curr_runnable_sum;
- __entry->src_ps = d->src_rq ?
- d->src_rq->prev_runnable_sum :
- d->src_cpu_time->prev_runnable_sum;
- __entry->dst_cs = d->dst_rq ?
- d->dst_rq->curr_runnable_sum :
- d->dst_cpu_time->curr_runnable_sum;
- __entry->dst_ps = d->dst_rq ?
- d->dst_rq->prev_runnable_sum :
- d->dst_cpu_time->prev_runnable_sum;
- __entry->src_nt_cs = d->src_rq ?
- d->src_rq->nt_curr_runnable_sum :
- d->src_cpu_time->nt_curr_runnable_sum;
- __entry->src_nt_ps = d->src_rq ?
- d->src_rq->nt_prev_runnable_sum :
- d->src_cpu_time->nt_prev_runnable_sum;
- __entry->dst_nt_cs = d->dst_rq ?
- d->dst_rq->nt_curr_runnable_sum :
- d->dst_cpu_time->nt_curr_runnable_sum;
- __entry->dst_nt_ps = d->dst_rq ?
- d->dst_rq->nt_prev_runnable_sum :
- d->dst_cpu_time->nt_prev_runnable_sum;
+ __entry->src_cs = __get_update_sum(rq, migrate_type,
+ true, false, true);
+ __entry->src_ps = __get_update_sum(rq, migrate_type,
+ true, false, false);
+ __entry->dst_cs = __get_update_sum(rq, migrate_type,
+ false, false, true);
+ __entry->dst_ps = __get_update_sum(rq, migrate_type,
+ false, false, false);
+ __entry->src_nt_cs = __get_update_sum(rq, migrate_type,
+ true, true, true);
+ __entry->src_nt_ps = __get_update_sum(rq, migrate_type,
+ true, true, false);
+ __entry->dst_nt_cs = __get_update_sum(rq, migrate_type,
+ false, true, true);
+ __entry->dst_nt_ps = __get_update_sum(rq, migrate_type,
+ false, true, false);
),
TP_printk("pid %d task_cpu %d migrate_type %s src_cs %llu src_ps %llu dst_cs %lld dst_ps %lld src_nt_cs %llu src_nt_ps %llu dst_nt_cs %lld dst_nt_ps %lld",
diff --git a/include/uapi/drm/Kbuild b/include/uapi/drm/Kbuild
index 38d437096c35..c3c78a0d0052 100644
--- a/include/uapi/drm/Kbuild
+++ b/include/uapi/drm/Kbuild
@@ -18,3 +18,5 @@ header-y += via_drm.h
header-y += vmwgfx_drm.h
header-y += msm_drm.h
header-y += virtgpu_drm.h
+header-y += sde_drm.h
+header-y += msm_drm_pp.h
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 0b69a7753558..53d7c80f5eb0 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -229,4 +229,12 @@
*/
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
+/*
+ * Qualcomm Compressed Format
+ *
+ * Refers to a compressed variant of the base format that is compressed.
+ * Implementation may be platform and base-format specific.
+ */
+#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
+
#endif /* DRM_FOURCC_H */
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 6c11ca401de8..09c22caf34dd 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -72,6 +72,7 @@
#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
+#define DRM_MODE_FLAG_SEAMLESS (1<<19)
/* DPMS flags */
@@ -354,6 +355,7 @@ struct drm_mode_fb_cmd {
#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
+#define DRM_MODE_FB_SECURE (1<<2) /* for secure framebuffers */
struct drm_mode_fb_cmd2 {
__u32 fb_id;
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
index 75a232b9a970..fd1be42188cd 100644
--- a/include/uapi/drm/msm_drm.h
+++ b/include/uapi/drm/msm_drm.h
@@ -20,6 +20,7 @@
#include <stddef.h>
#include <drm/drm.h>
+#include <drm/sde_drm.h>
/* Please note that modifications to all structs defined here are
* subject to backwards-compatibility constraints:
@@ -196,6 +197,39 @@ struct drm_msm_wait_fence {
struct drm_msm_timespec timeout; /* in */
};
+/**
+ * struct drm_msm_event_req - Payload to event enable/disable ioctls.
+ * @object_id: DRM object id. Ex: for crtc pass crtc id.
+ * @object_type: DRM object type. Ex: for crtc set it to DRM_MODE_OBJECT_CRTC.
+ * @event: Event for which notification is being enabled/disabled.
+ * Ex: for Histogram set - DRM_EVENT_HISTOGRAM.
+ * @client_context: Opaque pointer that will be returned during event response
+ * notification.
+ * @index: Object index(ex: crtc index), optional for user-space to set.
+ * Driver will override value based on object_id and object_type.
+ */
+struct drm_msm_event_req {
+ __u32 object_id;
+ __u32 object_type;
+ __u32 event;
+ __u64 client_context;
+ __u32 index;
+};
+
+/**
+ * struct drm_msm_event_resp - payload returned when read is called for
+ * custom notifications.
+ * @base: Event type and length of complete notification payload.
+ * @info: Contains information about DRM that which raised this event.
+ * @data: Custom payload that driver returns for event type.
+ * size of data = base.length - (sizeof(base) + sizeof(info))
+ */
+struct drm_msm_event_resp {
+ struct drm_event base;
+ struct drm_msm_event_req info;
+ __u8 data[];
+};
+
#define DRM_MSM_GET_PARAM 0x00
/* placeholder:
#define DRM_MSM_SET_PARAM 0x01
@@ -206,7 +240,18 @@ struct drm_msm_wait_fence {
#define DRM_MSM_GEM_CPU_FINI 0x05
#define DRM_MSM_GEM_SUBMIT 0x06
#define DRM_MSM_WAIT_FENCE 0x07
-#define DRM_MSM_NUM_IOCTLS 0x08
+#define DRM_SDE_WB_CONFIG 0x08
+#define DRM_MSM_REGISTER_EVENT 0x09
+#define DRM_MSM_DEREGISTER_EVENT 0x0A
+#define DRM_MSM_NUM_IOCTLS 0x0B
+
+/**
+ * Currently DRM framework supports only VSYNC event.
+ * Starting the custom events at 0xff to provide space for DRM
+ * framework to add new events.
+ */
+#define DRM_EVENT_HISTOGRAM 0xff
+#define DRM_EVENT_AD 0x100
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
@@ -215,5 +260,10 @@ struct drm_msm_wait_fence {
#define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
-
+#define DRM_IOCTL_SDE_WB_CONFIG \
+ DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg)
+#define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
+ DRM_MSM_REGISTER_EVENT), struct drm_msm_event_req)
+#define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
+ DRM_MSM_DEREGISTER_EVENT), struct drm_msm_event_req)
#endif /* __MSM_DRM_H__ */
diff --git a/include/uapi/drm/msm_drm_pp.h b/include/uapi/drm/msm_drm_pp.h
new file mode 100644
index 000000000000..9ed3a13953ef
--- /dev/null
+++ b/include/uapi/drm/msm_drm_pp.h
@@ -0,0 +1,82 @@
+#ifndef _MSM_DRM_PP_H_
+#define _MSM_DRM_PP_H_
+
+#include <drm/drm.h>
+
+/**
+ * struct drm_msm_pcc_coeff - PCC coefficient structure for each color
+ * component.
+ * @c: constant coefficient.
+ * @r: red coefficient.
+ * @g: green coefficient.
+ * @b: blue coefficient.
+ * @rg: red green coefficient.
+ * @gb: green blue coefficient.
+ * @rb: red blue coefficient.
+ * @rgb: red blue green coefficient.
+ */
+
+struct drm_msm_pcc_coeff {
+ __u32 c;
+ __u32 r;
+ __u32 g;
+ __u32 b;
+ __u32 rg;
+ __u32 gb;
+ __u32 rb;
+ __u32 rgb;
+};
+
+/**
+ * struct drm_msm_pcc - pcc feature structure
+ * flags: for customizing operations
+ * r: red coefficients.
+ * g: green coefficients.
+ * b: blue coefficients.
+ */
+
+struct drm_msm_pcc {
+ __u64 flags;
+ struct drm_msm_pcc_coeff r;
+ struct drm_msm_pcc_coeff g;
+ struct drm_msm_pcc_coeff b;
+};
+
+/* struct drm_msm_pa_vlut - picture adjustment vLUT structure
+ * flags: for customizing vlut operation
+ * val: vLUT values
+ */
+#define PA_VLUT_SIZE 256
+struct drm_msm_pa_vlut {
+ __u64 flags;
+ __u32 val[PA_VLUT_SIZE];
+};
+
+/* struct drm_msm_memcol - Memory color feature strucuture.
+ * Skin, sky, foliage features are supported.
+ * @prot_flags: Bit mask for enabling protection feature.
+ * @color_adjust_p0: Adjustment curve.
+ * @color_adjust_p1: Adjustment curve.
+ * @color_adjust_p2: Adjustment curve.
+ * @blend_gain: Blend gain weightage from othe PA features.
+ * @sat_hold: Saturation hold value.
+ * @val_hold: Value hold info.
+ * @hue_region: Hue qualifier.
+ * @sat_region: Saturation qualifier.
+ * @val_region: Value qualifier.
+ */
+#define DRM_MSM_MEMCOL
+struct drm_msm_memcol {
+ __u64 prot_flags;
+ __u32 color_adjust_p0;
+ __u32 color_adjust_p1;
+ __u32 color_adjust_p2;
+ __u32 blend_gain;
+ __u32 sat_hold;
+ __u32 val_hold;
+ __u32 hue_region;
+ __u32 sat_region;
+ __u32 val_region;
+};
+
+#endif /* _MSM_DRM_PP_H_ */
diff --git a/include/uapi/drm/sde_drm.h b/include/uapi/drm/sde_drm.h
new file mode 100644
index 000000000000..c7bed3b1ccf3
--- /dev/null
+++ b/include/uapi/drm/sde_drm.h
@@ -0,0 +1,298 @@
+#ifndef _SDE_DRM_H_
+#define _SDE_DRM_H_
+
+/* Total number of supported color planes */
+#define SDE_MAX_PLANES 4
+
+/* Total number of parameterized detail enhancer mapping curves */
+#define SDE_MAX_DE_CURVES 3
+
+ /* Y/RGB and UV filter configuration */
+#define FILTER_EDGE_DIRECTED_2D 0x0
+#define FILTER_CIRCULAR_2D 0x1
+#define FILTER_SEPARABLE_1D 0x2
+#define FILTER_BILINEAR 0x3
+
+/* Alpha filters */
+#define FILTER_ALPHA_DROP_REPEAT 0x0
+#define FILTER_ALPHA_BILINEAR 0x1
+#define FILTER_ALPHA_2D 0x3
+
+/* Blend filters */
+#define FILTER_BLEND_CIRCULAR_2D 0x0
+#define FILTER_BLEND_SEPARABLE_1D 0x1
+
+/* LUT configuration flags */
+#define SCALER_LUT_SWAP 0x1
+#define SCALER_LUT_DIR_WR 0x2
+#define SCALER_LUT_Y_CIR_WR 0x4
+#define SCALER_LUT_UV_CIR_WR 0x8
+#define SCALER_LUT_Y_SEP_WR 0x10
+#define SCALER_LUT_UV_SEP_WR 0x20
+
+/**
+ * Blend operations for "blend_op" property
+ *
+ * @SDE_DRM_BLEND_OP_NOT_DEFINED: No blend operation defined for the layer.
+ * @SDE_DRM_BLEND_OP_OPAQUE: Apply a constant blend operation. The layer
+ * would appear opaque in case fg plane alpha
+ * is 0xff.
+ * @SDE_DRM_BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already
+ * has alpha pre-multiplication done. If the fg
+ * plane alpha is less than 0xff, apply
+ * modulation as well. This operation is
+ * intended on layers having alpha channel.
+ * @SDE_DRM_BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not
+ * alpha pre-multiplied. Apply
+ * pre-multiplication. If fg plane alpha is
+ * less than 0xff, apply modulation as well.
+ * @SDE_DRM_BLEND_OP_MAX: Used to track maximum blend operation
+ * possible by mdp.
+ */
+#define SDE_DRM_BLEND_OP_NOT_DEFINED 0
+#define SDE_DRM_BLEND_OP_OPAQUE 1
+#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2
+#define SDE_DRM_BLEND_OP_COVERAGE 3
+#define SDE_DRM_BLEND_OP_MAX 4
+
+/**
+ * Bit masks for "src_config" property
+ * construct bitmask via (1UL << SDE_DRM_<flag>)
+ */
+#define SDE_DRM_DEINTERLACE 0 /* Specifies interlaced input */
+
+/* DRM bitmasks are restricted to 0..63 */
+#define SDE_DRM_BITMASK_COUNT 64
+
+/**
+ * struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure
+ * @num_ext_pxls_lr: Number of total horizontal pixels
+ * @num_ext_pxls_tb: Number of total vertical lines
+ * @left_ftch: Number of extra pixels to overfetch from left
+ * @right_ftch: Number of extra pixels to overfetch from right
+ * @top_ftch: Number of extra lines to overfetch from top
+ * @btm_ftch: Number of extra lines to overfetch from bottom
+ * @left_rpt: Number of extra pixels to repeat from left
+ * @right_rpt: Number of extra pixels to repeat from right
+ * @top_rpt: Number of extra lines to repeat from top
+ * @btm_rpt: Number of extra lines to repeat from bottom
+ */
+struct sde_drm_pix_ext_v1 {
+ /*
+ * Number of pixels ext in left, right, top and bottom direction
+ * for all color components.
+ */
+ int32_t num_ext_pxls_lr[SDE_MAX_PLANES];
+ int32_t num_ext_pxls_tb[SDE_MAX_PLANES];
+
+ /*
+ * Number of pixels needs to be overfetched in left, right, top
+ * and bottom directions from source image for scaling.
+ */
+ int32_t left_ftch[SDE_MAX_PLANES];
+ int32_t right_ftch[SDE_MAX_PLANES];
+ int32_t top_ftch[SDE_MAX_PLANES];
+ int32_t btm_ftch[SDE_MAX_PLANES];
+ /*
+ * Number of pixels needs to be repeated in left, right, top and
+ * bottom directions for scaling.
+ */
+ int32_t left_rpt[SDE_MAX_PLANES];
+ int32_t right_rpt[SDE_MAX_PLANES];
+ int32_t top_rpt[SDE_MAX_PLANES];
+ int32_t btm_rpt[SDE_MAX_PLANES];
+
+};
+
+/**
+ * struct sde_drm_scaler_v1 - version 1 of struct sde_drm_scaler
+ * @lr: Pixel extension settings for left/right
+ * @tb: Pixel extension settings for top/botton
+ * @init_phase_x: Initial scaler phase values for x
+ * @phase_step_x: Phase step values for x
+ * @init_phase_y: Initial scaler phase values for y
+ * @phase_step_y: Phase step values for y
+ * @horz_filter: Horizontal filter array
+ * @vert_filter: Vertical filter array
+ */
+struct sde_drm_scaler_v1 {
+ /*
+ * Pix ext settings
+ */
+ struct sde_drm_pix_ext_v1 pe;
+ /*
+ * Phase settings
+ */
+ int32_t init_phase_x[SDE_MAX_PLANES];
+ int32_t phase_step_x[SDE_MAX_PLANES];
+ int32_t init_phase_y[SDE_MAX_PLANES];
+ int32_t phase_step_y[SDE_MAX_PLANES];
+
+ /*
+ * Filter type to be used for scaling in horizontal and vertical
+ * directions
+ */
+ uint32_t horz_filter[SDE_MAX_PLANES];
+ uint32_t vert_filter[SDE_MAX_PLANES];
+};
+
+/**
+ * struct sde_drm_de_v1 - version 1 of detail enhancer structure
+ * @enable: Enables/disables detail enhancer
+ * @sharpen_level1: Sharpening strength for noise
+ * @sharpen_level2: Sharpening strength for context
+ * @clip: Clip coefficient
+ * @limit: Detail enhancer limit factor
+ * @thr_quiet: Quite zone threshold
+ * @thr_dieout: Die-out zone threshold
+ * @thr_low: Linear zone left threshold
+ * @thr_high: Linear zone right threshold
+ * @prec_shift: Detail enhancer precision
+ * @adjust_a: Mapping curves A coefficients
+ * @adjust_b: Mapping curves B coefficients
+ * @adjust_c: Mapping curves C coefficients
+ */
+struct sde_drm_de_v1 {
+ uint32_t enable;
+ int16_t sharpen_level1;
+ int16_t sharpen_level2;
+ uint16_t clip;
+ uint16_t limit;
+ uint16_t thr_quiet;
+ uint16_t thr_dieout;
+ uint16_t thr_low;
+ uint16_t thr_high;
+ uint16_t prec_shift;
+ int16_t adjust_a[SDE_MAX_DE_CURVES];
+ int16_t adjust_b[SDE_MAX_DE_CURVES];
+ int16_t adjust_c[SDE_MAX_DE_CURVES];
+};
+
+/**
+ * struct sde_drm_scaler_v2 - version 2 of struct sde_drm_scaler
+ * @enable: Scaler enable
+ * @dir_en: Detail enhancer enable
+ * @pe: Pixel extension settings
+ * @horz_decimate: Horizontal decimation factor
+ * @vert_decimate: Vertical decimation factor
+ * @init_phase_x: Initial scaler phase values for x
+ * @phase_step_x: Phase step values for x
+ * @init_phase_y: Initial scaler phase values for y
+ * @phase_step_y: Phase step values for y
+ * @preload_x: Horizontal preload value
+ * @preload_y: Vertical preload value
+ * @src_width: Source width
+ * @src_height: Source height
+ * @dst_width: Destination width
+ * @dst_height: Destination height
+ * @y_rgb_filter_cfg: Y/RGB plane filter configuration
+ * @uv_filter_cfg: UV plane filter configuration
+ * @alpha_filter_cfg: Alpha filter configuration
+ * @blend_cfg: Selection of blend coefficients
+ * @lut_flag: LUT configuration flags
+ * @dir_lut_idx: 2d 4x4 LUT index
+ * @y_rgb_cir_lut_idx: Y/RGB circular LUT index
+ * @uv_cir_lut_idx: UV circular LUT index
+ * @y_rgb_sep_lut_idx: Y/RGB separable LUT index
+ * @uv_sep_lut_idx: UV separable LUT index
+ * @de: Detail enhancer settings
+*/
+struct sde_drm_scaler_v2 {
+ /*
+ * General definitions
+ */
+ uint32_t enable;
+ uint32_t dir_en;
+
+ /*
+ * Pix ext settings
+ */
+ struct sde_drm_pix_ext_v1 pe;
+
+ /*
+ * Decimation settings
+ */
+ uint32_t horz_decimate;
+ uint32_t vert_decimate;
+
+ /*
+ * Phase settings
+ */
+ int32_t init_phase_x[SDE_MAX_PLANES];
+ int32_t phase_step_x[SDE_MAX_PLANES];
+ int32_t init_phase_y[SDE_MAX_PLANES];
+ int32_t phase_step_y[SDE_MAX_PLANES];
+
+ uint32_t preload_x[SDE_MAX_PLANES];
+ uint32_t preload_y[SDE_MAX_PLANES];
+ uint32_t src_width[SDE_MAX_PLANES];
+ uint32_t src_height[SDE_MAX_PLANES];
+
+ uint32_t dst_width;
+ uint32_t dst_height;
+
+ uint32_t y_rgb_filter_cfg;
+ uint32_t uv_filter_cfg;
+ uint32_t alpha_filter_cfg;
+ uint32_t blend_cfg;
+
+ uint32_t lut_flag;
+ uint32_t dir_lut_idx;
+
+ /* for Y(RGB) and UV planes*/
+ uint32_t y_rgb_cir_lut_idx;
+ uint32_t uv_cir_lut_idx;
+ uint32_t y_rgb_sep_lut_idx;
+ uint32_t uv_sep_lut_idx;
+
+ /*
+ * Detail enhancer settings
+ */
+ struct sde_drm_de_v1 de;
+};
+
+
+/*
+ * Define constants for struct sde_drm_csc
+ */
+#define SDE_CSC_MATRIX_COEFF_SIZE 9
+#define SDE_CSC_CLAMP_SIZE 6
+#define SDE_CSC_BIAS_SIZE 3
+
+/**
+ * struct sde_drm_csc_v1 - version 1 of struct sde_drm_csc
+ * @ctm_coeff: Matrix coefficients, in S31.32 format
+ * @pre_bias: Pre-bias array values
+ * @post_bias: Post-bias array values
+ * @pre_clamp: Pre-clamp array values
+ * @post_clamp: Post-clamp array values
+ */
+struct sde_drm_csc_v1 {
+ int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE];
+ uint32_t pre_bias[SDE_CSC_BIAS_SIZE];
+ uint32_t post_bias[SDE_CSC_BIAS_SIZE];
+ uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE];
+ uint32_t post_clamp[SDE_CSC_CLAMP_SIZE];
+};
+
+/* Writeback Config version definition */
+#define SDE_DRM_WB_CFG 0x1
+
+/* SDE_DRM_WB_CONFIG_FLAGS - Writeback configuration flags */
+#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1<<0)
+
+/**
+ * struct sde_drm_wb_cfg - Writeback configuration structure
+ * @flags: see DRM_MSM_WB_CONFIG_FLAGS
+ * @connector_id: writeback connector identifier
+ * @count_modes: Count of modes in modes_ptr
+ * @modes: Pointer to struct drm_mode_modeinfo
+ */
+struct sde_drm_wb_cfg {
+ uint32_t flags;
+ uint32_t connector_id;
+ uint32_t count_modes;
+ uint64_t modes;
+};
+
+#endif /* _SDE_DRM_H_ */
diff --git a/include/uapi/linux/android/binder.h b/include/uapi/linux/android/binder.h
index 41420e341e75..51f891fb1b18 100644
--- a/include/uapi/linux/android/binder.h
+++ b/include/uapi/linux/android/binder.h
@@ -33,6 +33,8 @@ enum {
BINDER_TYPE_HANDLE = B_PACK_CHARS('s', 'h', '*', B_TYPE_LARGE),
BINDER_TYPE_WEAK_HANDLE = B_PACK_CHARS('w', 'h', '*', B_TYPE_LARGE),
BINDER_TYPE_FD = B_PACK_CHARS('f', 'd', '*', B_TYPE_LARGE),
+ BINDER_TYPE_FDA = B_PACK_CHARS('f', 'd', 'a', B_TYPE_LARGE),
+ BINDER_TYPE_PTR = B_PACK_CHARS('p', 't', '*', B_TYPE_LARGE),
};
enum {
@@ -48,6 +50,14 @@ typedef __u64 binder_size_t;
typedef __u64 binder_uintptr_t;
#endif
+/**
+ * struct binder_object_header - header shared by all binder metadata objects.
+ * @type: type of the object
+ */
+struct binder_object_header {
+ __u32 type;
+};
+
/*
* This is the flattened representation of a Binder object for transfer
* between processes. The 'offsets' supplied as part of a binder transaction
@@ -56,9 +66,8 @@ typedef __u64 binder_uintptr_t;
* between processes.
*/
struct flat_binder_object {
- /* 8 bytes for large_flat_header. */
- __u32 type;
- __u32 flags;
+ struct binder_object_header hdr;
+ __u32 flags;
/* 8 bytes of data. */
union {
@@ -70,6 +79,84 @@ struct flat_binder_object {
binder_uintptr_t cookie;
};
+/**
+ * struct binder_fd_object - describes a filedescriptor to be fixed up.
+ * @hdr: common header structure
+ * @pad_flags: padding to remain compatible with old userspace code
+ * @pad_binder: padding to remain compatible with old userspace code
+ * @fd: file descriptor
+ * @cookie: opaque data, used by user-space
+ */
+struct binder_fd_object {
+ struct binder_object_header hdr;
+ __u32 pad_flags;
+ union {
+ binder_uintptr_t pad_binder;
+ __u32 fd;
+ };
+
+ binder_uintptr_t cookie;
+};
+
+/* struct binder_buffer_object - object describing a userspace buffer
+ * @hdr: common header structure
+ * @flags: one or more BINDER_BUFFER_* flags
+ * @buffer: address of the buffer
+ * @length: length of the buffer
+ * @parent: index in offset array pointing to parent buffer
+ * @parent_offset: offset in @parent pointing to this buffer
+ *
+ * A binder_buffer object represents an object that the
+ * binder kernel driver can copy verbatim to the target
+ * address space. A buffer itself may be pointed to from
+ * within another buffer, meaning that the pointer inside
+ * that other buffer needs to be fixed up as well. This
+ * can be done by setting the BINDER_BUFFER_FLAG_HAS_PARENT
+ * flag in @flags, by setting @parent buffer to the index
+ * in the offset array pointing to the parent binder_buffer_object,
+ * and by setting @parent_offset to the offset in the parent buffer
+ * at which the pointer to this buffer is located.
+ */
+struct binder_buffer_object {
+ struct binder_object_header hdr;
+ __u32 flags;
+ binder_uintptr_t buffer;
+ binder_size_t length;
+ binder_size_t parent;
+ binder_size_t parent_offset;
+};
+
+enum {
+ BINDER_BUFFER_FLAG_HAS_PARENT = 0x01,
+};
+
+/* struct binder_fd_array_object - object describing an array of fds in a buffer
+ * @hdr: common header structure
+ * @num_fds: number of file descriptors in the buffer
+ * @parent: index in offset array to buffer holding the fd array
+ * @parent_offset: start offset of fd array in the buffer
+ *
+ * A binder_fd_array object represents an array of file
+ * descriptors embedded in a binder_buffer_object. It is
+ * different from a regular binder_buffer_object because it
+ * describes a list of file descriptors to fix up, not an opaque
+ * blob of memory, and hence the kernel needs to treat it differently.
+ *
+ * An example of how this would be used is with Android's
+ * native_handle_t object, which is a struct with a list of integers
+ * and a list of file descriptors. The native_handle_t struct itself
+ * will be represented by a struct binder_buffer_objct, whereas the
+ * embedded list of file descriptors is represented by a
+ * struct binder_fd_array_object with that binder_buffer_object as
+ * a parent.
+ */
+struct binder_fd_array_object {
+ struct binder_object_header hdr;
+ binder_size_t num_fds;
+ binder_size_t parent;
+ binder_size_t parent_offset;
+};
+
/*
* On 64-bit platforms where user code may run in 32-bits the driver must
* translate the buffer (and local binder) addresses appropriately.
@@ -162,6 +249,11 @@ struct binder_transaction_data {
} data;
};
+struct binder_transaction_data_sg {
+ struct binder_transaction_data transaction_data;
+ binder_size_t buffers_size;
+};
+
struct binder_ptr_cookie {
binder_uintptr_t ptr;
binder_uintptr_t cookie;
@@ -346,6 +438,12 @@ enum binder_driver_command_protocol {
/*
* void *: cookie
*/
+
+ BC_TRANSACTION_SG = _IOW('c', 17, struct binder_transaction_data_sg),
+ BC_REPLY_SG = _IOW('c', 18, struct binder_transaction_data_sg),
+ /*
+ * binder_transaction_data_sg: the sent command.
+ */
};
#endif /* _UAPI_LINUX_BINDER_H */
diff --git a/include/uapi/linux/dvb/dmx.h b/include/uapi/linux/dvb/dmx.h
index a768696c90f8..175534a26792 100644
--- a/include/uapi/linux/dvb/dmx.h
+++ b/include/uapi/linux/dvb/dmx.h
@@ -148,6 +148,9 @@ enum dmx_video_codec {
#define DMX_IDX_VC1_FRAME_END 0x02000000
#define DMX_IDX_H264_ACCESS_UNIT_DEL 0x04000000
#define DMX_IDX_H264_SEI 0x08000000
+#define DMX_IDX_H264_IDR_ISLICE_START 0x10000000
+#define DMX_IDX_H264_NON_IDR_PSLICE_START 0x20000000
+#define DMX_IDX_H264_NON_IDR_BSLICE_START 0x40000000
struct dmx_pes_filter_params
{
diff --git a/include/uapi/linux/msm_audio_calibration.h b/include/uapi/linux/msm_audio_calibration.h
index 3c6ab13ca470..f05f9aaddb70 100644
--- a/include/uapi/linux/msm_audio_calibration.h
+++ b/include/uapi/linux/msm_audio_calibration.h
@@ -98,12 +98,15 @@ enum {
ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
+ AFE_SIDETONE_IIR_CAL_TYPE,
MAX_CAL_TYPES,
};
#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
+#define AFE_SIDETONE_IIR_CAL_TYPE AFE_SIDETONE_IIR_CAL_TYPE
+
enum {
VERSION_0_0,
};
@@ -346,6 +349,19 @@ struct audio_cal_info_sidetone {
int32_t pid;
};
+#define MAX_SIDETONE_IIR_DATA_SIZE 224
+#define MAX_NO_IIR_FILTER_STAGE 10
+
+struct audio_cal_info_sidetone_iir {
+ uint16_t iir_enable;
+ uint16_t num_biquad_stages;
+ uint16_t pregain;
+ int32_t tx_acdb_id;
+ int32_t rx_acdb_id;
+ int32_t mid;
+ int32_t pid;
+ uint8_t iir_config[MAX_SIDETONE_IIR_DATA_SIZE];
+};
struct audio_cal_info_lsm_top {
int32_t topology;
int32_t acdb_id;
@@ -580,6 +596,17 @@ struct audio_cal_sidetone {
struct audio_cal_type_sidetone cal_type;
};
+struct audio_cal_type_sidetone_iir {
+ struct audio_cal_type_header cal_hdr;
+ struct audio_cal_data cal_data;
+ struct audio_cal_info_sidetone_iir cal_info;
+};
+
+struct audio_cal_sidetone_iir {
+ struct audio_cal_header hdr;
+ struct audio_cal_type_sidetone_iir cal_type;
+};
+
struct audio_cal_type_lsm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
diff --git a/include/uapi/linux/msm_ipa.h b/include/uapi/linux/msm_ipa.h
index 6aa021e12930..16e4b8e30b07 100644
--- a/include/uapi/linux/msm_ipa.h
+++ b/include/uapi/linux/msm_ipa.h
@@ -147,7 +147,9 @@ enum ipa_client_type {
IPA_CLIENT_A5_WLAN_AMPDU_PROD,
IPA_CLIENT_A2_EMBEDDED_PROD,
IPA_CLIENT_A2_TETHERED_PROD,
- IPA_CLIENT_APPS_LAN_WAN_PROD,
+ IPA_CLIENT_APPS_LAN_PROD,
+ IPA_CLIENT_APPS_WAN_PROD,
+ IPA_CLIENT_APPS_LAN_WAN_PROD = IPA_CLIENT_APPS_WAN_PROD,
IPA_CLIENT_APPS_CMD_PROD,
IPA_CLIENT_ODU_PROD,
IPA_CLIENT_MHI_PROD,
diff --git a/include/uapi/linux/msm_mdp.h b/include/uapi/linux/msm_mdp.h
index fca2a3c2d494..481814cb8498 100644
--- a/include/uapi/linux/msm_mdp.h
+++ b/include/uapi/linux/msm_mdp.h
@@ -119,6 +119,7 @@
#define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) /* msm8998 */
#define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) /* msm8998 v1.0 */
#define MDSS_MDP_HW_REV_320 MDSS_MDP_REV(3, 2, 0) /* sdm660 */
+#define MDSS_MDP_HW_REV_330 MDSS_MDP_REV(3, 3, 0) /* sdm630 */
enum {
NOTIFY_UPDATE_INIT,
diff --git a/include/uapi/linux/msm_mdp_ext.h b/include/uapi/linux/msm_mdp_ext.h
index 24f1e7c7b742..ee68675bfe13 100644
--- a/include/uapi/linux/msm_mdp_ext.h
+++ b/include/uapi/linux/msm_mdp_ext.h
@@ -125,6 +125,12 @@ DESTINATION SCALER FLAG CONFIGURATION
*/
#define MDP_DESTSCALER_ENHANCER_UPDATE 0x4
+/*
+ * Indicating a partial update to panel ROI. ROI can be
+ * applied anytime when Destination scaler is enabled.
+ */
+#define MDP_DESTSCALER_ROI_ENABLE 0x8
+
/**********************************************************************
VALIDATE/COMMIT FLAG CONFIGURATION
**********************************************************************/
@@ -173,6 +179,77 @@ VALIDATE/COMMIT FLAG CONFIGURATION
#define OUT_LAYER_COLOR_SPACE
+/* From CEA.861.3 */
+#define MDP_HDR_EOTF_SMTPE_ST2084 0x2
+#define MDP_HDR_EOTF_HLG 0x3
+
+/* From Vesa DPv1.4 - Pixel Encoding - Table 2-120 */
+#define MDP_PIXEL_ENCODING_RGB 0x0
+#define MDP_PIXEL_ENCODING_YCBCR_444 0x1
+#define MDP_PIXEL_ENCODING_YCBCR_422 0x2
+#define MDP_PIXEL_ENCODING_YCBCR_420 0x3
+#define MDP_PIXEL_ENCODING_Y_ONLY 0x4
+#define MDP_PIXEL_ENCODING_RAW 0x5
+
+/* From Vesa DPv1.4 - Colorimetry Formats - Table 2-120 */
+/* RGB - used with MDP_DP_PIXEL_ENCODING_RGB */
+#define MDP_COLORIMETRY_RGB_SRGB 0x0
+#define MDP_COLORIMETRY_RGB_WIDE_FIXED_POINT 0x1
+#define MDP_COLORIMETRY_RGB_WIDE_FLOAT_POINT 0x2
+#define MDP_COLORIMETRY_RGB_ADOBE 0x3
+#define MDP_COLORIMETRY_RGB_DPI_P3 0x4
+#define MDP_COLORIMETRY_RGB_CUSTOM 0x5
+#define MDP_COLORIMETRY_RGB_ITU_R_BT_2020 0x6
+
+/* YUV - used with MDP_DP_PIXEL_ENCODING_YCBCR(444 or 422 or 420) */
+#define MDP_COLORIMETRY_YCBCR_ITU_R_BT_601 0x0
+#define MDP_COLORIMETRY_YCBCR_ITU_R_BT_709 0x1
+#define MDP_COLORIMETRY_YCBCR_XV_YCC_601 0x2
+#define MDP_COLORIMETRY_YCBCR_XV_YCC_709 0x3
+#define MDP_COLORIMETRY_YCBCR_S_YCC_601 0x4
+#define MDP_COLORIMETRY_YCBCR_ADOBE_YCC_601 0x5
+#define MDP_COLORIMETRY_YCBCR_ITU_R_BT_2020_YCBCR_CONST 0x6
+#define MDP_COLORIMETRY_YCBCR_ITU_R_BT_2020_YCBCR 0x7
+
+/* Dynamic Range - Table 2-120 */
+/* Full range */
+#define MDP_DYNAMIC_RANGE_VESA 0x0
+/* Limited range */
+#define MDP_DYNAMIC_RANGE_CEA 0x1
+
+/* Bits per component(bpc) for Pixel encoding format RGB from Table 2-120 */
+#define MDP_RGB_6_BPC 0x0
+#define MDP_RGB_8_BPC 0x1
+#define MDP_RGB_10_BPC 0x2
+#define MDP_RGB_12_BPC 0x3
+#define MDP_RGB_16_BPC 0x4
+
+/*
+ * Bits per component(bpc) for Pixel encoding format YCbCr444, YCbCr422,
+ * YCbCr420 and Y only
+ * from Table 2-120
+ */
+#define MDP_YUV_8_BPC 0x1
+#define MDP_YUV_10_BPC 0x2
+#define MDP_YUV_12_BPC 0x3
+#define MDP_YUV_16_BPC 0x4
+
+/* Bits per component(bpc) for Pixel encoding format RAW from Table 2-120 */
+#define MDP_RAW_6_BPC 0x1
+#define MDP_RAW_7_BPC 0x2
+#define MDP_RAW_8_BPC 0x3
+#define MDP_RAW_10_BPC 0x4
+#define MDP_RAW_12_BPC 0x5
+#define MDP_RAW_14_BPC 0x6
+#define MDP_RAW16_BPC 0x7
+
+/* Content Type - Table 2-120 */
+#define MDP_CONTENT_TYPE_NOT_DEFINED 0x0
+#define MDP_CONTENT_TYPE_GRAPHICS 0x1
+#define MDP_CONTENT_TYPE_PHOTO 0x2
+#define MDP_CONTENT_TYPE_VIDEO 0x3
+#define MDP_CONTENT_TYPE_GAME 0x4
+
/**********************************************************************
Configuration structures
All parameters are input to driver unless mentioned output parameter
@@ -405,6 +482,12 @@ struct mdp_destination_scaler_data {
* A userspace pointer points to struct mdp_scale_data_v2.
*/
uint64_t __user scale;
+
+ /*
+ * Panel ROI is used when partial update is required in
+ * current commit call.
+ */
+ struct mdp_rect panel_roi;
};
/*
@@ -697,4 +780,27 @@ struct mdp_set_cfg {
uint32_t len;
uint64_t __user payload;
};
+
+#define HDR_PRIMARIES_COUNT 3
+
+#define MDP_HDR_STREAM
+
+struct mdp_hdr_stream {
+ uint32_t eotf;
+ uint32_t display_primaries_x[HDR_PRIMARIES_COUNT];
+ uint32_t display_primaries_y[HDR_PRIMARIES_COUNT];
+ uint32_t white_point_x;
+ uint32_t white_point_y;
+ uint32_t max_luminance;
+ uint32_t min_luminance;
+ uint32_t max_content_light_level;
+ uint32_t max_average_light_level;
+ /* DP related */
+ uint32_t pixel_encoding;
+ uint32_t colorimetry;
+ uint32_t range;
+ uint32_t bits_per_component;
+ uint32_t content_type;
+ uint32_t reserved[5];
+};
#endif
diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index cc8ece36e0e3..0505b1f9872b 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -1934,6 +1934,20 @@ enum nl80211_commands {
* @NL80211_ATTR_BSSID: The BSSID of the AP. Note that %NL80211_ATTR_MAC is also
* used in various commands/events for specifying the BSSID.
*
+ * @NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI: Relative RSSI threshold by which
+ * other BSSs has to be better or slightly worse than the current
+ * connected BSS so that they get reported to user space.
+ * This will give an opportunity to userspace to consider connecting to
+ * other matching BSSs which have better or slightly worse RSSI than
+ * the current connected BSS by using an offloaded operation to avoid
+ * unnecessary wakeups.
+ *
+ * @NL80211_ATTR_SCHED_SCAN_RSSI_ADJUST: When present the RSSI level for BSSs in
+ * the specified band is to be adjusted before doing
+ * %NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI based comparision to figure out
+ * better BSSs. The attribute value is a packed structure
+ * value as specified by &struct nl80211_bss_select_rssi_adjust.
+ *
* @NUM_NL80211_ATTR: total number of nl80211_attrs available
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
@@ -2340,6 +2354,9 @@ enum nl80211_attrs {
NL80211_ATTR_BSSID,
+ NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI,
+ NL80211_ATTR_SCHED_SCAN_RSSI_ADJUST,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@@ -3008,6 +3025,13 @@ enum nl80211_reg_rule_attr {
* how this API was implemented in the past. Also, due to the same problem,
* the only way to create a matchset with only an RSSI filter (with this
* attribute) is if there's only a single matchset with the RSSI attribute.
+ * @NL80211_SCHED_SCAN_MATCH_ATTR_RELATIVE_RSSI: Flag indicating whether
+ * %NL80211_SCHED_SCAN_MATCH_ATTR_RSSI to be used as absolute RSSI or
+ * relative to current bss's RSSI.
+ * @NL80211_SCHED_SCAN_MATCH_ATTR_RSSI_ADJUST: When present the RSSI level for
+ * BSS-es in the specified band is to be adjusted before doing
+ * RSSI-based BSS selection. The attribute value is a packed structure
+ * value as specified by &struct nl80211_bss_select_rssi_adjust.
* @NL80211_SCHED_SCAN_MATCH_ATTR_MAX: highest scheduled scan filter
* attribute number currently defined
* @__NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST: internal use
@@ -3017,6 +3041,8 @@ enum nl80211_sched_scan_match_attr {
NL80211_SCHED_SCAN_MATCH_ATTR_SSID,
NL80211_SCHED_SCAN_MATCH_ATTR_RSSI,
+ NL80211_SCHED_SCAN_MATCH_ATTR_RELATIVE_RSSI,
+ NL80211_SCHED_SCAN_MATCH_ATTR_RSSI_ADJUST,
/* keep last */
__NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST,
@@ -4603,6 +4629,15 @@ enum nl80211_feature_flags {
* configuration (AP/mesh) with HT rates.
* @NL80211_EXT_FEATURE_BEACON_RATE_VHT: Driver supports beacon rate
* configuration (AP/mesh) with VHT rates.
+ * @NL80211_EXT_FEATURE_FILS_STA: This driver supports Fast Initial Link Setup
+ * with user space SME (NL80211_CMD_AUTHENTICATE) in station mode.
+ * @NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA: This driver supports randomized TA
+ * in @NL80211_CMD_FRAME while not associated.
+ * @NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA_CONNECTED: This driver supports
+ * randomized TA in @NL80211_CMD_FRAME while associated.
+ * @NL80211_EXT_FEATURE_SCHED_SCAN_RELATIVE_RSSI: The driver supports sched_scan
+ * for reporting BSSs with better RSSI than the current connected BSS
+ * (%NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI).
*
* @NUM_NL80211_EXT_FEATURES: number of extended features.
* @MAX_NL80211_EXT_FEATURES: highest extended feature index.
@@ -4617,6 +4652,10 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_BEACON_RATE_LEGACY,
NL80211_EXT_FEATURE_BEACON_RATE_HT,
NL80211_EXT_FEATURE_BEACON_RATE_VHT,
+ NL80211_EXT_FEATURE_FILS_STA,
+ NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA,
+ NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA_CONNECTED,
+ NL80211_EXT_FEATURE_SCHED_SCAN_RELATIVE_RSSI,
/* add new features before the definition below */
NUM_NL80211_EXT_FEATURES,
@@ -4866,4 +4905,48 @@ enum nl80211_sched_scan_plan {
__NL80211_SCHED_SCAN_PLAN_AFTER_LAST - 1
};
+/**
+ * struct nl80211_bss_select_rssi_adjust - RSSI adjustment parameters.
+ *
+ * @band: band of BSS that must match for RSSI value adjustment.
+ * @delta: value used to adjust the RSSI value of matching BSS.
+ */
+struct nl80211_bss_select_rssi_adjust {
+ __u8 band;
+ __s8 delta;
+} __attribute__((packed));
+
+/**
+ * enum nl80211_bss_select_attr - attributes for bss selection.
+ *
+ * @__NL80211_BSS_SELECT_ATTR_INVALID: reserved.
+ * @NL80211_BSS_SELECT_ATTR_RSSI: Flag indicating only RSSI-based BSS selection
+ * is requested.
+ * @NL80211_BSS_SELECT_ATTR_BAND_PREF: attribute indicating BSS
+ * selection should be done such that the specified band is preferred.
+ * When there are multiple BSS-es in the preferred band, the driver
+ * shall use RSSI-based BSS selection as a second step. The value of
+ * this attribute is according to &enum nl80211_band (u32).
+ * @NL80211_BSS_SELECT_ATTR_RSSI_ADJUST: When present the RSSI level for
+ * BSS-es in the specified band is to be adjusted before doing
+ * RSSI-based BSS selection. The attribute value is a packed structure
+ * value as specified by &struct nl80211_bss_select_rssi_adjust.
+ * @NL80211_BSS_SELECT_ATTR_MAX: highest bss select attribute number.
+ * @__NL80211_BSS_SELECT_ATTR_AFTER_LAST: internal use.
+ *
+ * One and only one of these attributes are found within %NL80211_ATTR_BSS_SELECT
+ * for %NL80211_CMD_CONNECT. It specifies the required BSS selection behaviour
+ * which the driver shall use.
+ */
+enum nl80211_bss_select_attr {
+ __NL80211_BSS_SELECT_ATTR_INVALID,
+ NL80211_BSS_SELECT_ATTR_RSSI,
+ NL80211_BSS_SELECT_ATTR_BAND_PREF,
+ NL80211_BSS_SELECT_ATTR_RSSI_ADJUST,
+
+ /* keep last */
+ __NL80211_BSS_SELECT_ATTR_AFTER_LAST,
+ NL80211_BSS_SELECT_ATTR_MAX = __NL80211_BSS_SELECT_ATTR_AFTER_LAST - 1
+};
+
#endif /* __LINUX_NL80211_H */
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 8fdf57504ab6..c8653a9f0e9e 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -1058,6 +1058,9 @@ enum vl42_mpeg_vidc_video_h264_svc_nal {
(V4L2_CID_MPEG_MSM_VIDC_BASE + 68)
enum v4l2_mpeg_vidc_video_perf_mode {
+#define V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT \
+ V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT
+ V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT = 0,
V4L2_MPEG_VIDC_VIDEO_PERF_MAX_QUALITY = 1,
V4L2_MPEG_VIDC_VIDEO_PERF_POWER_SAVE = 2
};
diff --git a/include/uapi/media/msm_vidc.h b/include/uapi/media/msm_vidc.h
index b259bdef8a93..e9370cb660b2 100644
--- a/include/uapi/media/msm_vidc.h
+++ b/include/uapi/media/msm_vidc.h
@@ -245,7 +245,7 @@ enum msm_vidc_extradata_type {
MSM_VIDC_EXTRADATA_DIGITAL_ZOOM = 0x07000010,
#define MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO \
MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO
- MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x070000011,
+ MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x00000014,
MSM_VIDC_EXTRADATA_MULTISLICE_INFO = 0x7F100000,
MSM_VIDC_EXTRADATA_NUM_CONCEALED_MB = 0x7F100001,
MSM_VIDC_EXTRADATA_INDEX = 0x7F100002,
diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h
index ef96966b2bbe..6a297ad6d380 100644
--- a/include/uapi/sound/compress_params.h
+++ b/include/uapi/sound/compress_params.h
@@ -103,7 +103,8 @@
#define SND_AUDIOCODEC_ALAC ((__u32) 0x00000019)
#define SND_AUDIOCODEC_APE ((__u32) 0x00000020)
#define SND_AUDIOCODEC_DSD ((__u32) 0x00000021)
-#define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_DSD
+#define SND_AUDIOCODEC_APTX ((__u32) 0x00000022)
+#define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_APTX
/*
* Profile and modes are listed with bit masks. This allows for a
* more compact representation of fields that will not evolve
@@ -396,6 +397,12 @@ struct snd_dec_ape {
__u32 seek_table_present;
};
+struct snd_dec_aptx {
+ __u32 lap;
+ __u32 uap;
+ __u32 nap;
+};
+
union snd_codec_options {
struct snd_enc_wma wma;
struct snd_enc_vorbis vorbis;
@@ -407,6 +414,7 @@ union snd_codec_options {
struct snd_dec_vorbis vorbis_dec;
struct snd_dec_alac alac;
struct snd_dec_ape ape;
+ struct snd_dec_aptx aptx_dec;
};
/** struct snd_codec_desc - description of codec capabilities
diff --git a/include/uapi/sound/lsm_params.h b/include/uapi/sound/lsm_params.h
index eafdc117413a..9ca5930475ba 100644
--- a/include/uapi/sound/lsm_params.h
+++ b/include/uapi/sound/lsm_params.h
@@ -1,6 +1,9 @@
#ifndef _UAPI_LSM_PARAMS_H__
#define _UAPI_LSM_PARAMS_H__
+#define LSM_POLLING_ENABLE_SUPPORT
+#define LSM_EVENT_TIMESTAMP_MODE_SUPPORT
+
#include <linux/types.h>
#include <sound/asound.h>
@@ -18,6 +21,19 @@
#define LSM_OUT_TRANSFER_MODE_RT (0)
#define LSM_OUT_TRANSFER_MODE_FTRT (1)
+#define LSM_ENDPOINT_DETECT_THRESHOLD (0)
+#define LSM_OPERATION_MODE (1)
+#define LSM_GAIN (2)
+#define LSM_MIN_CONFIDENCE_LEVELS (3)
+#define LSM_REG_SND_MODEL (4)
+#define LSM_DEREG_SND_MODEL (5)
+#define LSM_CUSTOM_PARAMS (6)
+#define LSM_POLLING_ENABLE (7)
+#define LSM_PARAMS_MAX (LSM_POLLING_ENABLE + 1)
+
+#define LSM_EVENT_NON_TIME_STAMP_MODE (0)
+#define LSM_EVENT_TIME_STAMP_MODE (1)
+
enum lsm_app_id {
LSM_VOICE_WAKEUP_APP_ID = 1,
LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
@@ -35,18 +51,6 @@ enum lsm_vw_status {
LSM_VOICE_WAKEUP_STATUS_REJECTED
};
-enum LSM_PARAM_TYPE {
- LSM_ENDPOINT_DETECT_THRESHOLD = 0,
- LSM_OPERATION_MODE,
- LSM_GAIN,
- LSM_MIN_CONFIDENCE_LEVELS,
- LSM_REG_SND_MODEL,
- LSM_DEREG_SND_MODEL,
- LSM_CUSTOM_PARAMS,
- /* driver ioctl will parse only so many params */
- LSM_PARAMS_MAX,
-};
-
/*
* Data for LSM_ENDPOINT_DETECT_THRESHOLD param_type
* @epd_begin: Begin threshold
@@ -75,6 +79,14 @@ struct snd_lsm_gain {
__u16 gain;
};
+/*
+ * Data for LSM_POLLING_ENABLE param_type
+ * @poll_en: Polling enable or disable
+ */
+struct snd_lsm_poll_enable {
+ bool poll_en;
+};
+
struct snd_lsm_sound_model_v2 {
__u8 __user *data;
@@ -95,11 +107,20 @@ struct snd_lsm_event_status {
__u8 payload[0];
};
+struct snd_lsm_event_status_v3 {
+ __u32 timestamp_lsw;
+ __u32 timestamp_msw;
+ __u16 status;
+ __u16 payload_size;
+ __u8 payload[0];
+};
+
struct snd_lsm_detection_params {
__u8 *conf_level;
enum lsm_detection_mode detect_mode;
__u8 num_confidence_levels;
bool detect_failure;
+ bool poll_enable;
};
/*
@@ -122,7 +143,7 @@ struct lsm_params_info {
__u32 param_id;
__u32 param_size;
__u8 __user *param_data;
- enum LSM_PARAM_TYPE param_type;
+ uint32_t param_type;
};
/*
@@ -171,5 +192,9 @@ struct snd_lsm_output_format_cfg {
struct snd_lsm_module_params)
#define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, \
struct snd_lsm_output_format_cfg)
+#define SNDRV_LSM_SET_PORT _IO('U', 0x0D)
+#define SNDRV_LSM_SET_FWK_MODE_CONFIG _IOW('U', 0x0E, uint32_t)
+#define SNDRV_LSM_EVENT_STATUS_V3 _IOW('U', 0x0F, \
+ struct snd_lsm_event_status_v3)
#endif
diff --git a/include/uapi/video/msm_hdmi_modes.h b/include/uapi/video/msm_hdmi_modes.h
index 2200485daa6c..43ca6bab4c62 100644
--- a/include/uapi/video/msm_hdmi_modes.h
+++ b/include/uapi/video/msm_hdmi_modes.h
@@ -234,7 +234,11 @@ struct msm_hdmi_mode_timing_info {
#define HDMI_VFRMT_1920x1200p60_16_10 ETIII_OFF(8)
#define ETIII_VFRMT_END HDMI_VFRMT_1920x1200p60_16_10
-#define RESERVE_OFF(x) (ETIII_VFRMT_END + x)
+#define MISC_VFRMT_OFF(x) (ETIII_VFRMT_END + x)
+#define HDMI_VFRMT_640x480p59_4_3 MISC_VFRMT_OFF(1)
+#define MISC_VFRMT_END HDMI_VFRMT_640x480p59_4_3
+
+#define RESERVE_OFF(x) (MISC_VFRMT_END + x)
#define HDMI_VFRMT_RESERVE1 RESERVE_OFF(1)
#define HDMI_VFRMT_RESERVE2 RESERVE_OFF(2)
@@ -425,6 +429,11 @@ struct msm_hdmi_mode_timing_info {
{HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false, \
2160, 8, 10, 72, false, 594000, 60000, false, true, \
HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_640x480p59_4_3_TIMING \
+ {HDMI_VFRMT_640x480p59_4_3, 640, 16, 96, 48, true, \
+ 480, 10, 2, 33, true, 25170, 59928, false, true, \
+ HDMI_RES_AR_4_3, 1}
+
#define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do { \
struct msm_hdmi_mode_timing_info mode = MODE##_TIMING; \
@@ -508,6 +517,8 @@ do { \
HDMI_VFRMT_3840x2160p50_64_27); \
MSM_HDMI_MODES_SET_TIMING(__lut, \
HDMI_VFRMT_3840x2160p60_64_27); \
+ MSM_HDMI_MODES_SET_TIMING(__lut, \
+ HDMI_VFRMT_640x480p59_4_3); \
} \
if (__type & MSM_HDMI_MODES_XTND) { \
MSM_HDMI_MODES_SET_TIMING(__lut, \