diff options
Diffstat (limited to 'include')
92 files changed, 2420 insertions, 649 deletions
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 8f5a12ab2f2b..f608dd5e2374 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -530,15 +530,19 @@ #define INIT_TEXT \ *(.init.text) \ + *(.text.startup) \ MEM_DISCARD(init.text) #define EXIT_DATA \ *(.exit.data) \ + *(.fini_array) \ + *(.dtors) \ MEM_DISCARD(exit.data) \ MEM_DISCARD(exit.rodata) #define EXIT_TEXT \ *(.exit.text) \ + *(.text.exit) \ MEM_DISCARD(exit.text) #define EXIT_CALL \ diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 17c445612e01..2cdc723d750f 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -277,7 +277,9 @@ INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ #define INTEL_SKL_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ + INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \ @@ -289,6 +291,8 @@ #define INTEL_BXT_IDS(info) \ INTEL_VGA_DEVICE(0x0A84, info), \ INTEL_VGA_DEVICE(0x1A84, info), \ - INTEL_VGA_DEVICE(0x5A84, info) + INTEL_VGA_DEVICE(0x1A85, info), \ + INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \ + INTEL_VGA_DEVICE(0x5A85, info) /* APL HD Graphics 500 */ #endif /* _I915_PCIIDS_H */ diff --git a/include/dt-bindings/clock/audio-ext-clk.h b/include/dt-bindings/clock/audio-ext-clk.h index a384ddf68ea0..6fe8a466cf0e 100644 --- a/include/dt-bindings/clock/audio-ext-clk.h +++ b/include/dt-bindings/clock/audio-ext-clk.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -15,11 +15,11 @@ /* Audio External Clocks */ #define AUDIO_PMI_CLK 0 -#define AUDIO_PMIC_LNBB_CLK 1 -#define AUDIO_AP_CLK 2 -#define AUDIO_AP_CLK2 3 -#define AUDIO_LPASS_MCLK 4 -#define AUDIO_LPASS_MCLK2 5 +#define AUDIO_PMIC_LNBB_CLK 0 +#define AUDIO_AP_CLK 1 +#define AUDIO_AP_CLK2 2 +#define AUDIO_LPASS_MCLK 3 +#define AUDIO_LPASS_MCLK2 4 #define clk_audio_ap_clk 0x9b5727cb #define clk_audio_pmi_clk 0xcbfe416d diff --git a/include/dt-bindings/clock/mdss-pll-clk.h b/include/dt-bindings/clock/mdss-pll-clk.h new file mode 100644 index 000000000000..8cd0b2a9bc98 --- /dev/null +++ b/include/dt-bindings/clock/mdss-pll-clk.h @@ -0,0 +1,42 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MDSS_PLL_CLK_H +#define __MDSS_PLL_CLK_H + +/* DSI PLL clocks */ +#define BYTE0_MUX_CLK 0 +#define BYTE0_SRC_CLK 1 +#define PIX0_MUX_CLK 2 +#define PIX0_SRC_CLK 3 +#define N2_DIV_0_CLK 4 +#define POST_N1_DIV_0_CLK 5 +#define VCO_CLK_0_CLK 6 +#define SHADOW_BYTE0_SRC_CLK 7 +#define SHADOW_PIX0_SRC_CLK 8 +#define SHADOW_N2_DIV_0_CLK 9 +#define SHADOW_POST_N1_DIV_0_CLK 10 +#define SHADOW_VCO_CLK_0_CLK 11 +#define BYTE1_MUX_CLK 12 +#define BYTE1_SRC_CLK 13 +#define PIX1_MUX_CLK 14 +#define PIX1_SRC_CLK 15 +#define N2_DIV_1_CLK 16 +#define POST_N1_DIV_1_CLK 17 +#define VCO_CLK_1_CLK 18 +#define SHADOW_BYTE1_SRC_CLK 19 +#define SHADOW_PIX1_SRC_CLK 20 +#define SHADOW_N2_DIV_1_CLK 21 +#define SHADOW_POST_N1_DIV_1_CLK 22 +#define SHADOW_VCO_CLK_1_CLK 23 + +#endif diff --git a/include/dt-bindings/clock/msm-clocks-hwio-8998.h b/include/dt-bindings/clock/msm-clocks-hwio-8998.h index f10afffc74b2..8dfa36362e8c 100644 --- a/include/dt-bindings/clock/msm-clocks-hwio-8998.h +++ b/include/dt-bindings/clock/msm-clocks-hwio-8998.h @@ -242,6 +242,7 @@ #define GPUCC_RBCPR_CBCR 0x01054 #define GPU_GX_BCR 0x01090 #define GPUCC_GX_DOMAIN_MISC 0x00130 +#define GPUCC_GPU_DD_WRAP_CTRL 0x00430 #define GPUCC_DEBUG_CLK_CTL 0x00120 #define MMSS_PLL_VOTE_APCS 0x001E0 diff --git a/include/dt-bindings/clock/qcom,cpu-osm.h b/include/dt-bindings/clock/qcom,cpu-osm.h new file mode 100644 index 000000000000..71745fab287a --- /dev/null +++ b/include/dt-bindings/clock/qcom,cpu-osm.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_MSM_CPU_OSM_H +#define _DT_BINDINGS_CLK_MSM_CPU_OSM_H + +/* CPU clock IDs */ +#define SYS_APCSAUX_CLK_GCC 0 +#define PWRCL_CLK 1 +#define PERFCL_CLK 2 +#define OSM_CLK_SRC 3 + +#endif diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h index f66264a2beb4..efed312fe914 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8996.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h @@ -14,238 +14,239 @@ #ifndef _DT_BINDINGS_CLK_MSM_GCC_8996_H #define _DT_BINDINGS_CLK_MSM_GCC_8996_H -#define GPLL0_EARLY 0 -#define GPLL0 1 -#define GPLL1_EARLY 2 -#define GPLL1 3 -#define GPLL2_EARLY 4 -#define GPLL2 5 -#define GPLL3_EARLY 6 -#define GPLL3 7 -#define GPLL4_EARLY 8 -#define GPLL4 9 -#define SYSTEM_NOC_CLK_SRC 10 -#define CONFIG_NOC_CLK_SRC 11 -#define PERIPH_NOC_CLK_SRC 12 -#define MMSS_BIMC_GFX_CLK_SRC 13 -#define USB30_MASTER_CLK_SRC 14 -#define USB30_MOCK_UTMI_CLK_SRC 15 -#define USB3_PHY_AUX_CLK_SRC 16 -#define USB20_MASTER_CLK_SRC 17 -#define USB20_MOCK_UTMI_CLK_SRC 18 -#define SDCC1_APPS_CLK_SRC 19 -#define SDCC1_ICE_CORE_CLK_SRC 20 -#define SDCC2_APPS_CLK_SRC 21 -#define SDCC3_APPS_CLK_SRC 22 -#define SDCC4_APPS_CLK_SRC 23 -#define BLSP1_QUP1_SPI_APPS_CLK_SRC 24 -#define BLSP1_QUP1_I2C_APPS_CLK_SRC 25 -#define BLSP1_UART1_APPS_CLK_SRC 26 -#define BLSP1_QUP2_SPI_APPS_CLK_SRC 27 -#define BLSP1_QUP2_I2C_APPS_CLK_SRC 28 -#define BLSP1_UART2_APPS_CLK_SRC 29 -#define BLSP1_QUP3_SPI_APPS_CLK_SRC 30 -#define BLSP1_QUP3_I2C_APPS_CLK_SRC 31 -#define BLSP1_UART3_APPS_CLK_SRC 32 -#define BLSP1_QUP4_SPI_APPS_CLK_SRC 33 -#define BLSP1_QUP4_I2C_APPS_CLK_SRC 34 -#define BLSP1_UART4_APPS_CLK_SRC 35 -#define BLSP1_QUP5_SPI_APPS_CLK_SRC 36 -#define BLSP1_QUP5_I2C_APPS_CLK_SRC 37 -#define BLSP1_UART5_APPS_CLK_SRC 38 -#define BLSP1_QUP6_SPI_APPS_CLK_SRC 39 -#define BLSP1_QUP6_I2C_APPS_CLK_SRC 40 -#define BLSP1_UART6_APPS_CLK_SRC 41 -#define BLSP2_QUP1_SPI_APPS_CLK_SRC 42 -#define BLSP2_QUP1_I2C_APPS_CLK_SRC 43 -#define BLSP2_UART1_APPS_CLK_SRC 44 -#define BLSP2_QUP2_SPI_APPS_CLK_SRC 45 -#define BLSP2_QUP2_I2C_APPS_CLK_SRC 46 -#define BLSP2_UART2_APPS_CLK_SRC 47 -#define BLSP2_QUP3_SPI_APPS_CLK_SRC 48 -#define BLSP2_QUP3_I2C_APPS_CLK_SRC 49 -#define BLSP2_UART3_APPS_CLK_SRC 50 -#define BLSP2_QUP4_SPI_APPS_CLK_SRC 51 -#define BLSP2_QUP4_I2C_APPS_CLK_SRC 52 -#define BLSP2_UART4_APPS_CLK_SRC 53 -#define BLSP2_QUP5_SPI_APPS_CLK_SRC 54 -#define BLSP2_QUP5_I2C_APPS_CLK_SRC 55 -#define BLSP2_UART5_APPS_CLK_SRC 56 -#define BLSP2_QUP6_SPI_APPS_CLK_SRC 57 -#define BLSP2_QUP6_I2C_APPS_CLK_SRC 58 -#define BLSP2_UART6_APPS_CLK_SRC 59 -#define PDM2_CLK_SRC 60 -#define TSIF_REF_CLK_SRC 61 -#define CE1_CLK_SRC 62 -#define GCC_SLEEP_CLK_SRC 63 -#define BIMC_CLK_SRC 64 -#define HMSS_AHB_CLK_SRC 65 -#define BIMC_HMSS_AXI_CLK_SRC 66 -#define HMSS_RBCPR_CLK_SRC 67 -#define HMSS_GPLL0_CLK_SRC 68 -#define GP1_CLK_SRC 69 -#define GP2_CLK_SRC 70 -#define GP3_CLK_SRC 71 -#define PCIE_AUX_CLK_SRC 72 -#define UFS_AXI_CLK_SRC 73 -#define UFS_ICE_CORE_CLK_SRC 74 -#define QSPI_SER_CLK_SRC 75 -#define GCC_SYS_NOC_AXI_CLK 76 -#define GCC_SYS_NOC_HMSS_AHB_CLK 77 -#define GCC_SNOC_CNOC_AHB_CLK 78 -#define GCC_SNOC_PNOC_AHB_CLK 79 -#define GCC_SYS_NOC_AT_CLK 80 -#define GCC_SYS_NOC_USB3_AXI_CLK 81 -#define GCC_SYS_NOC_UFS_AXI_CLK 82 -#define GCC_CFG_NOC_AHB_CLK 83 -#define GCC_PERIPH_NOC_AHB_CLK 84 -#define GCC_PERIPH_NOC_USB20_AHB_CLK 85 -#define GCC_TIC_CLK 86 -#define GCC_IMEM_AXI_CLK 87 -#define GCC_MMSS_SYS_NOC_AXI_CLK 88 -#define GCC_MMSS_NOC_CFG_AHB_CLK 89 -#define GCC_MMSS_BIMC_GFX_CLK 90 -#define GCC_USB30_MASTER_CLK 91 -#define GCC_USB30_SLEEP_CLK 92 -#define GCC_USB30_MOCK_UTMI_CLK 93 -#define GCC_USB3_PHY_AUX_CLK 94 -#define GCC_USB3_PHY_PIPE_CLK 95 -#define GCC_USB20_MASTER_CLK 96 -#define GCC_USB20_SLEEP_CLK 97 -#define GCC_USB20_MOCK_UTMI_CLK 98 -#define GCC_USB_PHY_CFG_AHB2PHY_CLK 99 -#define GCC_SDCC1_APPS_CLK 100 -#define GCC_SDCC1_AHB_CLK 101 -#define GCC_SDCC1_ICE_CORE_CLK 102 -#define GCC_SDCC2_APPS_CLK 103 -#define GCC_SDCC2_AHB_CLK 104 -#define GCC_SDCC3_APPS_CLK 105 -#define GCC_SDCC3_AHB_CLK 106 -#define GCC_SDCC4_APPS_CLK 107 -#define GCC_SDCC4_AHB_CLK 108 -#define GCC_BLSP1_AHB_CLK 109 -#define GCC_BLSP1_SLEEP_CLK 110 -#define GCC_BLSP1_QUP1_SPI_APPS_CLK 111 -#define GCC_BLSP1_QUP1_I2C_APPS_CLK 112 -#define GCC_BLSP1_UART1_APPS_CLK 113 -#define GCC_BLSP1_QUP2_SPI_APPS_CLK 114 -#define GCC_BLSP1_QUP2_I2C_APPS_CLK 115 -#define GCC_BLSP1_UART2_APPS_CLK 116 -#define GCC_BLSP1_QUP3_SPI_APPS_CLK 117 -#define GCC_BLSP1_QUP3_I2C_APPS_CLK 118 -#define GCC_BLSP1_UART3_APPS_CLK 119 -#define GCC_BLSP1_QUP4_SPI_APPS_CLK 120 -#define GCC_BLSP1_QUP4_I2C_APPS_CLK 121 -#define GCC_BLSP1_UART4_APPS_CLK 122 -#define GCC_BLSP1_QUP5_SPI_APPS_CLK 123 -#define GCC_BLSP1_QUP5_I2C_APPS_CLK 124 -#define GCC_BLSP1_UART5_APPS_CLK 125 -#define GCC_BLSP1_QUP6_SPI_APPS_CLK 126 -#define GCC_BLSP1_QUP6_I2C_APPS_CLK 127 -#define GCC_BLSP1_UART6_APPS_CLK 128 -#define GCC_BLSP2_AHB_CLK 129 -#define GCC_BLSP2_SLEEP_CLK 130 -#define GCC_BLSP2_QUP1_SPI_APPS_CLK 131 -#define GCC_BLSP2_QUP1_I2C_APPS_CLK 132 -#define GCC_BLSP2_UART1_APPS_CLK 133 -#define GCC_BLSP2_QUP2_SPI_APPS_CLK 134 -#define GCC_BLSP2_QUP2_I2C_APPS_CLK 135 -#define GCC_BLSP2_UART2_APPS_CLK 136 -#define GCC_BLSP2_QUP3_SPI_APPS_CLK 137 -#define GCC_BLSP2_QUP3_I2C_APPS_CLK 138 -#define GCC_BLSP2_UART3_APPS_CLK 139 -#define GCC_BLSP2_QUP4_SPI_APPS_CLK 140 -#define GCC_BLSP2_QUP4_I2C_APPS_CLK 141 -#define GCC_BLSP2_UART4_APPS_CLK 142 -#define GCC_BLSP2_QUP5_SPI_APPS_CLK 143 -#define GCC_BLSP2_QUP5_I2C_APPS_CLK 144 -#define GCC_BLSP2_UART5_APPS_CLK 145 -#define GCC_BLSP2_QUP6_SPI_APPS_CLK 146 -#define GCC_BLSP2_QUP6_I2C_APPS_CLK 147 -#define GCC_BLSP2_UART6_APPS_CLK 148 -#define GCC_PDM_AHB_CLK 149 -#define GCC_PDM_XO4_CLK 150 -#define GCC_PDM2_CLK 151 -#define GCC_PRNG_AHB_CLK 152 -#define GCC_TSIF_AHB_CLK 153 -#define GCC_TSIF_REF_CLK 154 -#define GCC_TSIF_INACTIVITY_TIMERS_CLK 155 -#define GCC_TCSR_AHB_CLK 156 -#define GCC_BOOT_ROM_AHB_CLK 157 -#define GCC_MSG_RAM_AHB_CLK 158 -#define GCC_TLMM_AHB_CLK 159 -#define GCC_TLMM_CLK 160 -#define GCC_MPM_AHB_CLK 161 -#define GCC_SPMI_SER_CLK 162 -#define GCC_SPMI_CNOC_AHB_CLK 163 -#define GCC_CE1_CLK 164 -#define GCC_CE1_AXI_CLK 165 -#define GCC_CE1_AHB_CLK 166 -#define GCC_BIMC_HMSS_AXI_CLK 167 -#define GCC_BIMC_GFX_CLK 168 -#define GCC_HMSS_AHB_CLK 169 -#define GCC_HMSS_SLV_AXI_CLK 170 -#define GCC_HMSS_MSTR_AXI_CLK 171 -#define GCC_HMSS_RBCPR_CLK 172 -#define GCC_GP1_CLK 173 -#define GCC_GP2_CLK 174 -#define GCC_GP3_CLK 175 -#define GCC_PCIE_0_SLV_AXI_CLK 176 -#define GCC_PCIE_0_MSTR_AXI_CLK 177 -#define GCC_PCIE_0_CFG_AHB_CLK 178 -#define GCC_PCIE_0_AUX_CLK 179 -#define GCC_PCIE_0_PIPE_CLK 180 -#define GCC_PCIE_1_SLV_AXI_CLK 181 -#define GCC_PCIE_1_MSTR_AXI_CLK 182 -#define GCC_PCIE_1_CFG_AHB_CLK 183 -#define GCC_PCIE_1_AUX_CLK 184 -#define GCC_PCIE_1_PIPE_CLK 185 -#define GCC_PCIE_2_SLV_AXI_CLK 186 -#define GCC_PCIE_2_MSTR_AXI_CLK 187 -#define GCC_PCIE_2_CFG_AHB_CLK 188 -#define GCC_PCIE_2_AUX_CLK 189 -#define GCC_PCIE_2_PIPE_CLK 190 -#define GCC_PCIE_PHY_CFG_AHB_CLK 191 -#define GCC_PCIE_PHY_AUX_CLK 192 -#define GCC_UFS_AXI_CLK 193 -#define GCC_UFS_AHB_CLK 194 -#define GCC_UFS_TX_CFG_CLK 195 -#define GCC_UFS_RX_CFG_CLK 196 -#define GCC_UFS_TX_SYMBOL_0_CLK 197 -#define GCC_UFS_RX_SYMBOL_0_CLK 198 -#define GCC_UFS_RX_SYMBOL_1_CLK 199 -#define GCC_UFS_UNIPRO_CORE_CLK 200 -#define GCC_UFS_ICE_CORE_CLK 201 -#define GCC_UFS_SYS_CLK_CORE_CLK 202 -#define GCC_UFS_TX_SYMBOL_CLK_CORE_CLK 203 -#define GCC_AGGRE0_SNOC_AXI_CLK 204 -#define GCC_AGGRE0_CNOC_AHB_CLK 205 -#define GCC_SMMU_AGGRE0_AXI_CLK 206 -#define GCC_SMMU_AGGRE0_AHB_CLK 207 -#define GCC_AGGRE1_PNOC_AHB_CLK 208 -#define GCC_AGGRE2_UFS_AXI_CLK 209 -#define GCC_AGGRE2_USB3_AXI_CLK 210 -#define GCC_QSPI_AHB_CLK 211 -#define GCC_QSPI_SER_CLK 212 -#define GCC_USB3_CLKREF_CLK 213 -#define GCC_HDMI_CLKREF_CLK 214 -#define GCC_UFS_CLKREF_CLK 215 -#define GCC_PCIE_CLKREF_CLK 216 -#define GCC_RX2_USB2_CLKREF_CLK 217 -#define GCC_RX1_USB2_CLKREF_CLK 218 -#define GCC_AGGRE0_NOC_QOSGEN_EXTREF_CLK 219 -#define GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK 220 -#define GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 221 -#define GCC_EDP_CLKREF_CLK 222 -#define GCC_MSS_CFG_AHB_CLK 223 -#define GCC_MSS_Q6_BIMC_AXI_CLK 224 -#define GCC_MSS_SNOC_AXI_CLK 225 -#define GCC_MSS_MNOC_BIMC_AXI_CLK 226 -#define GCC_DCC_AHB_ALK 227 -#define GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK 228 -#define GCC_MMSS_GPLL0_DIV_CLK 229 -#define GPLL0_OUT_MSSCC 230 +/* Hardware/Dummy/Voter clocks */ +#define GCC_XO 0 +#define GCC_CE1_AHB_M_CLK 1 +#define GCC_CE1_AXI_M_CLK 2 +#define GCC_GPLL0_EARLY_DIV 3 +#define GCC_UFS_TX_CFG_CLK_SRC 4 +#define GCC_UFS_RX_CFG_CLK_SRC 5 +#define GCC_UFS_ICE_CORE_PDIV_CLK_SRC 6 +/* RCGs and Branches */ +#define GPLL0_EARLY 7 +#define GPLL0 8 +#define GPLL4_EARLY 9 +#define GPLL4 10 +#define SYSTEM_NOC_CLK_SRC 11 +#define CONFIG_NOC_CLK_SRC 12 +#define PERIPH_NOC_CLK_SRC 13 +#define MMSS_BIMC_GFX_CLK_SRC 14 +#define USB30_MASTER_CLK_SRC 15 +#define USB30_MOCK_UTMI_CLK_SRC 16 +#define USB3_PHY_AUX_CLK_SRC 17 +#define USB20_MASTER_CLK_SRC 18 +#define USB20_MOCK_UTMI_CLK_SRC 19 +#define SDCC1_APPS_CLK_SRC 20 +#define SDCC1_ICE_CORE_CLK_SRC 21 +#define SDCC2_APPS_CLK_SRC 22 +#define SDCC3_APPS_CLK_SRC 23 +#define SDCC4_APPS_CLK_SRC 24 +#define BLSP1_QUP1_SPI_APPS_CLK_SRC 25 +#define BLSP1_QUP1_I2C_APPS_CLK_SRC 26 +#define BLSP1_UART1_APPS_CLK_SRC 27 +#define BLSP1_QUP2_SPI_APPS_CLK_SRC 28 +#define BLSP1_QUP2_I2C_APPS_CLK_SRC 29 +#define BLSP1_UART2_APPS_CLK_SRC 30 +#define BLSP1_QUP3_SPI_APPS_CLK_SRC 31 +#define BLSP1_QUP3_I2C_APPS_CLK_SRC 32 +#define BLSP1_UART3_APPS_CLK_SRC 33 +#define BLSP1_QUP4_SPI_APPS_CLK_SRC 34 +#define BLSP1_QUP4_I2C_APPS_CLK_SRC 35 +#define BLSP1_UART4_APPS_CLK_SRC 36 +#define BLSP1_QUP5_SPI_APPS_CLK_SRC 37 +#define BLSP1_QUP5_I2C_APPS_CLK_SRC 38 +#define BLSP1_UART5_APPS_CLK_SRC 39 +#define BLSP1_QUP6_SPI_APPS_CLK_SRC 40 +#define BLSP1_QUP6_I2C_APPS_CLK_SRC 41 +#define BLSP1_UART6_APPS_CLK_SRC 42 +#define BLSP2_QUP1_SPI_APPS_CLK_SRC 43 +#define BLSP2_QUP1_I2C_APPS_CLK_SRC 44 +#define BLSP2_UART1_APPS_CLK_SRC 45 +#define BLSP2_QUP2_SPI_APPS_CLK_SRC 46 +#define BLSP2_QUP2_I2C_APPS_CLK_SRC 47 +#define BLSP2_UART2_APPS_CLK_SRC 48 +#define BLSP2_QUP3_SPI_APPS_CLK_SRC 49 +#define BLSP2_QUP3_I2C_APPS_CLK_SRC 50 +#define BLSP2_UART3_APPS_CLK_SRC 51 +#define BLSP2_QUP4_SPI_APPS_CLK_SRC 52 +#define BLSP2_QUP4_I2C_APPS_CLK_SRC 53 +#define BLSP2_UART4_APPS_CLK_SRC 54 +#define BLSP2_QUP5_SPI_APPS_CLK_SRC 55 +#define BLSP2_QUP5_I2C_APPS_CLK_SRC 56 +#define BLSP2_UART5_APPS_CLK_SRC 57 +#define BLSP2_QUP6_SPI_APPS_CLK_SRC 58 +#define BLSP2_QUP6_I2C_APPS_CLK_SRC 59 +#define BLSP2_UART6_APPS_CLK_SRC 60 +#define PDM2_CLK_SRC 61 +#define TSIF_REF_CLK_SRC 62 +#define CE1_CLK_SRC 63 +#define GCC_SLEEP_CLK_SRC 64 +#define BIMC_CLK_SRC 65 +#define HMSS_AHB_CLK_SRC 66 +#define BIMC_HMSS_AXI_CLK_SRC 67 +#define HMSS_RBCPR_CLK_SRC 68 +#define HMSS_GPLL0_CLK_SRC 69 +#define GP1_CLK_SRC 70 +#define GP2_CLK_SRC 71 +#define GP3_CLK_SRC 72 +#define PCIE_AUX_CLK_SRC 73 +#define UFS_AXI_CLK_SRC 74 +#define UFS_ICE_CORE_CLK_SRC 75 +#define QSPI_SER_CLK_SRC 76 +#define GCC_SYS_NOC_AXI_CLK 77 +#define GCC_SYS_NOC_HMSS_AHB_CLK 78 +#define GCC_SNOC_CNOC_AHB_CLK 79 +#define GCC_SNOC_PNOC_AHB_CLK 80 +#define GCC_SYS_NOC_AT_CLK 81 +#define GCC_SYS_NOC_USB3_AXI_CLK 82 +#define GCC_SYS_NOC_UFS_AXI_CLK 83 +#define GCC_CFG_NOC_AHB_CLK 84 +#define GCC_PERIPH_NOC_AHB_CLK 85 +#define GCC_PERIPH_NOC_USB20_AHB_CLK 86 +#define GCC_TIC_CLK 87 +#define GCC_IMEM_AXI_CLK 88 +#define GCC_MMSS_SYS_NOC_AXI_CLK 89 +#define GCC_MMSS_NOC_CFG_AHB_CLK 90 +#define GCC_MMSS_BIMC_GFX_CLK 91 +#define GCC_USB30_MASTER_CLK 92 +#define GCC_USB30_SLEEP_CLK 93 +#define GCC_USB30_MOCK_UTMI_CLK 94 +#define GCC_USB3_PHY_AUX_CLK 95 +#define GCC_USB3_PHY_PIPE_CLK 96 +#define GCC_USB20_MASTER_CLK 97 +#define GCC_USB20_SLEEP_CLK 98 +#define GCC_USB20_MOCK_UTMI_CLK 99 +#define GCC_USB_PHY_CFG_AHB2PHY_CLK 100 +#define GCC_SDCC1_APPS_CLK 101 +#define GCC_SDCC1_AHB_CLK 102 +#define GCC_SDCC1_ICE_CORE_CLK 103 +#define GCC_SDCC2_APPS_CLK 104 +#define GCC_SDCC2_AHB_CLK 105 +#define GCC_SDCC3_APPS_CLK 106 +#define GCC_SDCC3_AHB_CLK 107 +#define GCC_SDCC4_APPS_CLK 108 +#define GCC_SDCC4_AHB_CLK 109 +#define GCC_BLSP1_AHB_CLK 110 +#define GCC_BLSP1_SLEEP_CLK 111 +#define GCC_BLSP1_QUP1_SPI_APPS_CLK 112 +#define GCC_BLSP1_QUP1_I2C_APPS_CLK 113 +#define GCC_BLSP1_UART1_APPS_CLK 114 +#define GCC_BLSP1_QUP2_SPI_APPS_CLK 115 +#define GCC_BLSP1_QUP2_I2C_APPS_CLK 116 +#define GCC_BLSP1_UART2_APPS_CLK 117 +#define GCC_BLSP1_QUP3_SPI_APPS_CLK 118 +#define GCC_BLSP1_QUP3_I2C_APPS_CLK 119 +#define GCC_BLSP1_UART3_APPS_CLK 120 +#define GCC_BLSP1_QUP4_SPI_APPS_CLK 121 +#define GCC_BLSP1_QUP4_I2C_APPS_CLK 122 +#define GCC_BLSP1_UART4_APPS_CLK 123 +#define GCC_BLSP1_QUP5_SPI_APPS_CLK 124 +#define GCC_BLSP1_QUP5_I2C_APPS_CLK 125 +#define GCC_BLSP1_UART5_APPS_CLK 126 +#define GCC_BLSP1_QUP6_SPI_APPS_CLK 127 +#define GCC_BLSP1_QUP6_I2C_APPS_CLK 128 +#define GCC_BLSP1_UART6_APPS_CLK 129 +#define GCC_BLSP2_AHB_CLK 130 +#define GCC_BLSP2_SLEEP_CLK 131 +#define GCC_BLSP2_QUP1_SPI_APPS_CLK 132 +#define GCC_BLSP2_QUP1_I2C_APPS_CLK 133 +#define GCC_BLSP2_UART1_APPS_CLK 134 +#define GCC_BLSP2_QUP2_SPI_APPS_CLK 135 +#define GCC_BLSP2_QUP2_I2C_APPS_CLK 136 +#define GCC_BLSP2_UART2_APPS_CLK 137 +#define GCC_BLSP2_QUP3_SPI_APPS_CLK 138 +#define GCC_BLSP2_QUP3_I2C_APPS_CLK 139 +#define GCC_BLSP2_UART3_APPS_CLK 140 +#define GCC_BLSP2_QUP4_SPI_APPS_CLK 141 +#define GCC_BLSP2_QUP4_I2C_APPS_CLK 142 +#define GCC_BLSP2_UART4_APPS_CLK 143 +#define GCC_BLSP2_QUP5_SPI_APPS_CLK 144 +#define GCC_BLSP2_QUP5_I2C_APPS_CLK 145 +#define GCC_BLSP2_UART5_APPS_CLK 146 +#define GCC_BLSP2_QUP6_SPI_APPS_CLK 147 +#define GCC_BLSP2_QUP6_I2C_APPS_CLK 148 +#define GCC_BLSP2_UART6_APPS_CLK 149 +#define GCC_PDM_AHB_CLK 150 +#define GCC_PDM_XO4_CLK 151 +#define GCC_PDM2_CLK 152 +#define GCC_PRNG_AHB_CLK 153 +#define GCC_TSIF_AHB_CLK 154 +#define GCC_TSIF_REF_CLK 155 +#define GCC_TSIF_INACTIVITY_TIMERS_CLK 156 +#define GCC_TCSR_AHB_CLK 157 +#define GCC_BOOT_ROM_AHB_CLK 158 +#define GCC_MSG_RAM_AHB_CLK 159 +#define GCC_TLMM_AHB_CLK 160 +#define GCC_TLMM_CLK 161 +#define GCC_MPM_AHB_CLK 162 +#define GCC_SPMI_SER_CLK 163 +#define GCC_SPMI_CNOC_AHB_CLK 164 +#define GCC_BIMC_HMSS_AXI_CLK 165 +#define GCC_BIMC_GFX_CLK 166 +#define GCC_HMSS_AHB_CLK 167 +#define GCC_HMSS_SLV_AXI_CLK 168 +#define GCC_HMSS_MSTR_AXI_CLK 169 +#define GCC_HMSS_RBCPR_CLK 170 +#define GCC_GP1_CLK 171 +#define GCC_GP2_CLK 172 +#define GCC_GP3_CLK 173 +#define GCC_PCIE_0_SLV_AXI_CLK 174 +#define GCC_PCIE_0_MSTR_AXI_CLK 175 +#define GCC_PCIE_0_CFG_AHB_CLK 176 +#define GCC_PCIE_0_AUX_CLK 177 +#define GCC_PCIE_0_PIPE_CLK 178 +#define GCC_PCIE_1_SLV_AXI_CLK 179 +#define GCC_PCIE_1_MSTR_AXI_CLK 180 +#define GCC_PCIE_1_CFG_AHB_CLK 181 +#define GCC_PCIE_1_AUX_CLK 182 +#define GCC_PCIE_1_PIPE_CLK 183 +#define GCC_PCIE_2_SLV_AXI_CLK 184 +#define GCC_PCIE_2_MSTR_AXI_CLK 185 +#define GCC_PCIE_2_CFG_AHB_CLK 186 +#define GCC_PCIE_2_AUX_CLK 187 +#define GCC_PCIE_2_PIPE_CLK 188 +#define GCC_PCIE_PHY_CFG_AHB_CLK 189 +#define GCC_PCIE_PHY_AUX_CLK 190 +#define GCC_UFS_AXI_CLK 191 +#define GCC_UFS_AHB_CLK 192 +#define GCC_UFS_TX_CFG_CLK 193 +#define GCC_UFS_RX_CFG_CLK 194 +#define GCC_UFS_TX_SYMBOL_0_CLK 195 +#define GCC_UFS_RX_SYMBOL_0_CLK 196 +#define GCC_UFS_RX_SYMBOL_1_CLK 197 +#define GCC_UFS_UNIPRO_CORE_CLK 198 +#define GCC_UFS_ICE_CORE_CLK 199 +#define GCC_UFS_SYS_CLK_CORE_CLK 200 +#define GCC_UFS_TX_SYMBOL_CLK_CORE_CLK 201 +#define GCC_AGGRE0_SNOC_AXI_CLK 202 +#define GCC_AGGRE0_CNOC_AHB_CLK 203 +#define GCC_SMMU_AGGRE0_AXI_CLK 204 +#define GCC_SMMU_AGGRE0_AHB_CLK 205 +#define GCC_AGGRE2_UFS_AXI_CLK 206 +#define GCC_AGGRE2_USB3_AXI_CLK 207 +#define GCC_QSPI_AHB_CLK 208 +#define GCC_QSPI_SER_CLK 209 +#define GCC_USB3_CLKREF_CLK 210 +#define GCC_HDMI_CLKREF_CLK 211 +#define GCC_UFS_CLKREF_CLK 212 +#define GCC_PCIE_CLKREF_CLK 213 +#define GCC_RX2_USB2_CLKREF_CLK 214 +#define GCC_RX1_USB2_CLKREF_CLK 215 +#define GCC_AGGRE0_NOC_QOSGEN_EXTREF_CLK 216 +#define GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK 217 +#define GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 218 +#define GCC_EDP_CLKREF_CLK 219 +#define GCC_MSS_CFG_AHB_CLK 220 +#define GCC_MSS_Q6_BIMC_AXI_CLK 221 +#define GCC_MSS_SNOC_AXI_CLK 222 +#define GCC_MSS_MNOC_BIMC_AXI_CLK 223 +#define GCC_DCC_AHB_CLK 224 +#define GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK 225 +#define GCC_MMSS_GPLL0_DIV_CLK 226 +#define GPLL0_OUT_MSSCC_CLK 227 + +/* Block resets */ #define GCC_SYSTEM_NOC_BCR 0 #define GCC_CONFIG_NOC_BCR 1 #define GCC_PERIPH_NOC_BCR 2 diff --git a/include/dt-bindings/clock/qcom,gcc-msmfalcon.h b/include/dt-bindings/clock/qcom,gcc-sdm660.h index aa76fbad5083..e66633c74c0c 100644 --- a/include/dt-bindings/clock/qcom,gcc-msmfalcon.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm660.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -11,8 +11,8 @@ * GNU General Public License for more details. */ -#ifndef _DT_BINDINGS_CLK_MSM_GCC_FALCON_H -#define _DT_BINDINGS_CLK_MSM_GCC_FALCON_H +#ifndef _DT_BINDINGS_CLK_MSM_GCC_660_H +#define _DT_BINDINGS_CLK_MSM_GCC_660_H /* Hardware/Dummy/Voter clocks */ #define GCC_XO 0 @@ -77,11 +77,9 @@ #define GCC_GP2_CLK 62 #define GCC_GP3_CLK 63 #define GCC_GPU_BIMC_GFX_CLK 64 -#define GCC_GPU_BIMC_GFX_SRC_CLK 65 #define GCC_GPU_CFG_AHB_CLK 66 #define GCC_GPU_GPLL0_CLK 67 #define GCC_GPU_GPLL0_DIV_CLK 68 -#define GCC_GPU_SNOC_DVM_GFX_CLK 69 #define GCC_HMSS_AHB_CLK 70 #define GCC_HMSS_DVM_BUS_CLK 71 #define GCC_HMSS_RBCPR_CLK 72 @@ -134,7 +132,7 @@ #define GPLL0_OUT_AUX2 119 #define GPLL0_OUT_EARLY 120 #define GPLL0_OUT_MAIN 121 -#define GPLL0_OUT_TEST 122 +#define GPLL0_AO 122 #define GPLL1 123 #define GPLL1_OUT_AUX 124 #define GPLL1_OUT_AUX2 125 diff --git a/include/dt-bindings/clock/qcom,gpu-msmfalcon.h b/include/dt-bindings/clock/qcom,gpu-msmfalcon.h deleted file mode 100644 index 2ef1e34db3a1..000000000000 --- a/include/dt-bindings/clock/qcom,gpu-msmfalcon.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DT_BINDINGS_CLK_MSM_GPU_FALCON_H -#define _DT_BINDINGS_CLK_MSM_GPU_FALCON_H - -#define GFX3D_CLK_SRC 0 -#define GPU_PLL0_PLL 1 -#define GPU_PLL0_PLL_OUT_AUX 2 -#define GPU_PLL0_PLL_OUT_AUX2 3 -#define GPU_PLL0_PLL_OUT_EARLY 4 -#define GPU_PLL0_PLL_OUT_MAIN 5 -#define GPU_PLL0_PLL_OUT_TEST 6 -#define GPU_PLL1_PLL 7 -#define GPU_PLL1_PLL_OUT_AUX 8 -#define GPU_PLL1_PLL_OUT_AUX2 9 -#define GPU_PLL1_PLL_OUT_EARLY 10 -#define GPU_PLL1_PLL_OUT_MAIN 11 -#define GPU_PLL1_PLL_OUT_TEST 12 -#define GPUCC_CXO_CLK 13 -#define GPUCC_GFX3D_CLK 14 -#define GPUCC_RBBMTIMER_CLK 15 -#define GPUCC_RBCPR_CLK 16 -#define RBBMTIMER_CLK_SRC 17 -#define RBCPR_CLK_SRC 18 - -#define GPU_CX_GDSC 0 -#define GPU_GX_GDSC 1 - -#define GPUCC_GPU_CX_BCR 0 -#define GPUCC_GPU_GX_BCR 1 -#define GPUCC_RBCPR_BCR 2 -#define GPUCC_SPDM_BCR 3 - -#endif diff --git a/include/dt-bindings/clock/qcom,gpu-sdm660.h b/include/dt-bindings/clock/qcom,gpu-sdm660.h new file mode 100644 index 000000000000..fd5328c056b8 --- /dev/null +++ b/include/dt-bindings/clock/qcom,gpu-sdm660.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_MSM_GPU_660_H +#define _DT_BINDINGS_CLK_MSM_GPU_660_H + +#define GPU_PLL0_PLL 0 +#define GPU_PLL0_PLL_OUT_AUX 1 +#define GPU_PLL0_PLL_OUT_AUX2 2 +#define GPU_PLL0_PLL_OUT_EARLY 3 +#define GPU_PLL0_PLL_OUT_MAIN 4 +#define GPU_PLL0_PLL_OUT_TEST 5 +#define GPU_PLL1_PLL 6 +#define GPU_PLL1_PLL_OUT_AUX 7 +#define GPU_PLL1_PLL_OUT_AUX2 8 +#define GPU_PLL1_PLL_OUT_EARLY 9 +#define GPU_PLL1_PLL_OUT_MAIN 10 +#define GPU_PLL1_PLL_OUT_TEST 11 +#define GFX3D_CLK_SRC 12 +#define GPUCC_GFX3D_CLK 13 +#define GPUCC_RBBMTIMER_CLK 14 +#define RBBMTIMER_CLK_SRC 15 +#define GPUCC_CXO_CLK 16 + +/* RBCPR GPUCC clocks */ +#define RBCPR_CLK_SRC 0 +#define GPUCC_RBCPR_CLK 1 + +#define GPU_CX_GDSC 0 +#define GPU_GX_GDSC 1 + +#define GPUCC_GPU_CX_BCR 0 +#define GPUCC_GPU_GX_BCR 1 +#define GPUCC_RBCPR_BCR 2 +#define GPUCC_SPDM_BCR 3 + +#endif diff --git a/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h b/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h deleted file mode 100644 index 7a6ec2bf2418..000000000000 --- a/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DT_BINDINGS_CLK_MSM_MMCC_FALCON_H -#define _DT_BINDINGS_CLK_MSM_MMCC_FALCON_H - -#define AHB_CLK_SRC 0 -#define BYTE0_CLK_SRC 1 -#define BYTE1_CLK_SRC 2 -#define CAMSS_GP0_CLK_SRC 3 -#define CAMSS_GP1_CLK_SRC 4 -#define CCI_CLK_SRC 5 -#define CPP_CLK_SRC 6 -#define CSI0_CLK_SRC 7 -#define CSI0PHYTIMER_CLK_SRC 8 -#define CSI1_CLK_SRC 9 -#define CSI1PHYTIMER_CLK_SRC 10 -#define CSI2_CLK_SRC 11 -#define CSI2PHYTIMER_CLK_SRC 12 -#define CSI3_CLK_SRC 13 -#define CSIPHY_CLK_SRC 14 -#define DP_AUX_CLK_SRC 15 -#define DP_CRYPTO_CLK_SRC 16 -#define DP_GTC_CLK_SRC 17 -#define DP_LINK_CLK_SRC 18 -#define DP_PIXEL_CLK_SRC 19 -#define ESC0_CLK_SRC 20 -#define ESC1_CLK_SRC 21 -#define JPEG0_CLK_SRC 22 -#define MCLK0_CLK_SRC 23 -#define MCLK1_CLK_SRC 24 -#define MCLK2_CLK_SRC 25 -#define MCLK3_CLK_SRC 26 -#define MDP_CLK_SRC 27 -#define MMPLL0_PLL 28 -#define MMPLL0_PLL_OUT_AUX 29 -#define MMPLL0_PLL_OUT_AUX2 30 -#define MMPLL0_PLL_OUT_EARLY 31 -#define MMPLL0_PLL_OUT_MAIN 32 -#define MMPLL0_PLL_OUT_TEST 33 -#define MMPLL10_PLL 34 -#define MMPLL10_PLL_OUT_AUX 35 -#define MMPLL10_PLL_OUT_AUX2 36 -#define MMPLL10_PLL_OUT_EARLY 37 -#define MMPLL10_PLL_OUT_MAIN 38 -#define MMPLL10_PLL_OUT_TEST 39 -#define MMPLL1_PLL 40 -#define MMPLL1_PLL_OUT_AUX 41 -#define MMPLL1_PLL_OUT_AUX2 42 -#define MMPLL1_PLL_OUT_EARLY 43 -#define MMPLL1_PLL_OUT_MAIN 44 -#define MMPLL1_PLL_OUT_TEST 45 -#define MMPLL3_PLL 46 -#define MMPLL3_PLL_OUT_AUX 47 -#define MMPLL3_PLL_OUT_AUX2 48 -#define MMPLL3_PLL_OUT_EARLY 49 -#define MMPLL3_PLL_OUT_MAIN 50 -#define MMPLL3_PLL_OUT_TEST 51 -#define MMPLL4_PLL 52 -#define MMPLL4_PLL_OUT_AUX 53 -#define MMPLL4_PLL_OUT_AUX2 54 -#define MMPLL4_PLL_OUT_EARLY 55 -#define MMPLL4_PLL_OUT_MAIN 56 -#define MMPLL4_PLL_OUT_TEST 57 -#define MMPLL5_PLL 58 -#define MMPLL5_PLL_OUT_AUX 59 -#define MMPLL5_PLL_OUT_AUX2 60 -#define MMPLL5_PLL_OUT_EARLY 61 -#define MMPLL5_PLL_OUT_MAIN 62 -#define MMPLL5_PLL_OUT_TEST 63 -#define MMPLL6_PLL 64 -#define MMPLL6_PLL_OUT_AUX 65 -#define MMPLL6_PLL_OUT_AUX2 66 -#define MMPLL6_PLL_OUT_EARLY 67 -#define MMPLL6_PLL_OUT_MAIN 68 -#define MMPLL6_PLL_OUT_TEST 69 -#define MMPLL7_PLL 70 -#define MMPLL7_PLL_OUT_AUX 71 -#define MMPLL7_PLL_OUT_AUX2 72 -#define MMPLL7_PLL_OUT_EARLY 73 -#define MMPLL7_PLL_OUT_MAIN 74 -#define MMPLL7_PLL_OUT_TEST 75 -#define MMPLL8_PLL 76 -#define MMPLL8_PLL_OUT_AUX 77 -#define MMPLL8_PLL_OUT_AUX2 78 -#define MMPLL8_PLL_OUT_EARLY 79 -#define MMPLL8_PLL_OUT_MAIN 80 -#define MMPLL8_PLL_OUT_TEST 81 -#define MMSS_BIMC_SMMU_AHB_CLK 82 -#define MMSS_BIMC_SMMU_AXI_CLK 83 -#define MMSS_CAMSS_AHB_CLK 84 -#define MMSS_CAMSS_CCI_AHB_CLK 85 -#define MMSS_CAMSS_CCI_CLK 86 -#define MMSS_CAMSS_CPHY_CSID0_CLK 87 -#define MMSS_CAMSS_CPHY_CSID1_CLK 88 -#define MMSS_CAMSS_CPHY_CSID2_CLK 89 -#define MMSS_CAMSS_CPHY_CSID3_CLK 90 -#define MMSS_CAMSS_CPP_AHB_CLK 91 -#define MMSS_CAMSS_CPP_AXI_CLK 92 -#define MMSS_CAMSS_CPP_CLK 93 -#define MMSS_CAMSS_CPP_VBIF_AHB_CLK 94 -#define MMSS_CAMSS_CSI0_AHB_CLK 95 -#define MMSS_CAMSS_CSI0_CLK 96 -#define MMSS_CAMSS_CSI0PHYTIMER_CLK 97 -#define MMSS_CAMSS_CSI0PIX_CLK 98 -#define MMSS_CAMSS_CSI0RDI_CLK 99 -#define MMSS_CAMSS_CSI1_AHB_CLK 100 -#define MMSS_CAMSS_CSI1_CLK 101 -#define MMSS_CAMSS_CSI1PHYTIMER_CLK 102 -#define MMSS_CAMSS_CSI1PIX_CLK 103 -#define MMSS_CAMSS_CSI1RDI_CLK 104 -#define MMSS_CAMSS_CSI2_AHB_CLK 105 -#define MMSS_CAMSS_CSI2_CLK 106 -#define MMSS_CAMSS_CSI2PHYTIMER_CLK 107 -#define MMSS_CAMSS_CSI2PIX_CLK 108 -#define MMSS_CAMSS_CSI2RDI_CLK 109 -#define MMSS_CAMSS_CSI3_AHB_CLK 110 -#define MMSS_CAMSS_CSI3_CLK 111 -#define MMSS_CAMSS_CSI3PIX_CLK 112 -#define MMSS_CAMSS_CSI3RDI_CLK 113 -#define MMSS_CAMSS_CSI_VFE0_CLK 114 -#define MMSS_CAMSS_CSI_VFE1_CLK 115 -#define MMSS_CAMSS_CSIPHY0_CLK 116 -#define MMSS_CAMSS_CSIPHY1_CLK 117 -#define MMSS_CAMSS_CSIPHY2_CLK 118 -#define MMSS_CAMSS_GP0_CLK 119 -#define MMSS_CAMSS_GP1_CLK 120 -#define MMSS_CAMSS_ISPIF_AHB_CLK 121 -#define MMSS_CAMSS_JPEG0_CLK 122 -#define MMSS_CAMSS_JPEG_AHB_CLK 123 -#define MMSS_CAMSS_JPEG_AXI_CLK 124 -#define MMSS_CAMSS_MCLK0_CLK 125 -#define MMSS_CAMSS_MCLK1_CLK 126 -#define MMSS_CAMSS_MCLK2_CLK 127 -#define MMSS_CAMSS_MCLK3_CLK 128 -#define MMSS_CAMSS_MICRO_AHB_CLK 129 -#define MMSS_CAMSS_TOP_AHB_CLK 130 -#define MMSS_CAMSS_VFE0_AHB_CLK 131 -#define MMSS_CAMSS_VFE0_CLK 132 -#define MMSS_CAMSS_VFE0_STREAM_CLK 133 -#define MMSS_CAMSS_VFE1_AHB_CLK 134 -#define MMSS_CAMSS_VFE1_CLK 135 -#define MMSS_CAMSS_VFE1_STREAM_CLK 136 -#define MMSS_CAMSS_VFE_VBIF_AHB_CLK 137 -#define MMSS_CAMSS_VFE_VBIF_AXI_CLK 138 -#define MMSS_CSIPHY_AHB2CRIF_CLK 139 -#define MMSS_CXO_CLK 140 -#define MMSS_MDSS_AHB_CLK 141 -#define MMSS_MDSS_AXI_CLK 142 -#define MMSS_MDSS_BYTE0_CLK 143 -#define MMSS_MDSS_BYTE0_INTF_CLK 144 -#define MMSS_MDSS_BYTE0_INTF_DIV_CLK 145 -#define MMSS_MDSS_BYTE1_CLK 146 -#define MMSS_MDSS_BYTE1_INTF_CLK 147 -#define MMSS_MDSS_DP_AUX_CLK 148 -#define MMSS_MDSS_DP_CRYPTO_CLK 149 -#define MMSS_MDSS_DP_GTC_CLK 150 -#define MMSS_MDSS_DP_LINK_CLK 151 -#define MMSS_MDSS_DP_LINK_INTF_CLK 152 -#define MMSS_MDSS_DP_PIXEL_CLK 153 -#define MMSS_MDSS_ESC0_CLK 154 -#define MMSS_MDSS_ESC1_CLK 155 -#define MMSS_MDSS_HDMI_DP_AHB_CLK 156 -#define MMSS_MDSS_MDP_CLK 157 -#define MMSS_MDSS_PCLK0_CLK 158 -#define MMSS_MDSS_PCLK1_CLK 159 -#define MMSS_MDSS_ROT_CLK 160 -#define MMSS_MDSS_VSYNC_CLK 161 -#define MMSS_MISC_AHB_CLK 162 -#define MMSS_MISC_CXO_CLK 163 -#define MMSS_MNOC_AHB_CLK 164 -#define MMSS_SNOC_DVM_AXI_CLK 165 -#define MMSS_THROTTLE_CAMSS_AHB_CLK 166 -#define MMSS_THROTTLE_CAMSS_AXI_CLK 167 -#define MMSS_THROTTLE_CAMSS_CXO_CLK 168 -#define MMSS_THROTTLE_MDSS_AHB_CLK 169 -#define MMSS_THROTTLE_MDSS_AXI_CLK 170 -#define MMSS_THROTTLE_MDSS_CXO_CLK 171 -#define MMSS_THROTTLE_VIDEO_AHB_CLK 172 -#define MMSS_THROTTLE_VIDEO_AXI_CLK 173 -#define MMSS_THROTTLE_VIDEO_CXO_CLK 174 -#define MMSS_VIDEO_AHB_CLK 175 -#define MMSS_VIDEO_AXI_CLK 176 -#define MMSS_VIDEO_CORE_CLK 177 -#define MMSS_VIDEO_SUBCORE0_CLK 178 -#define PCLK0_CLK_SRC 179 -#define PCLK1_CLK_SRC 180 -#define ROT_CLK_SRC 181 -#define VFE0_CLK_SRC 182 -#define VFE1_CLK_SRC 183 -#define VIDEO_CORE_CLK_SRC 184 -#define VSYNC_CLK_SRC 185 - -#define BIMC_SMMU_GDSC 0 -#define CAMSS_CPP_GDSC 1 -#define CAMSS_TOP_GDSC 2 -#define CAMSS_VFE0_GDSC 3 -#define CAMSS_VFE1_GDSC 4 -#define MDSS_GDSC 5 -#define VIDEO_SUBCORE0_GDSC 6 -#define VIDEO_TOP_GDSC 7 - -#define CAMSS_MICRO_BCR 0 - -#endif diff --git a/include/dt-bindings/clock/qcom,mmcc-sdm660.h b/include/dt-bindings/clock/qcom,mmcc-sdm660.h new file mode 100644 index 000000000000..68657c5d9761 --- /dev/null +++ b/include/dt-bindings/clock/qcom,mmcc-sdm660.h @@ -0,0 +1,219 @@ +/* + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_MSM_MMCC_660_H +#define _DT_BINDINGS_CLK_MSM_MMCC_660_H + +#define MMSS_CAMSS_JPEG0_VOTE_CLK 0 +#define MMSS_CAMSS_JPEG0_DMA_VOTE_CLK 1 + +#define AHB_CLK_SRC 5 +#define BYTE0_CLK_SRC 6 +#define BYTE1_CLK_SRC 7 +#define CAMSS_GP0_CLK_SRC 8 +#define CAMSS_GP1_CLK_SRC 9 +#define CCI_CLK_SRC 10 +#define CPP_CLK_SRC 11 +#define CSI0_CLK_SRC 12 +#define CSI0PHYTIMER_CLK_SRC 13 +#define CSI1_CLK_SRC 14 +#define CSI1PHYTIMER_CLK_SRC 15 +#define CSI2_CLK_SRC 16 +#define CSI2PHYTIMER_CLK_SRC 17 +#define CSI3_CLK_SRC 18 +#define CSIPHY_CLK_SRC 19 +#define DP_AUX_CLK_SRC 20 +#define DP_CRYPTO_CLK_SRC 21 +#define DP_GTC_CLK_SRC 22 +#define DP_LINK_CLK_SRC 23 +#define DP_PIXEL_CLK_SRC 24 +#define ESC0_CLK_SRC 25 +#define ESC1_CLK_SRC 26 +#define JPEG0_CLK_SRC 27 +#define MCLK0_CLK_SRC 28 +#define MCLK1_CLK_SRC 29 +#define MCLK2_CLK_SRC 30 +#define MCLK3_CLK_SRC 31 +#define MDP_CLK_SRC 32 +#define MMPLL0_PLL 33 +#define MMPLL0_PLL_OUT_AUX 34 +#define MMPLL0_PLL_OUT_AUX2 35 +#define MMPLL0_PLL_OUT_EARLY 36 +#define MMPLL0_PLL_OUT_MAIN 37 +#define MMPLL0_PLL_OUT_TEST 38 +#define MMPLL10_PLL 39 +#define MMPLL10_PLL_OUT_AUX 40 +#define MMPLL10_PLL_OUT_AUX2 41 +#define MMPLL10_PLL_OUT_EARLY 42 +#define MMPLL10_PLL_OUT_MAIN 43 +#define MMPLL10_PLL_OUT_TEST 44 +#define MMPLL1_PLL 45 +#define MMPLL1_PLL_OUT_AUX 46 +#define MMPLL1_PLL_OUT_AUX2 47 +#define MMPLL1_PLL_OUT_EARLY 48 +#define MMPLL1_PLL_OUT_MAIN 49 +#define MMPLL1_PLL_OUT_TEST 50 +#define MMPLL3_PLL 51 +#define MMPLL3_PLL_OUT_AUX 52 +#define MMPLL3_PLL_OUT_AUX2 53 +#define MMPLL3_PLL_OUT_EARLY 54 +#define MMPLL3_PLL_OUT_MAIN 55 +#define MMPLL3_PLL_OUT_TEST 56 +#define MMPLL4_PLL 57 +#define MMPLL4_PLL_OUT_AUX 58 +#define MMPLL4_PLL_OUT_AUX2 59 +#define MMPLL4_PLL_OUT_EARLY 60 +#define MMPLL4_PLL_OUT_MAIN 61 +#define MMPLL4_PLL_OUT_TEST 62 +#define MMPLL5_PLL 63 +#define MMPLL5_PLL_OUT_AUX 64 +#define MMPLL5_PLL_OUT_AUX2 65 +#define MMPLL5_PLL_OUT_EARLY 66 +#define MMPLL5_PLL_OUT_MAIN 67 +#define MMPLL5_PLL_OUT_TEST 68 +#define MMPLL6_PLL 69 +#define MMPLL6_PLL_OUT_AUX 70 +#define MMPLL6_PLL_OUT_AUX2 71 +#define MMPLL6_PLL_OUT_EARLY 72 +#define MMPLL6_PLL_OUT_MAIN 73 +#define MMPLL6_PLL_OUT_TEST 74 +#define MMPLL7_PLL 75 +#define MMPLL7_PLL_OUT_AUX 76 +#define MMPLL7_PLL_OUT_AUX2 77 +#define MMPLL7_PLL_OUT_EARLY 78 +#define MMPLL7_PLL_OUT_MAIN 79 +#define MMPLL7_PLL_OUT_TEST 80 +#define MMPLL8_PLL 81 +#define MMPLL8_PLL_OUT_AUX 82 +#define MMPLL8_PLL_OUT_AUX2 83 +#define MMPLL8_PLL_OUT_EARLY 84 +#define MMPLL8_PLL_OUT_MAIN 85 +#define MMPLL8_PLL_OUT_TEST 86 +#define MMSS_BIMC_SMMU_AHB_CLK 87 +#define MMSS_BIMC_SMMU_AXI_CLK 88 +#define MMSS_CAMSS_AHB_CLK 89 +#define MMSS_CAMSS_CCI_AHB_CLK 90 +#define MMSS_CAMSS_CCI_CLK 91 +#define MMSS_CAMSS_CPHY_CSID0_CLK 92 +#define MMSS_CAMSS_CPHY_CSID1_CLK 93 +#define MMSS_CAMSS_CPHY_CSID2_CLK 94 +#define MMSS_CAMSS_CPHY_CSID3_CLK 95 +#define MMSS_CAMSS_CPP_AHB_CLK 96 +#define MMSS_CAMSS_CPP_AXI_CLK 97 +#define MMSS_CAMSS_CPP_CLK 98 +#define MMSS_CAMSS_CPP_VBIF_AHB_CLK 99 +#define MMSS_CAMSS_CSI0_AHB_CLK 100 +#define MMSS_CAMSS_CSI0_CLK 101 +#define MMSS_CAMSS_CSI0PHYTIMER_CLK 102 +#define MMSS_CAMSS_CSI0PIX_CLK 103 +#define MMSS_CAMSS_CSI0RDI_CLK 104 +#define MMSS_CAMSS_CSI1_AHB_CLK 105 +#define MMSS_CAMSS_CSI1_CLK 106 +#define MMSS_CAMSS_CSI1PHYTIMER_CLK 107 +#define MMSS_CAMSS_CSI1PIX_CLK 108 +#define MMSS_CAMSS_CSI1RDI_CLK 109 +#define MMSS_CAMSS_CSI2_AHB_CLK 110 +#define MMSS_CAMSS_CSI2_CLK 111 +#define MMSS_CAMSS_CSI2PHYTIMER_CLK 112 +#define MMSS_CAMSS_CSI2PIX_CLK 113 +#define MMSS_CAMSS_CSI2RDI_CLK 114 +#define MMSS_CAMSS_CSI3_AHB_CLK 115 +#define MMSS_CAMSS_CSI3_CLK 116 +#define MMSS_CAMSS_CSI3PIX_CLK 117 +#define MMSS_CAMSS_CSI3RDI_CLK 118 +#define MMSS_CAMSS_CSI_VFE0_CLK 119 +#define MMSS_CAMSS_CSI_VFE1_CLK 120 +#define MMSS_CAMSS_CSIPHY0_CLK 121 +#define MMSS_CAMSS_CSIPHY1_CLK 122 +#define MMSS_CAMSS_CSIPHY2_CLK 123 +#define MMSS_CAMSS_GP0_CLK 124 +#define MMSS_CAMSS_GP1_CLK 125 +#define MMSS_CAMSS_ISPIF_AHB_CLK 126 +#define MMSS_CAMSS_JPEG0_CLK 127 +#define MMSS_CAMSS_JPEG_AHB_CLK 128 +#define MMSS_CAMSS_JPEG_AXI_CLK 129 +#define MMSS_CAMSS_MCLK0_CLK 130 +#define MMSS_CAMSS_MCLK1_CLK 131 +#define MMSS_CAMSS_MCLK2_CLK 132 +#define MMSS_CAMSS_MCLK3_CLK 133 +#define MMSS_CAMSS_MICRO_AHB_CLK 134 +#define MMSS_CAMSS_TOP_AHB_CLK 135 +#define MMSS_CAMSS_VFE0_AHB_CLK 136 +#define MMSS_CAMSS_VFE0_CLK 137 +#define MMSS_CAMSS_VFE0_STREAM_CLK 138 +#define MMSS_CAMSS_VFE1_AHB_CLK 139 +#define MMSS_CAMSS_VFE1_CLK 140 +#define MMSS_CAMSS_VFE1_STREAM_CLK 141 +#define MMSS_CAMSS_VFE_VBIF_AHB_CLK 142 +#define MMSS_CAMSS_VFE_VBIF_AXI_CLK 143 +#define MMSS_CSIPHY_AHB2CRIF_CLK 144 +#define MMSS_CXO_CLK 145 +#define MMSS_MDSS_AHB_CLK 146 +#define MMSS_MDSS_AXI_CLK 147 +#define MMSS_MDSS_BYTE0_CLK 148 +#define MMSS_MDSS_BYTE0_INTF_CLK 149 +#define MMSS_MDSS_BYTE0_INTF_DIV_CLK 150 +#define MMSS_MDSS_BYTE1_CLK 151 +#define MMSS_MDSS_BYTE1_INTF_CLK 152 +#define MMSS_MDSS_DP_AUX_CLK 153 +#define MMSS_MDSS_DP_CRYPTO_CLK 154 +#define MMSS_MDSS_DP_GTC_CLK 155 +#define MMSS_MDSS_DP_LINK_CLK 156 +#define MMSS_MDSS_DP_LINK_INTF_CLK 157 +#define MMSS_MDSS_DP_PIXEL_CLK 158 +#define MMSS_MDSS_ESC0_CLK 159 +#define MMSS_MDSS_ESC1_CLK 160 +#define MMSS_MDSS_HDMI_DP_AHB_CLK 161 +#define MMSS_MDSS_MDP_CLK 162 +#define MMSS_MDSS_PCLK0_CLK 163 +#define MMSS_MDSS_PCLK1_CLK 164 +#define MMSS_MDSS_ROT_CLK 165 +#define MMSS_MDSS_VSYNC_CLK 166 +#define MMSS_MISC_AHB_CLK 167 +#define MMSS_MISC_CXO_CLK 168 +#define MMSS_MNOC_AHB_CLK 169 +#define MMSS_SNOC_DVM_AXI_CLK 170 +#define MMSS_THROTTLE_CAMSS_AHB_CLK 171 +#define MMSS_THROTTLE_CAMSS_AXI_CLK 172 +#define MMSS_THROTTLE_CAMSS_CXO_CLK 173 +#define MMSS_THROTTLE_MDSS_AHB_CLK 174 +#define MMSS_THROTTLE_MDSS_AXI_CLK 175 +#define MMSS_THROTTLE_MDSS_CXO_CLK 176 +#define MMSS_THROTTLE_VIDEO_AHB_CLK 177 +#define MMSS_THROTTLE_VIDEO_AXI_CLK 178 +#define MMSS_THROTTLE_VIDEO_CXO_CLK 179 +#define MMSS_VIDEO_AHB_CLK 180 +#define MMSS_VIDEO_AXI_CLK 181 +#define MMSS_VIDEO_CORE_CLK 182 +#define MMSS_VIDEO_SUBCORE0_CLK 183 +#define PCLK0_CLK_SRC 184 +#define PCLK1_CLK_SRC 185 +#define ROT_CLK_SRC 186 +#define VFE0_CLK_SRC 187 +#define VFE1_CLK_SRC 188 +#define VIDEO_CORE_CLK_SRC 189 +#define VSYNC_CLK_SRC 190 +#define MMSS_MDSS_BYTE1_INTF_DIV_CLK 191 + +#define BIMC_SMMU_GDSC 0 +#define CAMSS_CPP_GDSC 1 +#define CAMSS_TOP_GDSC 2 +#define CAMSS_VFE0_GDSC 3 +#define CAMSS_VFE1_GDSC 4 +#define MDSS_GDSC 5 +#define VIDEO_SUBCORE0_GDSC 6 +#define VIDEO_TOP_GDSC 7 + +#define CAMSS_MICRO_BCR 0 + +#endif diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h index bcaa1a552e8e..0f0c6300642c 100644 --- a/include/dt-bindings/clock/qcom,rpmcc.h +++ b/include/dt-bindings/clock/qcom,rpmcc.h @@ -128,5 +128,6 @@ #define CXO_PIL_SSC_CLK 83 #define CXO_PIL_CDSP_CLK 84 #define CNOC_PERIPH_KEEPALIVE_A_CLK 85 +#define MMSSNOC_A_CLK_CPU_VOTE 86 #endif diff --git a/include/dt-bindings/msm/msm-bus-ids.h b/include/dt-bindings/msm/msm-bus-ids.h index bfd774a99963..a75d304473d5 100644 --- a/include/dt-bindings/msm/msm-bus-ids.h +++ b/include/dt-bindings/msm/msm-bus-ids.h @@ -164,7 +164,8 @@ #define MSM_BUS_MASTER_MSS_CE 120 #define MSM_BUS_MASTER_CDSP_PROC 121 #define MSM_BUS_MASTER_GNOC_SNOC 122 -#define MSM_BUS_MASTER_MASTER_LAST 123 +#define MSM_BUS_MASTER_PIMEM 123 +#define MSM_BUS_MASTER_MASTER_LAST 124 #define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 1991aea2ec4c..3672893b275e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -920,7 +920,7 @@ static inline struct fwnode_handle *acpi_get_next_subnode(struct device *dev, return NULL; } -#define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable, validate, data, fn) \ +#define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable, valid, data, fn) \ static const void * __acpi_table_##name[] \ __attribute__((unused)) \ = { (void *) table_id, \ diff --git a/include/linux/backing-dev-defs.h b/include/linux/backing-dev-defs.h index 1b4d69f68c33..140c29635069 100644 --- a/include/linux/backing-dev-defs.h +++ b/include/linux/backing-dev-defs.h @@ -163,6 +163,7 @@ struct backing_dev_info { wait_queue_head_t wb_waitq; struct device *dev; + struct device *owner; struct timer_list laptop_mode_wb_timer; diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h index c82794f20110..89d3de3e096b 100644 --- a/include/linux/backing-dev.h +++ b/include/linux/backing-dev.h @@ -24,6 +24,7 @@ __printf(3, 4) int bdi_register(struct backing_dev_info *bdi, struct device *parent, const char *fmt, ...); int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev); +int bdi_register_owner(struct backing_dev_info *bdi, struct device *owner); void bdi_unregister(struct backing_dev_info *bdi); int __must_check bdi_setup_and_register(struct backing_dev_info *, char *); diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 3feb1b2d75d8..14cd6f77e284 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -156,6 +156,7 @@ struct bcma_host_ops { #define BCMA_CORE_DEFAULT 0xFFF #define BCMA_MAX_NR_CORES 16 +#define BCMA_CORE_SIZE 0x1000 /* Chip IDs of PCIe devices */ #define BCMA_CHIP_ID_BCM4313 0x4313 diff --git a/include/linux/bio.h b/include/linux/bio.h index fbe47bc700bd..42e4e3cbb001 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -527,11 +527,14 @@ extern unsigned int bvec_nr_vecs(unsigned short idx); int bio_associate_blkcg(struct bio *bio, struct cgroup_subsys_state *blkcg_css); int bio_associate_current(struct bio *bio); void bio_disassociate_task(struct bio *bio); +void bio_clone_blkcg_association(struct bio *dst, struct bio *src); #else /* CONFIG_BLK_CGROUP */ static inline int bio_associate_blkcg(struct bio *bio, struct cgroup_subsys_state *blkcg_css) { return 0; } static inline int bio_associate_current(struct bio *bio) { return -ENOENT; } static inline void bio_disassociate_task(struct bio *bio) { } +static inline void bio_clone_blkcg_association(struct bio *dst, + struct bio *src) { } #endif /* CONFIG_BLK_CGROUP */ #ifdef CONFIG_HIGHMEM diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 84af69b95026..ae64a897622c 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -197,6 +197,9 @@ struct request { /* for bidi */ struct request *next_rq; + + ktime_t lat_hist_io_start; + int lat_hist_enabled; }; static inline unsigned short req_get_ioprio(struct request *req) @@ -893,7 +896,7 @@ static inline unsigned int blk_rq_get_max_sectors(struct request *rq) { struct request_queue *q = rq->q; - if (unlikely(rq->cmd_type == REQ_TYPE_BLOCK_PC)) + if (unlikely(rq->cmd_type != REQ_TYPE_FS)) return q->limits.max_hw_sectors; if (!q->limits.chunk_sectors || (rq->cmd_flags & REQ_DISCARD)) @@ -1662,6 +1665,79 @@ extern int bdev_write_page(struct block_device *, sector_t, struct page *, struct writeback_control *); extern long bdev_direct_access(struct block_device *, sector_t, void __pmem **addr, unsigned long *pfn, long size); + +/* + * X-axis for IO latency histogram support. + */ +static const u_int64_t latency_x_axis_us[] = { + 100, + 200, + 300, + 400, + 500, + 600, + 700, + 800, + 900, + 1000, + 1200, + 1400, + 1600, + 1800, + 2000, + 2500, + 3000, + 4000, + 5000, + 6000, + 7000, + 9000, + 10000 +}; + +#define BLK_IO_LAT_HIST_DISABLE 0 +#define BLK_IO_LAT_HIST_ENABLE 1 +#define BLK_IO_LAT_HIST_ZERO 2 + +struct io_latency_state { + u_int64_t latency_y_axis_read[ARRAY_SIZE(latency_x_axis_us) + 1]; + u_int64_t latency_reads_elems; + u_int64_t latency_y_axis_write[ARRAY_SIZE(latency_x_axis_us) + 1]; + u_int64_t latency_writes_elems; +}; + +static inline void +blk_update_latency_hist(struct io_latency_state *s, + int read, + u_int64_t delta_us) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(latency_x_axis_us); i++) { + if (delta_us < (u_int64_t)latency_x_axis_us[i]) { + if (read) + s->latency_y_axis_read[i]++; + else + s->latency_y_axis_write[i]++; + break; + } + } + if (i == ARRAY_SIZE(latency_x_axis_us)) { + /* Overflowed the histogram */ + if (read) + s->latency_y_axis_read[i]++; + else + s->latency_y_axis_write[i]++; + } + if (read) + s->latency_reads_elems++; + else + s->latency_writes_elems++; +} + +void blk_zero_latency_hist(struct io_latency_state *s); +ssize_t blk_latency_hist_show(struct io_latency_state *s, char *buf); + #else /* CONFIG_BLOCK */ struct block_device; diff --git a/include/linux/capability.h b/include/linux/capability.h index af9f0b9e80e6..5f8249d378a2 100644 --- a/include/linux/capability.h +++ b/include/linux/capability.h @@ -214,6 +214,7 @@ extern bool has_ns_capability_noaudit(struct task_struct *t, struct user_namespace *ns, int cap); extern bool capable(int cap); extern bool ns_capable(struct user_namespace *ns, int cap); +extern bool ns_capable_noaudit(struct user_namespace *ns, int cap); #else static inline bool has_capability(struct task_struct *t, int cap) { @@ -241,6 +242,10 @@ static inline bool ns_capable(struct user_namespace *ns, int cap) { return true; } +static inline bool ns_capable_noaudit(struct user_namespace *ns, int cap) +{ + return true; +} #endif /* CONFIG_MULTIUSER */ extern bool capable_wrt_inode_uidgid(const struct inode *inode, int cap); extern bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap); diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 5cd588fa9f6a..f91991b97888 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -33,6 +33,10 @@ #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ #define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */ #define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */ +#define CLK_ENABLE_HAND_OFF BIT(12) /* enable clock when registered. + hand-off enable_count & prepare_count + to first consumer that enables clk */ +#define CLK_IS_MEASURE BIT(14) /* measure clock */ struct clk; struct clk_hw; diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index af746a212e88..fe865e627528 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -160,6 +160,7 @@ u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy); int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu); int cpufreq_update_policy(unsigned int cpu); bool have_governor_per_policy(void); +bool cpufreq_driver_is_slow(void); struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy); #else static inline unsigned int cpufreq_get(unsigned int cpu) @@ -317,6 +318,14 @@ struct cpufreq_driver { */ #define CPUFREQ_NEED_INITIAL_FREQ_CHECK (1 << 5) +/* + * Indicates that it is safe to call cpufreq_driver_target from + * non-interruptable context in scheduler hot paths. Drivers must + * opt-in to this flag, as the safe default is that they might sleep + * or be too slow for hot path use. + */ +#define CPUFREQ_DRIVER_FAST (1 << 6) + int cpufreq_register_driver(struct cpufreq_driver *driver_data); int cpufreq_unregister_driver(struct cpufreq_driver *driver_data); @@ -504,6 +513,9 @@ extern struct cpufreq_governor cpufreq_gov_conservative; #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE) extern struct cpufreq_governor cpufreq_gov_interactive; #define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_interactive) +#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED) +extern struct cpufreq_governor cpufreq_gov_sched; +#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_sched) #endif /********************************************************************* @@ -633,4 +645,8 @@ unsigned int cpufreq_generic_get(unsigned int cpu); int cpufreq_generic_init(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table, unsigned int transition_latency); + +struct sched_domain; +unsigned long cpufreq_scale_freq_capacity(struct sched_domain *sd, int cpu); +unsigned long cpufreq_scale_max_freq_capacity(int cpu); #endif /* _LINUX_CPUFREQ_H */ diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h index 786ad32631a6..6eae1576499e 100644 --- a/include/linux/cpuidle.h +++ b/include/linux/cpuidle.h @@ -204,7 +204,7 @@ static inline int cpuidle_enter_freeze(struct cpuidle_driver *drv, #endif /* kernel/sched/idle.c */ -extern void sched_idle_set_state(struct cpuidle_state *idle_state); +extern void sched_idle_set_state(struct cpuidle_state *idle_state, int index); extern void default_idle_call(void); #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED diff --git a/include/linux/devpts_fs.h b/include/linux/devpts_fs.h index e0ee0b3000b2..358a4db72a27 100644 --- a/include/linux/devpts_fs.h +++ b/include/linux/devpts_fs.h @@ -15,38 +15,24 @@ #include <linux/errno.h> +struct pts_fs_info; + #ifdef CONFIG_UNIX98_PTYS -int devpts_new_index(struct inode *ptmx_inode); -void devpts_kill_index(struct inode *ptmx_inode, int idx); -void devpts_add_ref(struct inode *ptmx_inode); -void devpts_del_ref(struct inode *ptmx_inode); +/* Look up a pts fs info and get a ref to it */ +struct pts_fs_info *devpts_get_ref(struct inode *, struct file *); +void devpts_put_ref(struct pts_fs_info *); + +int devpts_new_index(struct pts_fs_info *); +void devpts_kill_index(struct pts_fs_info *, int); + /* mknod in devpts */ -struct inode *devpts_pty_new(struct inode *ptmx_inode, dev_t device, int index, - void *priv); +struct inode *devpts_pty_new(struct pts_fs_info *, dev_t, int, void *); /* get private structure */ void *devpts_get_priv(struct inode *pts_inode); /* unlink */ void devpts_pty_kill(struct inode *inode); -#else - -/* Dummy stubs in the no-pty case */ -static inline int devpts_new_index(struct inode *ptmx_inode) { return -EINVAL; } -static inline void devpts_kill_index(struct inode *ptmx_inode, int idx) { } -static inline void devpts_add_ref(struct inode *ptmx_inode) { } -static inline void devpts_del_ref(struct inode *ptmx_inode) { } -static inline struct inode *devpts_pty_new(struct inode *ptmx_inode, - dev_t device, int index, void *priv) -{ - return ERR_PTR(-EINVAL); -} -static inline void *devpts_get_priv(struct inode *pts_inode) -{ - return NULL; -} -static inline void devpts_pty_kill(struct inode *inode) { } - #endif diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h index 9799594ce09d..4c86e4483e0d 100644 --- a/include/linux/dma-attrs.h +++ b/include/linux/dma-attrs.h @@ -22,6 +22,8 @@ enum dma_attr { DMA_ATTR_SKIP_ZEROING, DMA_ATTR_NO_DELAYED_UNMAP, DMA_ATTR_EXEC_MAPPING, + DMA_ATTR_FORCE_COHERENT, + DMA_ATTR_FORCE_NON_COHERENT, DMA_ATTR_MAX, }; diff --git a/include/linux/dma-mapping-fast.h b/include/linux/dma-mapping-fast.h index ddd126c0fd85..560f04736c1d 100644 --- a/include/linux/dma-mapping-fast.h +++ b/include/linux/dma-mapping-fast.h @@ -36,6 +36,8 @@ struct dma_fast_smmu_mapping { spinlock_t lock; struct notifier_block notifier; + + int is_smmu_pt_coherent; }; #ifdef CONFIG_IOMMU_IO_PGTABLE_FAST diff --git a/include/linux/fs.h b/include/linux/fs.h index cc2796b2486f..94edbb64f1c6 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -717,6 +717,31 @@ enum inode_i_mutex_lock_class I_MUTEX_PARENT2, }; +static inline void inode_lock(struct inode *inode) +{ + mutex_lock(&inode->i_mutex); +} + +static inline void inode_unlock(struct inode *inode) +{ + mutex_unlock(&inode->i_mutex); +} + +static inline int inode_trylock(struct inode *inode) +{ + return mutex_trylock(&inode->i_mutex); +} + +static inline int inode_is_locked(struct inode *inode) +{ + return mutex_is_locked(&inode->i_mutex); +} + +static inline void inode_lock_nested(struct inode *inode, unsigned subclass) +{ + mutex_lock_nested(&inode->i_mutex, subclass); +} + void lock_two_nondirectories(struct inode *, struct inode*); void unlock_two_nondirectories(struct inode *, struct inode*); @@ -3038,8 +3063,8 @@ static inline bool dir_emit_dots(struct file *file, struct dir_context *ctx) } static inline bool dir_relax(struct inode *inode) { - mutex_unlock(&inode->i_mutex); - mutex_lock(&inode->i_mutex); + inode_unlock(inode); + inode_lock(inode); return !IS_DEADDIR(inode); } diff --git a/include/linux/i8042.h b/include/linux/i8042.h index 0f9bafa17a02..d98780ca9604 100644 --- a/include/linux/i8042.h +++ b/include/linux/i8042.h @@ -62,7 +62,6 @@ struct serio; void i8042_lock_chip(void); void i8042_unlock_chip(void); int i8042_command(unsigned char *param, int command); -bool i8042_check_port_owner(const struct serio *); int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)); int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, @@ -83,11 +82,6 @@ static inline int i8042_command(unsigned char *param, int command) return -ENODEV; } -static inline bool i8042_check_port_owner(const struct serio *serio) -{ - return false; -} - static inline int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)) { diff --git a/include/linux/qpnp/power-on.h b/include/linux/input/qpnp-power-on.h index da8f5a8622dd..a2624ab57826 100644 --- a/include/linux/qpnp/power-on.h +++ b/include/linux/input/qpnp-power-on.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -60,7 +60,7 @@ enum pon_restart_reason { PON_RESTART_REASON_KEYS_CLEAR = 0x06, }; -#ifdef CONFIG_QPNP_POWER_ON +#ifdef CONFIG_INPUT_QPNP_POWER_ON int qpnp_pon_system_pwr_off(enum pon_power_off_type type); int qpnp_pon_is_warm_reset(void); int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index d33e10784b23..1b3f20e8fb74 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -134,6 +134,8 @@ enum iommu_attr { DOMAIN_ATTR_FAST, DOMAIN_ATTR_PGTBL_INFO, DOMAIN_ATTR_EARLY_MAP, + DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT, + DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT, DOMAIN_ATTR_MAX, }; @@ -237,6 +239,7 @@ struct iommu_ops { #endif unsigned long (*get_pgsize_bitmap)(struct iommu_domain *domain); + bool (*is_iova_coherent)(struct iommu_domain *domain, dma_addr_t iova); unsigned long pgsize_bitmap; void *priv; }; @@ -273,6 +276,8 @@ extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long io extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); extern phys_addr_t iommu_iova_to_phys_hard(struct iommu_domain *domain, dma_addr_t iova); +extern bool iommu_is_iova_coherent(struct iommu_domain *domain, + dma_addr_t iova); extern void iommu_set_fault_handler(struct iommu_domain *domain, iommu_fault_handler_t handler, void *token); extern void iommu_trigger_fault(struct iommu_domain *domain, @@ -505,6 +510,12 @@ static inline phys_addr_t iommu_iova_to_phys_hard(struct iommu_domain *domain, return 0; } +static inline bool iommu_is_iova_coherent(struct iommu_domain *domain, + dma_addr_t iova) +{ + return 0; +} + static inline void iommu_set_fault_handler(struct iommu_domain *domain, iommu_fault_handler_t handler, void *token) { diff --git a/include/linux/ipa.h b/include/linux/ipa.h index c3ffe51d8069..d545604cc22d 100644 --- a/include/linux/ipa.h +++ b/include/linux/ipa.h @@ -1066,6 +1066,12 @@ struct ipa_wdi_in_params { #endif }; +enum ipa_upstream_type { + IPA_UPSTEAM_MODEM = 1, + IPA_UPSTEAM_WLAN, + IPA_UPSTEAM_MAX +}; + /** * struct ipa_wdi_out_params - information provided to WDI client * @uc_door_bell_pa: physical address of IPA uc doorbell diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 2955e672391d..924853d33a13 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -830,8 +830,4 @@ static inline void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) { } /* OTHER_WRITABLE? Generally considered a bad idea. */ \ BUILD_BUG_ON_ZERO((perms) & 2) + \ (perms)) - -/* To identify board information in panic logs, set this */ -extern char *mach_panic_string; - #endif diff --git a/include/linux/leds.h b/include/linux/leds.h index bba189a62dfd..197b61500ab7 100644 --- a/include/linux/leds.h +++ b/include/linux/leds.h @@ -49,6 +49,7 @@ struct led_classdev { #define SET_BRIGHTNESS_ASYNC (1 << 21) #define SET_BRIGHTNESS_SYNC (1 << 22) #define LED_DEV_CAP_FLASH (1 << 23) +#define LED_KEEP_TRIGGER (1 << 24) /* Set LED brightness level */ /* Must not sleep, use a workqueue if needed */ diff --git a/include/linux/lightnvm.h b/include/linux/lightnvm.h index 034117b3be5f..f09648d14694 100644 --- a/include/linux/lightnvm.h +++ b/include/linux/lightnvm.h @@ -58,8 +58,9 @@ enum { /* Block Types */ NVM_BLK_T_FREE = 0x0, NVM_BLK_T_BAD = 0x1, - NVM_BLK_T_DEV = 0x2, - NVM_BLK_T_HOST = 0x4, + NVM_BLK_T_GRWN_BAD = 0x2, + NVM_BLK_T_DEV = 0x4, + NVM_BLK_T_HOST = 0x8, }; struct nvm_id_group { diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index cd0e2413c358..435fd8426b8a 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h @@ -174,6 +174,11 @@ struct mem_cgroup_thresholds { struct mem_cgroup_threshold_ary *spare; }; +struct mem_cgroup_id { + int id; + atomic_t ref; +}; + /* * The memory controller data structure. The memory controller controls both * page cache and RSS per cgroup. We would eventually like to provide @@ -183,6 +188,9 @@ struct mem_cgroup_thresholds { struct mem_cgroup { struct cgroup_subsys_state css; + /* Private memcg ID. Used to ID objects that outlive the cgroup */ + struct mem_cgroup_id id; + /* Accounted resources */ struct page_counter memory; struct page_counter memsw; diff --git a/include/linux/memory-state-time.h b/include/linux/memory-state-time.h new file mode 100644 index 000000000000..d2212b027866 --- /dev/null +++ b/include/linux/memory-state-time.h @@ -0,0 +1,42 @@ +/* include/linux/memory-state-time.h + * + * Copyright (C) 2016 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/workqueue.h> + +#define UPDATE_MEMORY_STATE(BLOCK, VALUE) BLOCK->update_call(BLOCK, VALUE) + +struct memory_state_update_block; + +typedef void (*memory_state_update_fn_t)(struct memory_state_update_block *ub, + int value); + +/* This struct is populated when you pass it to a memory_state_register* + * function. The update_call function is used for an update and defined in the + * typedef memory_state_update_fn_t + */ +struct memory_state_update_block { + memory_state_update_fn_t update_call; + int id; +}; + +/* Register a frequency struct memory_state_update_block to provide updates to + * memory_state_time about frequency changes using its update_call function. + */ +struct memory_state_update_block *memory_state_register_frequency_source(void); + +/* Register a bandwidth struct memory_state_update_block to provide updates to + * memory_state_time about bandwidth changes using its update_call function. + */ +struct memory_state_update_block *memory_state_register_bandwidth_source(void); diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h index 494682ce4bf3..3ab3cede28ea 100644 --- a/include/linux/mfd/cros_ec.h +++ b/include/linux/mfd/cros_ec.h @@ -224,6 +224,21 @@ int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); /** + * cros_ec_cmd_xfer_status - Send a command to the ChromeOS EC + * + * This function is identical to cros_ec_cmd_xfer, except it returns success + * status only if both the command was transmitted successfully and the EC + * replied with success status. It's not necessary to check msg->result when + * using this function. + * + * @ec_dev: EC device + * @msg: Message to write + * @return: Num. of bytes transferred on success, <0 on failure + */ +int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg); + +/** * cros_ec_remove - Remove a ChromeOS EC * * Call this to deregister a ChromeOS EC, then clean up any private data. diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h index f079fb1a31f7..a8786d27ab81 100644 --- a/include/linux/mlx5/qp.h +++ b/include/linux/mlx5/qp.h @@ -160,6 +160,7 @@ enum { enum { MLX5_FENCE_MODE_NONE = 0 << 5, MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5, + MLX5_FENCE_MODE_FENCE = 2 << 5, MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5, MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5, }; @@ -534,9 +535,9 @@ struct mlx5_destroy_qp_mbox_out { struct mlx5_modify_qp_mbox_in { struct mlx5_inbox_hdr hdr; __be32 qpn; - u8 rsvd1[4]; - __be32 optparam; u8 rsvd0[4]; + __be32 optparam; + u8 rsvd1[4]; struct mlx5_qp_context ctx; }; diff --git a/include/linux/mm.h b/include/linux/mm.h index 0c4178e5b656..97b11c9fd48a 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -1324,8 +1324,7 @@ static inline int stack_guard_page_end(struct vm_area_struct *vma, !vma_growsup(vma->vm_next, addr); } -extern struct task_struct *task_of_stack(struct task_struct *task, - struct vm_area_struct *vma, bool in_group); +int vma_is_stack_for_task(struct vm_area_struct *vma, struct task_struct *t); extern unsigned long move_page_tables(struct vm_area_struct *vma, unsigned long old_addr, struct vm_area_struct *new_vma, diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index 89efaa67cc59..a5a3bb286361 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h @@ -110,6 +110,8 @@ struct mmc_request { struct mmc_host *host; struct mmc_cmdq_req *cmdq_req; struct request *req; + ktime_t io_start; + int lat_hist_enabled; }; struct mmc_bus_ops { diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 5cfed430b8d4..276dbf19805b 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -17,6 +17,7 @@ #include <linux/device.h> #include <linux/devfreq.h> #include <linux/fault-inject.h> +#include <linux/blkdev.h> #include <linux/mmc/core.h> #include <linux/mmc/card.h> @@ -553,7 +554,6 @@ struct mmc_host { int num_funcs; } embedded_sdio_data; #endif - /* * Set to 1 to just stop the SDCLK to the card without * actually disabling the clock from it's source. @@ -585,6 +585,11 @@ struct mmc_host { */ void *cmdq_private; struct mmc_request *err_mrq; +#ifdef CONFIG_BLOCK + int latency_hist_enabled; + struct io_latency_state io_lat_s; +#endif + unsigned long private[0] ____cacheline_aligned; }; diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index ad4c3f186f61..ddb3b927de39 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -75,10 +75,12 @@ extern int *get_migratetype_fallbacks(int mtype); bool is_cma_pageblock(struct page *page); # define is_migrate_cma(migratetype) unlikely((migratetype) == MIGRATE_CMA) # define get_cma_migrate_type() MIGRATE_CMA +# define is_migrate_cma_page(_page) (get_pageblock_migratetype(_page) == MIGRATE_CMA) #else # define is_cma_pageblock(page) false # define is_migrate_cma(migratetype) false # define get_cma_migrate_type() MIGRATE_MOVABLE +# define is_migrate_cma_page(_page) false #endif #define for_each_migratetype_order(order, type) \ diff --git a/include/linux/msi.h b/include/linux/msi.h index f71a25e5fd25..f0f43ec45ee7 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -254,12 +254,12 @@ enum { * callbacks. */ MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), - /* Build identity map between hwirq and irq */ - MSI_FLAG_IDENTITY_MAP = (1 << 2), /* Support multiple PCI MSI interrupts */ - MSI_FLAG_MULTI_PCI_MSI = (1 << 3), + MSI_FLAG_MULTI_PCI_MSI = (1 << 2), /* Support PCI MSIX interrupts */ - MSI_FLAG_PCI_MSIX = (1 << 4), + MSI_FLAG_PCI_MSIX = (1 << 3), + /* Needs early activate, required for PCI */ + MSI_FLAG_ACTIVATE_EARLY = (1 << 4), }; int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, diff --git a/include/linux/msm_ext_display.h b/include/linux/msm_ext_display.h index 59ba776b5f9b..b3a7e4ad722a 100644 --- a/include/linux/msm_ext_display.h +++ b/include/linux/msm_ext_display.h @@ -22,6 +22,15 @@ #define AUDIO_ACK_CONNECT BIT(0) /** + * Flags to be used with the HPD operation of the external display + * interface: + * MSM_EXT_DISP_HPD_NO_AUDIO: audio will not be routed to external display + * MSM_EXT_DISP_HPD_NO_VIDEO: video will not be routed to external display + */ +#define MSM_EXT_DISP_HPD_NO_AUDIO BIT(0) +#define MSM_EXT_DISP_HPD_NO_VIDEO BIT(1) + +/** * struct ext_disp_cable_notify - cable notify handler structure * @link: a link for the linked list * @status: current status of HDMI/DP cable connection @@ -87,7 +96,8 @@ enum msm_ext_disp_power_state { struct msm_ext_disp_intf_ops { int (*hpd)(struct platform_device *pdev, enum msm_ext_disp_type type, - enum msm_ext_disp_cable_state state); + enum msm_ext_disp_cable_state state, + u32 flags); int (*notify)(struct platform_device *pdev, enum msm_ext_disp_cable_state state); int (*ack)(struct platform_device *pdev, diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index d9ba49cedc5d..37f05cb1dfd6 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2495,6 +2495,13 @@ #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700 #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff +#define PCI_VENDOR_ID_NETRONOME 0x19ee +#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200 +#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240 +#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000 +#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000 +#define PCI_DEVICE_ID_NETRONOME_NFP6000_VF 0x6003 + #define PCI_VENDOR_ID_QMI 0x1a32 #define PCI_VENDOR_ID_AZWAVE 0x1a3b diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 12d3415a3ef5..f501b8c0de4e 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -121,6 +121,7 @@ struct hw_perf_event { struct { /* intel_cqm */ int cqm_state; u32 cqm_rmid; + int is_group_event; struct list_head cqm_events_entry; struct list_head cqm_groups_entry; struct list_head cqm_group_entry; @@ -476,6 +477,12 @@ struct perf_event { int nr_siblings; int group_flags; struct perf_event *group_leader; + + /* + * Protect the pmu, attributes and context of a group leader. + * Note: does not protect the pointer to the group_leader. + */ + struct mutex group_leader_mutex; struct pmu *pmu; enum perf_event_active_state state; diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index 125568f7862c..de35fe9441fe 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -226,6 +226,9 @@ enum power_supply_property { POWER_SUPPLY_PROP_PARALLEL_DISABLE, POWER_SUPPLY_PROP_PARALLEL_PERCENT, POWER_SUPPLY_PROP_PE_START, + POWER_SUPPLY_PROP_SET_SHIP_MODE, + POWER_SUPPLY_PROP_SOC_REPORTING_READY, + POWER_SUPPLY_PROP_DEBUG_BATTERY, /* Local extensions of type int64_t */ POWER_SUPPLY_PROP_CHARGE_COUNTER_EXT, /* Properties of type `const char *' */ diff --git a/include/linux/pstore.h b/include/linux/pstore.h index 831479f8df8f..5cae2c6c90ad 100644 --- a/include/linux/pstore.h +++ b/include/linux/pstore.h @@ -22,12 +22,13 @@ #ifndef _LINUX_PSTORE_H #define _LINUX_PSTORE_H -#include <linux/time.h> +#include <linux/compiler.h> +#include <linux/errno.h> #include <linux/kmsg_dump.h> #include <linux/mutex.h> -#include <linux/types.h> #include <linux/spinlock.h> -#include <linux/errno.h> +#include <linux/time.h> +#include <linux/types.h> /* types */ enum pstore_type_id { @@ -67,6 +68,10 @@ struct pstore_info { enum kmsg_dump_reason reason, u64 *id, unsigned int part, const char *buf, bool compressed, size_t size, struct pstore_info *psi); + int (*write_buf_user)(enum pstore_type_id type, + enum kmsg_dump_reason reason, u64 *id, + unsigned int part, const char __user *buf, + bool compressed, size_t size, struct pstore_info *psi); int (*erase)(enum pstore_type_id type, u64 id, int count, struct timespec time, struct pstore_info *psi); diff --git a/include/linux/pstore_ram.h b/include/linux/pstore_ram.h index 712757f320a4..45ac5a0d29ee 100644 --- a/include/linux/pstore_ram.h +++ b/include/linux/pstore_ram.h @@ -17,11 +17,12 @@ #ifndef __LINUX_PSTORE_RAM_H__ #define __LINUX_PSTORE_RAM_H__ +#include <linux/compiler.h> #include <linux/device.h> +#include <linux/init.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/types.h> -#include <linux/init.h> struct persistent_ram_buffer; struct rs_control; @@ -59,7 +60,9 @@ void persistent_ram_free(struct persistent_ram_zone *prz); void persistent_ram_zap(struct persistent_ram_zone *prz); int persistent_ram_write(struct persistent_ram_zone *prz, const void *s, - unsigned int count); + unsigned int count); +int persistent_ram_write_user(struct persistent_ram_zone *prz, + const void __user *s, unsigned int count); void persistent_ram_save_old(struct persistent_ram_zone *prz); size_t persistent_ram_old_size(struct persistent_ram_zone *prz); diff --git a/include/linux/qpnp/qpnp-revid.h b/include/linux/qpnp/qpnp-revid.h index 8d9bbfd67992..4023e3a683d3 100644 --- a/include/linux/qpnp/qpnp-revid.h +++ b/include/linux/qpnp/qpnp-revid.h @@ -177,9 +177,9 @@ /* PMI8998 */ #define PMI8998_SUBTYPE 0x15 -/* PMFALCON */ -#define PM2FALCON_SUBTYPE 0x1A -#define PMFALCON_SUBTYPE 0x1B +/* PM660 */ +#define PM660L_SUBTYPE 0x1A +#define PM660_SUBTYPE 0x1B #define PMI8998_V1P0_REV1 0x00 #define PMI8998_V1P0_REV2 0x00 diff --git a/include/linux/regulator/kryo-regulator.h b/include/linux/regulator/msm-ldo-regulator.h index ab51f8629d2d..ad04e294cfe6 100644 --- a/include/linux/regulator/kryo-regulator.h +++ b/include/linux/regulator/msm-ldo-regulator.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -11,22 +11,22 @@ * GNU General Public License for more details. */ -#ifndef __KRYO_REGULATOR_H__ -#define __KRYO_REGULATOR_H__ +#ifndef __MSM_LDO_REGULATOR_H__ +#define __MSM_LDO_REGULATOR_H__ /** - * enum kryo_supply_mode - supported operating modes by this regulator type. + * enum msm_ldo_supply_mode - supported operating modes by this regulator type. * Use negative logic to ensure BHS mode is treated as the safe default by the * the regulator framework. This is necessary since LDO mode can only be enabled * when several constraints are satisfied. Consumers of this regulator are * expected to request changes in operating modes through the use of - * regulator_allow_bypass() passing in the desired Kryo supply mode. + * regulator_allow_bypass() passing in the desired LDO supply mode. * %BHS_MODE: to select BHS as operating mode * %LDO_MODE: to select LDO as operating mode */ -enum kryo_supply_mode { +enum msm_ldo_supply_mode { BHS_MODE = false, LDO_MODE = true, }; -#endif /* __KRYO_REGULATOR_H__ */ +#endif /* __MSM_LDO_REGULATOR_H__ */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 9c3be2d56ac5..0d1d21e9f081 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -173,6 +173,9 @@ extern bool single_task_running(void); extern unsigned long nr_iowait(void); extern unsigned long nr_iowait_cpu(int cpu); extern void get_iowait_load(unsigned long *nr_waiters, unsigned long *load); +#ifdef CONFIG_CPU_QUIET +extern u64 nr_running_integral(unsigned int cpu); +#endif extern void sched_update_nr_prod(int cpu, long delta, bool inc); extern void sched_get_nr_running_avg(int *avg, int *iowait_avg, int *big_avg); @@ -1007,6 +1010,14 @@ enum cpu_idle_type { #define SCHED_CAPACITY_SHIFT 10 #define SCHED_CAPACITY_SCALE (1L << SCHED_CAPACITY_SHIFT) +struct sched_capacity_reqs { + unsigned long cfs; + unsigned long rt; + unsigned long dl; + + unsigned long total; +}; + /* * Wake-queues are lists of tasks with a pending wakeup, whose * callers have already marked the task as woken internally, @@ -1069,6 +1080,7 @@ extern void wake_up_q(struct wake_q_head *head); #define SD_PREFER_SIBLING 0x1000 /* Prefer to place tasks in a sibling domain */ #define SD_OVERLAP 0x2000 /* sched_domains of this level overlap */ #define SD_NUMA 0x4000 /* cross-node balancing */ +#define SD_SHARE_CAP_STATES 0x8000 /* Domain members share capacity state */ #ifdef CONFIG_SCHED_SMT static inline int cpu_smt_flags(void) @@ -1101,6 +1113,24 @@ struct sched_domain_attr { extern int sched_domain_level_max; +struct capacity_state { + unsigned long cap; /* compute capacity */ + unsigned long power; /* power consumption at this compute capacity */ +}; + +struct idle_state { + unsigned long power; /* power consumption in this idle state */ +}; + +struct sched_group_energy { + unsigned int nr_idle_states; /* number of idle states */ + struct idle_state *idle_states; /* ptr to idle state array */ + unsigned int nr_cap_states; /* number of capacity states */ + struct capacity_state *cap_states; /* ptr to capacity state array */ +}; + +unsigned long capacity_curr_of(int cpu); + struct sched_group; struct sched_domain { @@ -1199,6 +1229,8 @@ bool cpus_share_cache(int this_cpu, int that_cpu); typedef const struct cpumask *(*sched_domain_mask_f)(int cpu); typedef int (*sched_domain_flags_f)(void); +typedef +const struct sched_group_energy * const(*sched_domain_energy_f)(int cpu); #define SDTL_OVERLAP 0x01 @@ -1211,6 +1243,7 @@ struct sd_data { struct sched_domain_topology_level { sched_domain_mask_f mask; sched_domain_flags_f sd_flags; + sched_domain_energy_f energy; int flags; int numa_level; struct sd_data data; @@ -1362,6 +1395,7 @@ struct ravg { u32 sum_history[RAVG_HIST_SIZE_MAX]; u32 *curr_window_cpu, *prev_window_cpu; u32 curr_window, prev_window; + u64 curr_burst, avg_burst, avg_sleep_time; u16 active_windows; u32 pred_demand; u8 busy_buckets[NUM_BUSY_BUCKETS]; @@ -2417,6 +2451,8 @@ extern int sched_set_static_cpu_pwr_cost(int cpu, unsigned int cost); extern unsigned int sched_get_static_cpu_pwr_cost(int cpu); extern int sched_set_static_cluster_pwr_cost(int cpu, unsigned int cost); extern unsigned int sched_get_static_cluster_pwr_cost(int cpu); +extern int sched_set_cluster_wake_idle(int cpu, unsigned int wake_idle); +extern unsigned int sched_get_cluster_wake_idle(int cpu); extern int sched_update_freq_max_load(const cpumask_t *cpumask); extern void sched_update_cpu_freq_min_max(const cpumask_t *cpus, u32 fmin, u32 fmax); diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h index 5d0899df64ff..418eb97110a3 100644 --- a/include/linux/sched/sysctl.h +++ b/include/linux/sched/sysctl.h @@ -39,7 +39,10 @@ extern unsigned int sysctl_sched_latency; extern unsigned int sysctl_sched_min_granularity; extern unsigned int sysctl_sched_wakeup_granularity; extern unsigned int sysctl_sched_child_runs_first; -extern unsigned int sysctl_sched_wake_to_idle; +extern unsigned int sysctl_sched_is_big_little; +extern unsigned int sysctl_sched_sync_hint_enable; +extern unsigned int sysctl_sched_initial_task_util; +extern unsigned int sysctl_sched_cstate_aware; #ifdef CONFIG_SCHED_HMP extern int sysctl_sched_freq_inc_notify; @@ -60,7 +63,6 @@ extern unsigned int sysctl_sched_boost; extern unsigned int sysctl_sched_small_wakee_task_load_pct; extern unsigned int sysctl_sched_big_waker_task_load_pct; extern unsigned int sysctl_sched_select_prev_cpu_us; -extern unsigned int sysctl_sched_enable_colocation; extern unsigned int sysctl_sched_restrict_cluster_spill; extern unsigned int sysctl_sched_new_task_windows; extern unsigned int sysctl_sched_pred_alert_freq; @@ -68,6 +70,8 @@ extern unsigned int sysctl_sched_freq_aggregate; extern unsigned int sysctl_sched_enable_thread_grouping; extern unsigned int sysctl_sched_freq_aggregate_threshold_pct; extern unsigned int sysctl_sched_prefer_sync_wakee_to_waker; +extern unsigned int sysctl_sched_short_burst; +extern unsigned int sysctl_sched_short_sleep; #else /* CONFIG_SCHED_HMP */ diff --git a/include/linux/sched_energy.h b/include/linux/sched_energy.h new file mode 100644 index 000000000000..a1057e481eff --- /dev/null +++ b/include/linux/sched_energy.h @@ -0,0 +1,46 @@ +#ifndef _LINUX_SCHED_ENERGY_H +#define _LINUX_SCHED_ENERGY_H + +#include <linux/sched.h> +#include <linux/slab.h> + +/* + * There doesn't seem to be an NR_CPUS style max number of sched domain + * levels so here's an arbitrary constant one for the moment. + * + * The levels alluded to here correspond to entries in struct + * sched_domain_topology_level that are meant to be populated by arch + * specific code (topology.c). + */ +#define NR_SD_LEVELS 8 + +#define SD_LEVEL0 0 +#define SD_LEVEL1 1 +#define SD_LEVEL2 2 +#define SD_LEVEL3 3 +#define SD_LEVEL4 4 +#define SD_LEVEL5 5 +#define SD_LEVEL6 6 +#define SD_LEVEL7 7 + +/* + * Convenience macro for iterating through said sd levels. + */ +#define for_each_possible_sd_level(level) \ + for (level = 0; level < NR_SD_LEVELS; level++) + +extern bool sched_energy_aware; + +#ifdef CONFIG_SMP + +extern struct sched_group_energy *sge_array[NR_CPUS][NR_SD_LEVELS]; + +void init_sched_energy_costs(void); + +#else + +#define init_sched_energy_costs() do { } while (0) + +#endif /* CONFIG_SMP */ + +#endif diff --git a/include/linux/security.h b/include/linux/security.h index e3b5efc0eb4b..7caf520e6233 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -292,7 +292,6 @@ int security_file_send_sigiotask(struct task_struct *tsk, struct fown_struct *fown, int sig); int security_file_receive(struct file *file); int security_file_open(struct file *file, const struct cred *cred); -int security_file_close(struct file *file); int security_task_create(unsigned long clone_flags); void security_task_free(struct task_struct *task); int security_cred_alloc_blank(struct cred *cred, gfp_t gfp); @@ -820,11 +819,6 @@ static inline int security_file_open(struct file *file, return 0; } -static inline int security_file_close(struct file *file) -{ - return 0; -} - static inline int security_task_create(unsigned long clone_flags) { return 0; diff --git a/include/linux/serio.h b/include/linux/serio.h index df4ab5de1586..c733cff44e18 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -31,7 +31,8 @@ struct serio { struct serio_device_id id; - spinlock_t lock; /* protects critical sections from port's interrupt handler */ + /* Protects critical sections from port's interrupt handler */ + spinlock_t lock; int (*write)(struct serio *, unsigned char); int (*open)(struct serio *); @@ -40,16 +41,29 @@ struct serio { void (*stop)(struct serio *); struct serio *parent; - struct list_head child_node; /* Entry in parent->children list */ + /* Entry in parent->children list */ + struct list_head child_node; struct list_head children; - unsigned int depth; /* level of nesting in serio hierarchy */ + /* Level of nesting in serio hierarchy */ + unsigned int depth; - struct serio_driver *drv; /* accessed from interrupt, must be protected by serio->lock and serio->sem */ - struct mutex drv_mutex; /* protects serio->drv so attributes can pin driver */ + /* + * serio->drv is accessed from interrupt handlers; when modifying + * caller should acquire serio->drv_mutex and serio->lock. + */ + struct serio_driver *drv; + /* Protects serio->drv so attributes can pin current driver */ + struct mutex drv_mutex; struct device dev; struct list_head node; + + /* + * For use by PS/2 layer when several ports share hardware and + * may get indigestion when exposed to concurrent access (i8042). + */ + struct mutex *ps2_cmd_mutex; }; #define to_serio_port(d) container_of(d, struct serio, dev) diff --git a/include/linux/slab.h b/include/linux/slab.h index 2037a861e367..4ef384b172e0 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -144,6 +144,18 @@ void kfree(const void *); void kzfree(const void *); size_t ksize(const void *); +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR +const char *__check_heap_object(const void *ptr, unsigned long n, + struct page *page); +#else +static inline const char *__check_heap_object(const void *ptr, + unsigned long n, + struct page *page) +{ + return NULL; +} +#endif + /* * Some archs want to perform DMA into kmalloc caches and need a guaranteed * alignment larger than the alignment of a 64-bit integer. diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h index 33885118523c..f4e857e920cd 100644 --- a/include/linux/slub_def.h +++ b/include/linux/slub_def.h @@ -81,6 +81,7 @@ struct kmem_cache { int reserved; /* Reserved bytes at the end of slabs */ const char *name; /* Name (only for display!) */ struct list_head list; /* List of slab caches */ + int red_left_pad; /* Left redzone padding size */ #ifdef CONFIG_SYSFS struct kobject kobj; /* For sysfs */ #endif diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h index ff307b548ed3..4cf89517783a 100644 --- a/include/linux/thread_info.h +++ b/include/linux/thread_info.h @@ -145,6 +145,31 @@ static inline bool test_and_clear_restore_sigmask(void) #error "no set_restore_sigmask() provided and default one won't work" #endif +#ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES +static inline int arch_within_stack_frames(const void * const stack, + const void * const stackend, + const void *obj, unsigned long len) +{ + return 0; +} +#endif + +#ifdef CONFIG_HARDENED_USERCOPY +extern void __check_object_size(const void *ptr, unsigned long n, + bool to_user); + +static __always_inline void check_object_size(const void *ptr, unsigned long n, + bool to_user) +{ + if (!__builtin_constant_p(n)) + __check_object_size(ptr, n, to_user); +} +#else +static inline void check_object_size(const void *ptr, unsigned long n, + bool to_user) +{ } +#endif /* CONFIG_HARDENED_USERCOPY */ + #endif /* __KERNEL__ */ #endif /* _LINUX_THREAD_INFO_H */ diff --git a/include/linux/time.h b/include/linux/time.h index beebe3a02d43..297f09f23896 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -125,6 +125,32 @@ static inline bool timeval_valid(const struct timeval *tv) extern struct timespec timespec_trunc(struct timespec t, unsigned gran); +/* + * Validates if a timespec/timeval used to inject a time offset is valid. + * Offsets can be postive or negative. The value of the timeval/timespec + * is the sum of its fields, but *NOTE*: the field tv_usec/tv_nsec must + * always be non-negative. + */ +static inline bool timeval_inject_offset_valid(const struct timeval *tv) +{ + /* We don't check the tv_sec as it can be positive or negative */ + + /* Can't have more microseconds then a second */ + if (tv->tv_usec < 0 || tv->tv_usec >= USEC_PER_SEC) + return false; + return true; +} + +static inline bool timespec_inject_offset_valid(const struct timespec *ts) +{ + /* We don't check the tv_sec as it can be positive or negative */ + + /* Can't have more nanoseconds then a second */ + if (ts->tv_nsec < 0 || ts->tv_nsec >= NSEC_PER_SEC) + return false; + return true; +} + #define CURRENT_TIME (current_kernel_time()) #define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 }) diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h index 558129af828a..f30c187ed785 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -111,4 +111,11 @@ extern long strncpy_from_unsafe(char *dst, const void *unsafe_addr, long count); #define probe_kernel_address(addr, retval) \ probe_kernel_read(&retval, addr, sizeof(retval)) +#ifndef user_access_begin +#define user_access_begin() do { } while (0) +#define user_access_end() do { } while (0) +#define unsafe_get_user(x, ptr, err) do { if (unlikely(__get_user(x, ptr))) goto err; } while (0) +#define unsafe_put_user(x, ptr, err) do { if (unlikely(__put_user(x, ptr))) goto err; } while (0) +#endif + #endif /* __LINUX_UACCESS_H__ */ diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h index 1eb442f8dc6c..21fddf0cbf09 100644 --- a/include/linux/usb/msm_hsusb.h +++ b/include/linux/usb/msm_hsusb.h @@ -296,8 +296,7 @@ static inline void msm_usb_irq_disable(bool disable) #endif #ifdef CONFIG_USB_DWC3_QCOM -int msm_ep_config(struct usb_ep *ep, struct usb_request *request, - gfp_t gfp_flags); +int msm_ep_config(struct usb_ep *ep, struct usb_request *request); int msm_ep_unconfig(struct usb_ep *ep); void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable); int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr, u32 size, @@ -312,8 +311,7 @@ static inline int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr, return -ENODEV; } -static inline int msm_ep_config(struct usb_ep *ep, struct usb_request *request, - gfp_t gfp_flags) +static inline int msm_ep_config(struct usb_ep *ep, struct usb_request *request) { return -ENODEV; } diff --git a/include/media/msm_vidc.h b/include/media/msm_vidc.h index 0a089c4faee1..003adc38eb14 100644 --- a/include/media/msm_vidc.h +++ b/include/media/msm_vidc.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -68,6 +68,7 @@ struct msm_smem { void *smem_priv; enum hal_buffer buffer_type; struct dma_mapping_info mapping_info; + unsigned int offset; }; enum smem_cache_ops { diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index cc1e8d6b3454..94ace231b3bd 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h @@ -67,6 +67,8 @@ struct wiphy; #define CFG80211_CONNECT_PREV_BSSID 1 #define CFG80211_CONNECT_BSS 1 #define CFG80211_ABORT_SCAN 1 +#define CFG80211_UPDATE_CONNECT_PARAMS 1 +#define CFG80211_BEACON_TX_RATE_CUSTOM_BACKPORT 1 /* * wireless hardware capability structures @@ -731,7 +733,7 @@ struct cfg80211_bitrate_mask { * MAC address based access control * @pbss: If set, start as a PCP instead of AP. Relevant for DMG * networks. - * @beacon_rate: masks for setting user configured beacon tx rate. + * @beacon_rate: bitrate to be used for beacons */ struct cfg80211_ap_settings { struct cfg80211_chan_def chandef; @@ -1393,6 +1395,7 @@ struct mesh_config { * @beacon_interval: beacon interval to use * @mcast_rate: multicat rate for Mesh Node [6Mbps is the default for 802.11a] * @basic_rates: basic rates to use when creating the mesh + * @beacon_rate: bitrate to be used for beacons * * These parameters are fixed when the mesh is created. */ @@ -1413,6 +1416,7 @@ struct mesh_setup { u16 beacon_interval; int mcast_rate[IEEE80211_NUM_BANDS]; u32 basic_rates; + struct cfg80211_bitrate_mask beacon_rate; }; /** @@ -1966,6 +1970,18 @@ struct cfg80211_connect_params { }; /** + * enum cfg80211_connect_params_changed - Connection parameters being updated + * + * This enum provides information of all connect parameters that + * have to be updated as part of update_connect_params() call. + * + * @UPDATE_ASSOC_IES: Indicates whether association request IEs are updated + */ +enum cfg80211_connect_params_changed { + UPDATE_ASSOC_IES = BIT(0), +}; + +/** * enum wiphy_params_flags - set_wiphy_params bitfield values * @WIPHY_PARAM_RETRY_SHORT: wiphy->retry_short has changed * @WIPHY_PARAM_RETRY_LONG: wiphy->retry_long has changed @@ -2380,6 +2396,14 @@ struct cfg80211_qos_map { * If the connection fails for some reason, call cfg80211_connect_result() * with the status from the AP. * (invoked with the wireless_dev mutex held) + * @update_connect_params: Update the connect parameters while connected to a + * BSS. The updated parameters can be used by driver/firmware for + * subsequent BSS selection (roaming) decisions and to form the + * Authentication/(Re)Association Request frames. This call does not + * request an immediate disassociation or reassociation with the current + * BSS, i.e., this impacts only subsequent (re)associations. The bits in + * changed are defined in &enum cfg80211_connect_params_changed. + * (invoked with the wireless_dev mutex held) * @disconnect: Disconnect from the BSS/ESS. * (invoked with the wireless_dev mutex held) * @@ -2650,6 +2674,10 @@ struct cfg80211_ops { int (*connect)(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_connect_params *sme); + int (*update_connect_params)(struct wiphy *wiphy, + struct net_device *dev, + struct cfg80211_connect_params *sme, + u32 changed); int (*disconnect)(struct wiphy *wiphy, struct net_device *dev, u16 reason_code); diff --git a/include/net/fib_rules.h b/include/net/fib_rules.h index 55b5419cb6a7..bdd985f41022 100644 --- a/include/net/fib_rules.h +++ b/include/net/fib_rules.h @@ -89,7 +89,6 @@ struct fib_rules_ops { [FRA_FWMARK] = { .type = NLA_U32 }, \ [FRA_FWMASK] = { .type = NLA_U32 }, \ [FRA_TABLE] = { .type = NLA_U32 }, \ - [FRA_GOTO] = { .type = NLA_U32 }, \ [FRA_UID_START] = { .type = NLA_U32 }, \ [FRA_UID_END] = { .type = NLA_U32 }, \ [FRA_SUPPRESS_PREFIXLEN] = { .type = NLA_U32 }, \ diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 760bc4d5a2cf..ee5270f984ba 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -1014,6 +1014,14 @@ ieee80211_tx_info_clear_status(struct ieee80211_tx_info *info) * @RX_FLAG_AMPDU_DELIM_CRC_KNOWN: The delimiter CRC field is known (the CRC * is stored in the @ampdu_delimiter_crc field) * @RX_FLAG_LDPC: LDPC was used + * @RX_FLAG_ONLY_MONITOR: Report frame only to monitor interfaces without + * processing it in any regular way. + * This is useful if drivers offload some frames but still want to report + * them for sniffing purposes. + * @RX_FLAG_SKIP_MONITOR: Process and report frame to all interfaces except + * monitor interfaces. + * This is useful if drivers offload some frames but still want to report + * them for sniffing purposes. * @RX_FLAG_STBC_MASK: STBC 2 bit bitmask. 1 - Nss=1, 2 - Nss=2, 3 - Nss=3 * @RX_FLAG_10MHZ: 10 MHz (half channel) was used * @RX_FLAG_5MHZ: 5 MHz (quarter channel) was used @@ -1054,6 +1062,8 @@ enum mac80211_rx_flags { RX_FLAG_MACTIME_END = BIT(21), RX_FLAG_VHT = BIT(22), RX_FLAG_LDPC = BIT(23), + RX_FLAG_ONLY_MONITOR = BIT(24), + RX_FLAG_SKIP_MONITOR = BIT(25), RX_FLAG_STBC_MASK = BIT(26) | BIT(27), RX_FLAG_10MHZ = BIT(28), RX_FLAG_5MHZ = BIT(29), @@ -1072,6 +1082,7 @@ enum mac80211_rx_flags { * @RX_VHT_FLAG_160MHZ: 160 MHz was used * @RX_VHT_FLAG_BF: packet was beamformed */ + enum mac80211_rx_vht_flags { RX_VHT_FLAG_80MHZ = BIT(0), RX_VHT_FLAG_160MHZ = BIT(1), @@ -3751,11 +3762,12 @@ void ieee80211_restart_hw(struct ieee80211_hw *hw); * This function must be called with BHs disabled. * * @hw: the hardware this frame came in on + * @sta: the station the frame was received from, or %NULL * @skb: the buffer to receive, owned by mac80211 after this call * @napi: the NAPI context */ -void ieee80211_rx_napi(struct ieee80211_hw *hw, struct sk_buff *skb, - struct napi_struct *napi); +void ieee80211_rx_napi(struct ieee80211_hw *hw, struct ieee80211_sta *sta, + struct sk_buff *skb, struct napi_struct *napi); /** * ieee80211_rx - receive frame @@ -3779,7 +3791,7 @@ void ieee80211_rx_napi(struct ieee80211_hw *hw, struct sk_buff *skb, */ static inline void ieee80211_rx(struct ieee80211_hw *hw, struct sk_buff *skb) { - ieee80211_rx_napi(hw, skb, NULL); + ieee80211_rx_napi(hw, NULL, skb, NULL); } /** @@ -5467,4 +5479,19 @@ void ieee80211_unreserve_tid(struct ieee80211_sta *sta, u8 tid); */ struct sk_buff *ieee80211_tx_dequeue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); + +/** + * ieee80211_txq_get_depth - get pending frame/byte count of given txq + * + * The values are not guaranteed to be coherent with regard to each other, i.e. + * txq state can change half-way of this function and the caller may end up + * with "new" frame_cnt and "old" byte_cnt or vice-versa. + * + * @txq: pointer obtained from station or virtual interface + * @frame_cnt: pointer to store frame count + * @byte_cnt: pointer to store byte count + */ +void ieee80211_txq_get_depth(struct ieee80211_txq *txq, + unsigned long *frame_cnt, + unsigned long *byte_cnt); #endif /* MAC80211_H */ diff --git a/include/soc/qcom/camera2.h b/include/soc/qcom/camera2.h index bf9db17e6981..5a61d2b372c3 100644 --- a/include/soc/qcom/camera2.h +++ b/include/soc/qcom/camera2.h @@ -20,6 +20,7 @@ #include <linux/of_device.h> #include <linux/of.h> +#define MAX_SPECIAL_SUPPORT_SIZE 10 enum msm_camera_device_type_t { MSM_CAMERA_I2C_DEVICE, @@ -148,6 +149,8 @@ struct msm_camera_sensor_board_info { const char *actuator_name; const char *ois_name; const char *flash_name; + const char *special_support_sensors[MAX_SPECIAL_SUPPORT_SIZE]; + int32_t special_support_size; struct msm_camera_slave_info *slave_info; struct msm_camera_csi_lane_params *csi_lane_params; struct msm_camera_sensor_strobe_flash_data *strobe_flash_data; diff --git a/include/soc/qcom/icnss.h b/include/soc/qcom/icnss.h index 9c38b9aa5627..7770f06b5e08 100644 --- a/include/soc/qcom/icnss.h +++ b/include/soc/qcom/icnss.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -124,7 +124,9 @@ extern int icnss_get_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 *ch_count, extern int icnss_wlan_set_dfs_nol(const void *info, u16 info_len); extern int icnss_wlan_get_dfs_nol(void *info, u16 info_len); extern bool icnss_is_qmi_disable(void); +extern bool icnss_is_fw_ready(void); extern int icnss_set_wlan_mac_address(const u8 *in, const uint32_t len); extern u8 *icnss_get_wlan_mac_address(struct device *dev, uint32_t *num); +extern int icnss_trigger_recovery(struct device *dev); #endif /* _ICNSS_WLAN_H_ */ diff --git a/include/soc/qcom/socinfo.h b/include/soc/qcom/socinfo.h index 5f1912a62267..ac36df5769ee 100644 --- a/include/soc/qcom/socinfo.h +++ b/include/soc/qcom/socinfo.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009-2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -94,10 +94,18 @@ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,apq8998") #define early_machine_is_msmhamster() \ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msmhamster") -#define early_machine_is_msmfalcon() \ - of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msmfalcon") -#define early_machine_is_msmtriton() \ - of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msmtriton") +#define early_machine_is_sdm660() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm660") +#define early_machine_is_sda660() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sda660") +#define early_machine_is_sdm658() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm658") +#define early_machine_is_sda658() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sda658") +#define early_machine_is_sdm630() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm630") +#define early_machine_is_sda630() \ + of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sda630") #else #define of_board_is_sim() 0 #define of_board_is_rumi() 0 @@ -134,8 +142,12 @@ #define early_machine_is_msm8998() 0 #define early_machine_is_apq8998() 0 #define early_machine_is_msmhamster() 0 -#define early_machine_is_msmfalcon() 0 -#define early_machine_is_msmtriton() 0 +#define early_machine_is_sdm660() 0 +#define early_machine_is_sda660() 0 +#define early_machine_is_sdm658() 0 +#define early_machine_is_sda658() 0 +#define early_machine_is_sdm630() 0 +#define early_machine_is_sda630() 0 #endif #define PLATFORM_SUBTYPE_MDM 1 @@ -194,8 +206,8 @@ enum msm_cpu { MSM_CPU_8929, MSM_CPU_8998, MSM_CPU_HAMSTER, - MSM_CPU_FALCON, - MSM_CPU_TRITON, + MSM_CPU_660, + MSM_CPU_630, }; struct msm_soc_info { diff --git a/include/soc/qcom/subsystem_restart.h b/include/soc/qcom/subsystem_restart.h index 780666c332e2..763eaa9ad918 100644 --- a/include/soc/qcom/subsystem_restart.h +++ b/include/soc/qcom/subsystem_restart.h @@ -25,6 +25,12 @@ enum { RESET_LEVEL_MAX }; +enum crash_status { + CRASH_STATUS_NO_CRASH = 0, + CRASH_STATUS_ERR_FATAL, + CRASH_STATUS_WDOG_BITE, +}; + struct device; struct module; @@ -89,7 +95,7 @@ struct subsys_desc { /** * struct notif_data - additional notif information - * @crashed: indicates if subsystem has crashed + * @crashed: indicates if subsystem has crashed due to wdog bite or err fatal * @enable_ramdump: ramdumps disabled if set to 0 * @enable_mini_ramdumps: enable flag for minimized critical-memory-only * ramdumps @@ -97,7 +103,7 @@ struct subsys_desc { * @pdev: subsystem platform device pointer */ struct notif_data { - bool crashed; + enum crash_status crashed; int enable_ramdump; int enable_mini_ramdumps; bool no_auth; @@ -120,8 +126,9 @@ extern struct subsys_device *subsys_register(struct subsys_desc *desc); extern void subsys_unregister(struct subsys_device *dev); extern void subsys_default_online(struct subsys_device *dev); -extern void subsys_set_crash_status(struct subsys_device *dev, bool crashed); -extern bool subsys_get_crash_status(struct subsys_device *dev); +extern void subsys_set_crash_status(struct subsys_device *dev, + enum crash_status crashed); +extern enum crash_status subsys_get_crash_status(struct subsys_device *dev); void notify_proxy_vote(struct device *device); void notify_proxy_unvote(struct device *device); void complete_err_ready(struct subsys_device *subsys); @@ -174,9 +181,10 @@ struct subsys_device *subsys_register(struct subsys_desc *desc) static inline void subsys_unregister(struct subsys_device *dev) { } static inline void subsys_default_online(struct subsys_device *dev) { } +static inline void subsys_set_crash_status(struct subsys_device *dev, + enum crash_status crashed) { } static inline -void subsys_set_crash_status(struct subsys_device *dev, bool crashed) { } -static inline bool subsys_get_crash_status(struct subsys_device *dev) +enum crash_status subsys_get_crash_status(struct subsys_device *dev) { return false; } diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h index 06d952a07c2a..38d49a2af8be 100644 --- a/include/sound/apr_audio-v2.h +++ b/include/sound/apr_audio-v2.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -97,6 +97,16 @@ struct adm_cmd_matrix_map_routings_v5 { */ #define ADM_CMD_DEVICE_OPEN_V5 0x00010326 +/* This command allows a client to open a COPP/Voice Proc the +* way as ADM_CMD_DEVICE_OPEN_V5 but supports multiple endpoint2 +* channels. +* +* @return +* #ADM_CMDRSP_DEVICE_OPEN_V6 with the resulting status and +* COPP ID. +*/ +#define ADM_CMD_DEVICE_OPEN_V6 0x00010356 + /* Definition for a low latency stream session. */ #define ADM_LOW_LATENCY_DEVICE_SESSION 0x2000 @@ -246,12 +256,135 @@ struct adm_cmd_device_open_v5 { /* Array of channel mapping of buffers that the audio COPP * sends to the endpoint. Channel[i] mapping describes channel * I inside the buffer, where 0 < i < dev_num_channel. - * This value is relevent only for an audio Rx COPP. + * This value is relevant only for an audio Rx COPP. * For the voice processor block and Tx audio block, this field * is set to zero and is ignored. */ } __packed; +/* ADM device open command payload of the + * #ADM_CMD_DEVICE_OPEN_V6 command. + */ +struct adm_cmd_device_open_v6 { + struct apr_hdr hdr; + u16 flags; +/* Reserved for future use. Clients must set this field + * to zero. + */ + + u16 mode_of_operation; +/* Specifies whether the COPP must be opened on the Tx or Rx + * path. Use the ADM_CMD_COPP_OPEN_MODE_OF_OPERATION_* macros for + * supported values and interpretation. + * Supported values: + * - 0x1 -- Rx path COPP + * - 0x2 -- Tx path live COPP + * - 0x3 -- Tx path nonlive COPP + * Live connections cause sample discarding in the Tx device + * matrix if the destination output ports do not pull them + * fast enough. Nonlive connections queue the samples + * indefinitely. + */ + + u16 endpoint_id_1; +/* Logical and physical endpoint ID of the audio path. + * If the ID is a voice processor Tx block, it receives near + * samples. Supported values: Any pseudoport, AFE Rx port, + * or AFE Tx port For a list of valid IDs, refer to + * @xhyperref{Q4,[Q4]}. + * Q4 = Hexagon Multimedia: AFE Interface Specification + */ + + u16 endpoint_id_2; +/* Logical and physical endpoint ID 2 for a voice processor + * Tx block. + * This is not applicable to audio COPP. + * Supported values: + * - AFE Rx port + * - 0xFFFF -- Endpoint 2 is unavailable and the voice + * processor Tx + * block ignores this endpoint + * When the voice processor Tx block is created on the audio + * record path, + * it can receive far-end samples from an AFE Rx port if the + * voice call + * is active. The ID of the AFE port is provided in this + * field. + * For a list of valid IDs, refer @xhyperref{Q4,[Q4]}. + */ + + u32 topology_id; +/* Audio COPP topology ID; 32-bit GUID. */ + + u16 dev_num_channel; +/* Number of channels the audio COPP sends to/receives from + * the endpoint. + * Supported values: 1 to 8. + * The value is ignored for the voice processor Tx block, + * where channel + * configuration is derived from the topology ID. + */ + + u16 bit_width; +/* Bit width (in bits) that the audio COPP sends to/receives + * from the + * endpoint. The value is ignored for the voice processing + * Tx block, + * where the PCM width is 16 bits. + */ + + u32 sample_rate; +/* Sampling rate at which the audio COPP/voice processor + * Tx block + * interfaces with the endpoint. + * Supported values for voice processor Tx: 8000, 16000, + * 48000 Hz + * Supported values for audio COPP: >0 and <=192 kHz + */ + + u8 dev_channel_mapping[8]; +/* Array of channel mapping of buffers that the audio COPP + * sends to the endpoint. Channel[i] mapping describes channel + * I inside the buffer, where 0 < i < dev_num_channel. + * This value is relevant only for an audio Rx COPP. + * For the voice processor block and Tx audio block, this field + * is set to zero and is ignored. + */ + + u16 dev_num_channel_eid2; +/* Number of channels the voice processor block sends + * to/receives from the endpoint2. + * Supported values: 1 to 8. + * The value is ignored for audio COPP or if endpoint_id_2 is + * set to 0xFFFF. + */ + + u16 bit_width_eid2; +/* Bit width (in bits) that the voice processor sends + * to/receives from the endpoint2. + * Supported values: 16 and 24. + * The value is ignored for audio COPP or if endpoint_id_2 is + * set to 0xFFFF. + */ + + u32 sample_rate_eid2; +/* Sampling rate at which the voice processor Tx block + * interfaces with the endpoint2. + * Supported values for Tx voice processor: >0 and <=384 kHz + * The value is ignored for audio COPP or if endpoint_id_2 is + * set to 0xFFFF. + */ + + u8 dev_channel_mapping_eid2[8]; +/* Array of channel mapping of buffers that the voice processor + * sends to the endpoint. Channel[i] mapping describes channel + * I inside the buffer, where 0 < i < dev_num_channel. + * This value is relevant only for the Tx voice processor. + * The values are ignored for audio COPP or if endpoint_id_2 is + * set to 0xFFFF. + */ +} __packed; + /* * This command allows the client to close a COPP and disconnect * the device session. @@ -368,6 +501,16 @@ struct adm_cmd_rsp_device_open_v5 { /* Reserved. This field must be set to zero.*/ } __packed; +/* Returns the status and COPP ID to an #ADM_CMD_DEVICE_OPEN_V6 command. + */ +#define ADM_CMDRSP_DEVICE_OPEN_V6 0x00010357 + +/* Payload of the #ADM_CMDRSP_DEVICE_OPEN_V6 message, + * which returns the + * status and COPP ID to an #ADM_CMD_DEVICE_OPEN_V6 command + * is the exact same as ADM_CMDRSP_DEVICE_OPEN_V5. + */ + /* This command allows a query of one COPP parameter. */ #define ADM_CMD_GET_PP_PARAMS_V5 0x0001032A @@ -4120,6 +4263,9 @@ struct asm_multi_channel_pcm_enc_cfg_v2 { /* Enumeration for the raw AAC format. */ #define ASM_MEDIA_FMT_AAC_FORMAT_FLAG_RAW 3 +/* Enumeration for the AAC LATM format. */ +#define ASM_MEDIA_FMT_AAC_FORMAT_FLAG_LATM 4 + #define ASM_MEDIA_FMT_AAC_AOT_LC 2 #define ASM_MEDIA_FMT_AAC_AOT_SBR 5 #define ASM_MEDIA_FMT_AAC_AOT_PS 29 @@ -5812,6 +5958,138 @@ struct asm_stream_cmd_open_loopback_v2 { /* Reserved for future use. This field must be set to zero. */ } __packed; + +#define ASM_STREAM_CMD_OPEN_TRANSCODE_LOOPBACK 0x00010DBA + +/* Bitmask for the stream's Performance mode. */ +#define ASM_BIT_MASK_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK \ + (0x70000000UL) + +/* Bit shift for the stream's Performance mode. */ +#define ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK 28 + +/* Bitmask for the decoder converter enable flag. */ +#define ASM_BIT_MASK_DECODER_CONVERTER_FLAG (0x00000078UL) + +/* Shift value for the decoder converter enable flag. */ +#define ASM_SHIFT_DECODER_CONVERTER_FLAG 3 + +/* Converter mode is None (Default). */ +#define ASM_CONVERTER_MODE_NONE 0 + +/* Converter mode is DDP-to-DD. */ +#define ASM_DDP_DD_CONVERTER_MODE 1 + +/* Identifies a special converter mode where source and sink formats + * are the same but postprocessing must applied. Therefore, Decode + * @rarrow Re-encode is necessary. + */ +#define ASM_POST_PROCESS_CONVERTER_MODE 2 + + +struct asm_stream_cmd_open_transcode_loopback_t { + struct apr_hdr hdr; + u32 mode_flags; +/* Mode Flags specifies the performance mode in which this stream + * is to be opened. + * Supported values{for bits 30 to 28}(stream_perf_mode flag) + * + * #ASM_LEGACY_STREAM_SESSION -- This mode ensures backward + * compatibility to the original behavior + * of ASM_STREAM_CMD_OPEN_TRANSCODE_LOOPBACK + * + * #ASM_LOW_LATENCY_STREAM_SESSION -- Opens a loopback session by using + * shortened buffers in low latency POPP + * - Recommendation: Do not enable high latency algorithms. They might + * negate the benefits of opening a low latency stream, and they + * might also suffer quality degradation from unexpected jitter. + * - This Low Latency mode is supported only for PCM In and PCM Out + * loopbacks. An error is returned if Low Latency mode is opened for + * other transcode loopback modes. + * - To configure this subfield, use + * ASM_BIT_MASK_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK and + * ASM_SHIFT_STREAM_PERF_MODE_FLAG_IN_OPEN_TRANSCODE_LOOPBACK. + * + * Supported values{for bits 6 to 3} (decoder-converter compatibility) + * #ASM_CONVERTER_MODE_NONE (0x0) -- Default + * #ASM_DDP_DD_CONVERTER_MODE (0x1) + * #ASM_POST_PROCESS_CONVERTER_MODE (0x2) + * 0x3-0xF -- Reserved for future use + * - Use #ASM_BIT_MASK_DECODER_CONVERTER_FLAG and + * ASM_SHIFT_DECODER_CONVERTER_FLAG to set this bit + * All other bits are reserved; clients must set them to 0. + */ + + u32 src_format_id; +/* Specifies the media format of the input audio stream. + * + * Supported values + * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V2 + * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V3 + * - #ASM_MEDIA_FMT_DTS + * - #ASM_MEDIA_FMT_EAC3_DEC + * - #ASM_MEDIA_FMT_EAC3 + * - #ASM_MEDIA_FMT_AC3_DEC + * - #ASM_MEDIA_FMT_AC3 + */ + u32 sink_format_id; +/* Specifies the media format of the output stream. + * + * Supported values + * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V2 + * - #ASM_MEDIA_FMT_MULTI_CHANNEL_PCM_V3 + * - #ASM_MEDIA_FMT_DTS (not supported in Low Latency mode) + * - #ASM_MEDIA_FMT_EAC3_DEC (not supported in Low Latency mode) + * - #ASM_MEDIA_FMT_EAC3 (not supported in Low Latency mode) + * - #ASM_MEDIA_FMT_AC3_DEC (not supported in Low Latency mode) + * - #ASM_MEDIA_FMT_AC3 (not supported in Low Latency mode) + */ + + u32 audproc_topo_id; +/* Postprocessing topology ID, which specifies the topology (order of + * processing) of postprocessing algorithms. + * + * Supported values + * - #ASM_STREAM_POSTPROC_TOPO_ID_DEFAULT + * - #ASM_STREAM_POSTPROC_TOPO_ID_PEAKMETER + * - #ASM_STREAM_POSTPROC_TOPO_ID_MCH_PEAK_VOL + * - #ASM_STREAM_POSTPROC_TOPO_ID_NONE + * Topologies can be added through #ASM_CMD_ADD_TOPOLOGIES. + * This field is ignored for the Converter mode, in which no + * postprocessing is performed. + */ + + u16 src_endpoint_type; +/* Specifies the source endpoint that provides the input samples. + * + * Supported values + * - 0 -- Tx device matrix or stream router (gateway to the hardware + * ports) + * - All other values are reserved + * Clients must set this field to 0. Otherwise, an error is returned. + */ + + u16 sink_endpoint_type; +/* Specifies the sink endpoint type. + * + * Supported values + * - 0 -- Rx device matrix or stream router (gateway to the hardware + * ports) + * - All other values are reserved + * Clients must set this field to 0. Otherwise, an error is returned. + */ + + u16 bits_per_sample; +/* Number of bits per sample processed by the ASM modules. + * Supported values 16, 24 + */ + + u16 reserved; +/* This field must be set to 0. + */ +} __packed; + + #define ASM_STREAM_CMD_CLOSE 0x00010BCD #define ASM_STREAM_CMD_FLUSH 0x00010BCE @@ -6768,6 +7046,12 @@ struct admx_mic_gain { /*< Clients must set this field to zero. */ } __packed; +struct adm_set_mic_gain_params { + struct adm_cmd_set_pp_params_v5 params; + struct adm_param_data_v5 data; + struct admx_mic_gain mic_gain_data; +} __packed; + /* end_addtogroup audio_pp_param_ids */ /* @ingroup audio_pp_module_ids @@ -8017,11 +8301,10 @@ struct asm_eq_params { /* Band cut equalizer effect.*/ #define ASM_PARAM_EQ_BAND_CUT 6 -/* Voice get & set params */ -#define VOICE_CMD_SET_PARAM 0x0001133D -#define VOICE_CMD_GET_PARAM 0x0001133E -#define VOICE_EVT_GET_PARAM_ACK 0x00011008 - +/* Get & set params */ +#define VSS_ICOMMON_CMD_SET_PARAM_V2 0x0001133D +#define VSS_ICOMMON_CMD_GET_PARAM_V2 0x0001133E +#define VSS_ICOMMON_RSP_GET_PARAM 0x00011008 /** ID of the Bass Boost module. This module supports the following parameter IDs: @@ -9884,4 +10167,21 @@ struct adm_param_fluence_sourcetracking_t { #define AUDPROC_PARAM_ID_AUDIOSPHERE_DESIGN_MULTICHANNEL_INPUT 0x0001091D #define AUDPROC_PARAM_ID_AUDIOSPHERE_OPERATING_INPUT_MEDIA_INFO 0x0001091E + +#define AUDPROC_MODULE_ID_VOICE_TX_SECNS 0x10027059 +#define AUDPROC_PARAM_IDX_SEC_PRIMARY_MIC_CH 0x10014444 + +struct admx_sec_primary_mic_ch { + uint16_t version; + uint16_t reserved; + uint16_t sec_primary_mic_ch; + uint16_t reserved1; +} __packed; + + +struct adm_set_sec_primary_ch_params { + struct adm_cmd_set_pp_params_v5 params; + struct adm_param_data_v5 data; + struct admx_sec_primary_mic_ch sec_primary_mic_ch_data; +} __packed; #endif /*_APR_AUDIO_V2_H_ */ diff --git a/include/sound/q6adm-v2.h b/include/sound/q6adm-v2.h index c9a429d8607d..8c7da3b9838d 100644 --- a/include/sound/q6adm-v2.h +++ b/include/sound/q6adm-v2.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -102,6 +102,12 @@ int adm_connect_afe_port(int mode, int session_id, int port_id); void adm_ec_ref_rx_id(int port_id); +void adm_num_ec_ref_rx_chans(int num_chans); + +void adm_ec_ref_rx_bit_width(int bit_width); + +void adm_ec_ref_rx_sampling_rate(int sampling_rate); + int adm_get_lowlatency_copp_id(int port_id); int adm_set_multi_ch_map(char *channel_map, int path); @@ -130,6 +136,11 @@ int adm_set_volume(int port_id, int copp_idx, int volume); int adm_set_softvolume(int port_id, int copp_idx, struct audproc_softvolume_params *softvol_param); +int adm_set_mic_gain(int port_id, int copp_idx, int volume); + +int adm_send_set_multichannel_ec_primary_mic_ch(int port_id, int copp_idx, + int primary_mic_ch); + int adm_param_enable(int port_id, int copp_idx, int module_id, int enable); int adm_send_calibration(int port_id, int copp_idx, int path, int perf_mode, diff --git a/include/target/target_core_backend.h b/include/target/target_core_backend.h index 28ee5c2e6bcd..711322a8ee35 100644 --- a/include/target/target_core_backend.h +++ b/include/target/target_core_backend.h @@ -96,6 +96,6 @@ sense_reason_t passthrough_parse_cdb(struct se_cmd *cmd, bool target_sense_desc_format(struct se_device *dev); sector_t target_to_linux_sector(struct se_device *dev, sector_t lb); bool target_configure_unmap_from_queue(struct se_dev_attrib *attrib, - struct request_queue *q, int block_size); + struct request_queue *q); #endif /* TARGET_CORE_BACKEND_H */ diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h index 689f4d207122..59081c73b296 100644 --- a/include/target/target_core_base.h +++ b/include/target/target_core_base.h @@ -139,6 +139,7 @@ enum se_cmd_flags_table { SCF_COMPARE_AND_WRITE_POST = 0x00100000, SCF_PASSTHROUGH_PROT_SG_TO_MEM_NOALLOC = 0x00200000, SCF_ACK_KREF = 0x00400000, + SCF_TASK_ATTR_SET = 0x01000000, }; /* struct se_dev_entry->lun_flags and struct se_lun->lun_access */ diff --git a/include/target/target_core_fabric.h b/include/target/target_core_fabric.h index 7fb2557a760e..ce9ea736f1d7 100644 --- a/include/target/target_core_fabric.h +++ b/include/target/target_core_fabric.h @@ -163,7 +163,6 @@ int core_tmr_alloc_req(struct se_cmd *, void *, u8, gfp_t); void core_tmr_release_req(struct se_tmr_req *); int transport_generic_handle_tmr(struct se_cmd *); void transport_generic_request_failure(struct se_cmd *, sense_reason_t); -void __target_execute_cmd(struct se_cmd *); int transport_lookup_tmr_lun(struct se_cmd *, u64); void core_allocate_nexus_loss_ua(struct se_node_acl *acl); diff --git a/include/trace/events/cpufreq_sched.h b/include/trace/events/cpufreq_sched.h new file mode 100644 index 000000000000..a46cd088e969 --- /dev/null +++ b/include/trace/events/cpufreq_sched.h @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2015 Steve Muckle <smuckle@linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM cpufreq_sched + +#if !defined(_TRACE_CPUFREQ_SCHED_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_CPUFREQ_SCHED_H + +#include <linux/sched.h> +#include <linux/tracepoint.h> + +TRACE_EVENT(cpufreq_sched_throttled, + TP_PROTO(unsigned int rem), + TP_ARGS(rem), + TP_STRUCT__entry( + __field( unsigned int, rem) + ), + TP_fast_assign( + __entry->rem = rem; + ), + TP_printk("throttled - %d usec remaining", __entry->rem) +); + +TRACE_EVENT(cpufreq_sched_request_opp, + TP_PROTO(int cpu, + unsigned long capacity, + unsigned int freq_new, + unsigned int requested_freq), + TP_ARGS(cpu, capacity, freq_new, requested_freq), + TP_STRUCT__entry( + __field( int, cpu) + __field( unsigned long, capacity) + __field( unsigned int, freq_new) + __field( unsigned int, requested_freq) + ), + TP_fast_assign( + __entry->cpu = cpu; + __entry->capacity = capacity; + __entry->freq_new = freq_new; + __entry->requested_freq = requested_freq; + ), + TP_printk("cpu %d cap change, cluster cap request %ld => OPP %d " + "(cur %d)", + __entry->cpu, __entry->capacity, __entry->freq_new, + __entry->requested_freq) +); + +TRACE_EVENT(cpufreq_sched_update_capacity, + TP_PROTO(int cpu, + bool request, + struct sched_capacity_reqs *scr, + unsigned long new_capacity), + TP_ARGS(cpu, request, scr, new_capacity), + TP_STRUCT__entry( + __field( int, cpu) + __field( bool, request) + __field( unsigned long, cfs) + __field( unsigned long, rt) + __field( unsigned long, dl) + __field( unsigned long, total) + __field( unsigned long, new_total) + ), + TP_fast_assign( + __entry->cpu = cpu; + __entry->request = request; + __entry->cfs = scr->cfs; + __entry->rt = scr->rt; + __entry->dl = scr->dl; + __entry->total = scr->total; + __entry->new_total = new_capacity; + ), + TP_printk("cpu=%d set_cap=%d cfs=%ld rt=%ld dl=%ld old_tot=%ld " + "new_tot=%ld", + __entry->cpu, __entry->request, __entry->cfs, __entry->rt, + __entry->dl, __entry->total, __entry->new_total) +); + +#endif /* _TRACE_CPUFREQ_SCHED_H */ + +/* This part must be outside protection */ +#include <trace/define_trace.h> diff --git a/include/trace/events/msm_cam.h b/include/trace/events/msm_cam.h new file mode 100644 index 000000000000..b52845407ef0 --- /dev/null +++ b/include/trace/events/msm_cam.h @@ -0,0 +1,136 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM msm_cam + +#if !defined(_TRACE_MSM_VFE_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_MSM_VFE_H + +#include "msm_isp.h" +#include <linux/types.h> +#include <linux/tracepoint.h> + +#define STRING_LEN 80 + + +TRACE_EVENT(msm_cam_string, + TP_PROTO(const char *str), + TP_ARGS(str), + TP_STRUCT__entry( + __array(char, str, STRING_LEN) + ), + TP_fast_assign( + strlcpy(__entry->str, str, STRING_LEN); + ), + TP_printk("msm_cam: %s", __entry->str) +); + +TRACE_EVENT(msm_cam_tasklet_debug_dump, + TP_PROTO(struct msm_vfe_irq_debug_info tasklet_state), + TP_ARGS(tasklet_state), + TP_STRUCT__entry( + __field(unsigned int, vfe_id) + __field(unsigned int, core_id) + __field(unsigned int, irq_status0) + __field(unsigned int, irq_status1) + __field(unsigned int, ping_pong_status) + __field(long, tv_sec) + __field(long, tv_usec) + ), + TP_fast_assign( + __entry->vfe_id = tasklet_state.vfe_id; + __entry->irq_status0 = + tasklet_state.irq_status0[tasklet_state.vfe_id]; + __entry->irq_status1 = + tasklet_state.irq_status1[tasklet_state.vfe_id]; + __entry->core_id = tasklet_state.core_id; + __entry->ping_pong_status = + tasklet_state.ping_pong_status[tasklet_state.vfe_id]; + __entry->tv_sec = + tasklet_state.ts.buf_time.tv_sec; + __entry->tv_usec = + tasklet_state.ts.buf_time.tv_usec; + ), + TP_printk("vfe_id %d, core %d, irq_st0 0x%x, irq_st1 0x%x\n" + "pi_po_st 0x%x, time %ld:%ld", + __entry->vfe_id, + __entry->core_id, + __entry->irq_status0, + __entry->irq_status1, + __entry->ping_pong_status, + __entry->tv_sec, + __entry->tv_usec + ) +); + +TRACE_EVENT(msm_cam_ping_pong_debug_dump, + TP_PROTO(struct msm_vfe_irq_debug_info ping_pong_state), + TP_ARGS(ping_pong_state), + TP_STRUCT__entry( + __field(unsigned int, curr_vfe_id) + __field(unsigned int, curr_irq_status0) + __field(unsigned int, curr_irq_status1) + __field(unsigned int, curr_ping_pong_status) + __field(unsigned int, othr_vfe_id) + __field(unsigned int, othr_irq_status0) + __field(unsigned int, othr_irq_status1) + __field(unsigned int, othr_ping_pong_status) + __field(long, othr_tv_sec) + __field(long, othr_tv_usec) + __field(unsigned int, core_id) + ), + TP_fast_assign( + __entry->curr_vfe_id = + ping_pong_state.vfe_id; + __entry->curr_irq_status0 = + ping_pong_state.irq_status0[ping_pong_state.vfe_id]; + __entry->curr_irq_status1 = + ping_pong_state.irq_status1[ping_pong_state.vfe_id]; + __entry->curr_ping_pong_status = + ping_pong_state. + ping_pong_status[ping_pong_state.vfe_id]; + __entry->othr_vfe_id = + !ping_pong_state.vfe_id; + __entry->othr_irq_status0 = + ping_pong_state.irq_status0[!ping_pong_state.vfe_id]; + __entry->othr_irq_status1 = + ping_pong_state.irq_status1[!ping_pong_state.vfe_id]; + __entry->othr_ping_pong_status = + ping_pong_state. + ping_pong_status[!ping_pong_state.vfe_id]; + __entry->othr_tv_sec = + ping_pong_state.ts.buf_time.tv_sec; + __entry->othr_tv_usec = + ping_pong_state.ts.buf_time.tv_usec; + __entry->core_id = ping_pong_state.core_id; + ), + TP_printk("vfe_id %d, irq_st0 0x%x, irq_st1 0x%x, pi_po_st 0x%x\n" + "other vfe_id %d, irq_st0 0x%x, irq_st1 0x%x\n" + "pi_po_st 0x%x, time %ld:%ld core %d", + __entry->curr_vfe_id, + __entry->curr_irq_status0, + __entry->curr_irq_status1, + __entry->curr_ping_pong_status, + __entry->othr_vfe_id, + __entry->othr_irq_status0, + __entry->othr_irq_status1, + __entry->othr_ping_pong_status, + __entry->othr_tv_sec, + __entry->othr_tv_usec, + __entry->core_id + ) +); + +#endif /* _MSM_CAM_TRACE_H */ +/* This part must be outside protection */ +#include <trace/define_trace.h> diff --git a/include/trace/events/power.h b/include/trace/events/power.h index bc33e91ec5e6..8387688fb71b 100644 --- a/include/trace/events/power.h +++ b/include/trace/events/power.h @@ -186,6 +186,13 @@ TRACE_EVENT(cpu_frequency_switch_end, TP_printk("cpu_id=%lu", (unsigned long)__entry->cpu_id) ); + +DEFINE_EVENT(cpu, cpu_capacity, + + TP_PROTO(unsigned int capacity, unsigned int cpu_id), + + TP_ARGS(capacity, cpu_id) +); TRACE_EVENT(device_pm_callback_start, diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h index 72bbed9ad5db..9d58d703527c 100644 --- a/include/trace/events/sched.h +++ b/include/trace/events/sched.h @@ -134,6 +134,8 @@ TRACE_EVENT(sched_task_load, __field( int, best_cpu ) __field( u64, latency ) __field( int, grp_id ) + __field( u64, avg_burst ) + __field( u64, avg_sleep ) ), TP_fast_assign( @@ -150,13 +152,16 @@ TRACE_EVENT(sched_task_load, sched_ktime_clock() - p->ravg.mark_start : 0; __entry->grp_id = p->grp ? p->grp->id : 0; + __entry->avg_burst = p->ravg.avg_burst; + __entry->avg_sleep = p->ravg.avg_sleep_time; ), - TP_printk("%d (%s): demand=%u boost=%d reason=%d sync=%d need_idle=%d flags=%x grp=%d best_cpu=%d latency=%llu", + TP_printk("%d (%s): demand=%u boost=%d reason=%d sync=%d need_idle=%d flags=%x grp=%d best_cpu=%d latency=%llu avg_burst=%llu avg_sleep=%llu", __entry->pid, __entry->comm, __entry->demand, __entry->boost, __entry->reason, __entry->sync, __entry->need_idle, __entry->flags, __entry->grp_id, - __entry->best_cpu, __entry->latency) + __entry->best_cpu, __entry->latency, __entry->avg_burst, + __entry->avg_sleep) ); TRACE_EVENT(sched_set_preferred_cluster, @@ -393,6 +398,7 @@ TRACE_EVENT(sched_get_task_cpu_cycles, __field(u64, exec_time ) __field(u32, freq ) __field(u32, legacy_freq ) + __field(u32, max_freq) ), TP_fast_assign( @@ -402,11 +408,13 @@ TRACE_EVENT(sched_get_task_cpu_cycles, __entry->exec_time = exec_time; __entry->freq = cpu_cycles_to_freq(cycles, exec_time); __entry->legacy_freq = cpu_cur_freq(cpu); + __entry->max_freq = cpu_max_freq(cpu); ), - TP_printk("cpu=%d event=%d cycles=%llu exec_time=%llu freq=%u legacy_freq=%u", - __entry->cpu, __entry->event, __entry->cycles, - __entry->exec_time, __entry->freq, __entry->legacy_freq) + TP_printk("cpu=%d event=%d cycles=%llu exec_time=%llu freq=%u legacy_freq=%u max_freq=%u", + __entry->cpu, __entry->event, __entry->cycles, + __entry->exec_time, __entry->freq, __entry->legacy_freq, + __entry->max_freq) ); TRACE_EVENT(sched_update_history, @@ -1378,6 +1386,355 @@ TRACE_EVENT(sched_isolate, __entry->requested_cpu, __entry->isolated_cpus, __entry->time, __entry->isolate) ); + +TRACE_EVENT(sched_contrib_scale_f, + + TP_PROTO(int cpu, unsigned long freq_scale_factor, + unsigned long cpu_scale_factor), + + TP_ARGS(cpu, freq_scale_factor, cpu_scale_factor), + + TP_STRUCT__entry( + __field(int, cpu) + __field(unsigned long, freq_scale_factor) + __field(unsigned long, cpu_scale_factor) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->freq_scale_factor = freq_scale_factor; + __entry->cpu_scale_factor = cpu_scale_factor; + ), + + TP_printk("cpu=%d freq_scale_factor=%lu cpu_scale_factor=%lu", + __entry->cpu, __entry->freq_scale_factor, + __entry->cpu_scale_factor) +); + +#ifdef CONFIG_SMP + +/* + * Tracepoint for accounting sched averages for tasks. + */ +TRACE_EVENT(sched_load_avg_task, + + TP_PROTO(struct task_struct *tsk, struct sched_avg *avg), + + TP_ARGS(tsk, avg), + + TP_STRUCT__entry( + __array( char, comm, TASK_COMM_LEN ) + __field( pid_t, pid ) + __field( int, cpu ) + __field( unsigned long, load_avg ) + __field( unsigned long, util_avg ) + __field( u64, load_sum ) + __field( u32, util_sum ) + __field( u32, period_contrib ) + ), + + TP_fast_assign( + memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN); + __entry->pid = tsk->pid; + __entry->cpu = task_cpu(tsk); + __entry->load_avg = avg->load_avg; + __entry->util_avg = avg->util_avg; + __entry->load_sum = avg->load_sum; + __entry->util_sum = avg->util_sum; + __entry->period_contrib = avg->period_contrib; + ), + + TP_printk("comm=%s pid=%d cpu=%d load_avg=%lu util_avg=%lu load_sum=%llu" + " util_sum=%u period_contrib=%u", + __entry->comm, + __entry->pid, + __entry->cpu, + __entry->load_avg, + __entry->util_avg, + (u64)__entry->load_sum, + (u32)__entry->util_sum, + (u32)__entry->period_contrib) +); + +/* + * Tracepoint for accounting sched averages for cpus. + */ +TRACE_EVENT(sched_load_avg_cpu, + + TP_PROTO(int cpu, struct cfs_rq *cfs_rq), + + TP_ARGS(cpu, cfs_rq), + + TP_STRUCT__entry( + __field( int, cpu ) + __field( unsigned long, load_avg ) + __field( unsigned long, util_avg ) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->load_avg = cfs_rq->avg.load_avg; + __entry->util_avg = cfs_rq->avg.util_avg; + ), + + TP_printk("cpu=%d load_avg=%lu util_avg=%lu", + __entry->cpu, __entry->load_avg, __entry->util_avg) +); + +/* + * Tracepoint for sched_tune_config settings + */ +TRACE_EVENT(sched_tune_config, + + TP_PROTO(int boost), + + TP_ARGS(boost), + + TP_STRUCT__entry( + __field( int, boost ) + ), + + TP_fast_assign( + __entry->boost = boost; + ), + + TP_printk("boost=%d ", __entry->boost) +); + +/* + * Tracepoint for accounting CPU boosted utilization + */ +TRACE_EVENT(sched_boost_cpu, + + TP_PROTO(int cpu, unsigned long util, long margin), + + TP_ARGS(cpu, util, margin), + + TP_STRUCT__entry( + __field( int, cpu ) + __field( unsigned long, util ) + __field(long, margin ) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->util = util; + __entry->margin = margin; + ), + + TP_printk("cpu=%d util=%lu margin=%ld", + __entry->cpu, + __entry->util, + __entry->margin) +); + +/* + * Tracepoint for schedtune_tasks_update + */ +TRACE_EVENT(sched_tune_tasks_update, + + TP_PROTO(struct task_struct *tsk, int cpu, int tasks, int idx, + int boost, int max_boost), + + TP_ARGS(tsk, cpu, tasks, idx, boost, max_boost), + + TP_STRUCT__entry( + __array( char, comm, TASK_COMM_LEN ) + __field( pid_t, pid ) + __field( int, cpu ) + __field( int, tasks ) + __field( int, idx ) + __field( int, boost ) + __field( int, max_boost ) + ), + + TP_fast_assign( + memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN); + __entry->pid = tsk->pid; + __entry->cpu = cpu; + __entry->tasks = tasks; + __entry->idx = idx; + __entry->boost = boost; + __entry->max_boost = max_boost; + ), + + TP_printk("pid=%d comm=%s " + "cpu=%d tasks=%d idx=%d boost=%d max_boost=%d", + __entry->pid, __entry->comm, + __entry->cpu, __entry->tasks, __entry->idx, + __entry->boost, __entry->max_boost) +); + +/* + * Tracepoint for schedtune_boostgroup_update + */ +TRACE_EVENT(sched_tune_boostgroup_update, + + TP_PROTO(int cpu, int variation, int max_boost), + + TP_ARGS(cpu, variation, max_boost), + + TP_STRUCT__entry( + __field( int, cpu ) + __field( int, variation ) + __field( int, max_boost ) + ), + + TP_fast_assign( + __entry->cpu = cpu; + __entry->variation = variation; + __entry->max_boost = max_boost; + ), + + TP_printk("cpu=%d variation=%d max_boost=%d", + __entry->cpu, __entry->variation, __entry->max_boost) +); + +/* + * Tracepoint for accounting task boosted utilization + */ +TRACE_EVENT(sched_boost_task, + + TP_PROTO(struct task_struct *tsk, unsigned long util, long margin), + + TP_ARGS(tsk, util, margin), + + TP_STRUCT__entry( + __array( char, comm, TASK_COMM_LEN ) + __field( pid_t, pid ) + __field( unsigned long, util ) + __field( long, margin ) + + ), + + TP_fast_assign( + memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN); + __entry->pid = tsk->pid; + __entry->util = util; + __entry->margin = margin; + ), + + TP_printk("comm=%s pid=%d util=%lu margin=%ld", + __entry->comm, __entry->pid, + __entry->util, + __entry->margin) +); + +/* + * Tracepoint for accounting sched group energy + */ +TRACE_EVENT(sched_energy_diff, + + TP_PROTO(struct task_struct *tsk, int scpu, int dcpu, int udelta, + int nrgb, int nrga, int nrgd, int capb, int capa, int capd, + int nrgn, int nrgp), + + TP_ARGS(tsk, scpu, dcpu, udelta, + nrgb, nrga, nrgd, capb, capa, capd, + nrgn, nrgp), + + TP_STRUCT__entry( + __array( char, comm, TASK_COMM_LEN ) + __field( pid_t, pid ) + __field( int, scpu ) + __field( int, dcpu ) + __field( int, udelta ) + __field( int, nrgb ) + __field( int, nrga ) + __field( int, nrgd ) + __field( int, capb ) + __field( int, capa ) + __field( int, capd ) + __field( int, nrgn ) + __field( int, nrgp ) + ), + + TP_fast_assign( + memcpy(__entry->comm, tsk->comm, TASK_COMM_LEN); + __entry->pid = tsk->pid; + __entry->scpu = scpu; + __entry->dcpu = dcpu; + __entry->udelta = udelta; + __entry->nrgb = nrgb; + __entry->nrga = nrga; + __entry->nrgd = nrgd; + __entry->capb = capb; + __entry->capa = capa; + __entry->capd = capd; + __entry->nrgn = nrgn; + __entry->nrgp = nrgp; + ), + + TP_printk("pid=%d comm=%s " + "src_cpu=%d dst_cpu=%d usage_delta=%d " + "nrg_before=%d nrg_after=%d nrg_diff=%d " + "cap_before=%d cap_after=%d cap_delta=%d " + "nrg_delta=%d nrg_payoff=%d", + __entry->pid, __entry->comm, + __entry->scpu, __entry->dcpu, __entry->udelta, + __entry->nrgb, __entry->nrga, __entry->nrgd, + __entry->capb, __entry->capa, __entry->capd, + __entry->nrgn, __entry->nrgp) +); + +/* + * Tracepoint for schedtune_tasks_update + */ +TRACE_EVENT(sched_tune_filter, + + TP_PROTO(int nrg_delta, int cap_delta, + int nrg_gain, int cap_gain, + int payoff, int region), + + TP_ARGS(nrg_delta, cap_delta, nrg_gain, cap_gain, payoff, region), + + TP_STRUCT__entry( + __field( int, nrg_delta ) + __field( int, cap_delta ) + __field( int, nrg_gain ) + __field( int, cap_gain ) + __field( int, payoff ) + __field( int, region ) + ), + + TP_fast_assign( + __entry->nrg_delta = nrg_delta; + __entry->cap_delta = cap_delta; + __entry->nrg_gain = nrg_gain; + __entry->cap_gain = cap_gain; + __entry->payoff = payoff; + __entry->region = region; + ), + + TP_printk("nrg_delta=%d cap_delta=%d nrg_gain=%d cap_gain=%d payoff=%d region=%d", + __entry->nrg_delta, __entry->cap_delta, + __entry->nrg_gain, __entry->cap_gain, + __entry->payoff, __entry->region) +); + +/* + * Tracepoint for system overutilized flag + */ +TRACE_EVENT(sched_overutilized, + + TP_PROTO(bool overutilized), + + TP_ARGS(overutilized), + + TP_STRUCT__entry( + __field( bool, overutilized ) + ), + + TP_fast_assign( + __entry->overutilized = overutilized; + ), + + TP_printk("overutilized=%d", + __entry->overutilized ? 1 : 0) +); + +#endif /* CONFIG_SMP */ + #endif /* _TRACE_SCHED_H */ /* This part must be outside protection */ diff --git a/include/trace/events/sunrpc.h b/include/trace/events/sunrpc.h index 003dca933803..5664ca07c9c7 100644 --- a/include/trace/events/sunrpc.h +++ b/include/trace/events/sunrpc.h @@ -529,20 +529,27 @@ TRACE_EVENT(svc_xprt_do_enqueue, TP_STRUCT__entry( __field(struct svc_xprt *, xprt) - __field_struct(struct sockaddr_storage, ss) __field(int, pid) __field(unsigned long, flags) + __dynamic_array(unsigned char, addr, xprt != NULL ? + xprt->xpt_remotelen : 0) ), TP_fast_assign( __entry->xprt = xprt; - xprt ? memcpy(&__entry->ss, &xprt->xpt_remote, sizeof(__entry->ss)) : memset(&__entry->ss, 0, sizeof(__entry->ss)); __entry->pid = rqst? rqst->rq_task->pid : 0; - __entry->flags = xprt ? xprt->xpt_flags : 0; + if (xprt) { + memcpy(__get_dynamic_array(addr), + &xprt->xpt_remote, + xprt->xpt_remotelen); + __entry->flags = xprt->xpt_flags; + } else + __entry->flags = 0; ), TP_printk("xprt=0x%p addr=%pIScp pid=%d flags=%s", __entry->xprt, - (struct sockaddr *)&__entry->ss, + __get_dynamic_array_len(addr) != 0 ? + (struct sockaddr *)__get_dynamic_array(addr) : NULL, __entry->pid, show_svc_xprt_flags(__entry->flags)) ); @@ -553,18 +560,25 @@ TRACE_EVENT(svc_xprt_dequeue, TP_STRUCT__entry( __field(struct svc_xprt *, xprt) - __field_struct(struct sockaddr_storage, ss) __field(unsigned long, flags) + __dynamic_array(unsigned char, addr, xprt != NULL ? + xprt->xpt_remotelen : 0) ), TP_fast_assign( - __entry->xprt = xprt, - xprt ? memcpy(&__entry->ss, &xprt->xpt_remote, sizeof(__entry->ss)) : memset(&__entry->ss, 0, sizeof(__entry->ss)); - __entry->flags = xprt ? xprt->xpt_flags : 0; + __entry->xprt = xprt; + if (xprt) { + memcpy(__get_dynamic_array(addr), + &xprt->xpt_remote, + xprt->xpt_remotelen); + __entry->flags = xprt->xpt_flags; + } else + __entry->flags = 0; ), TP_printk("xprt=0x%p addr=%pIScp flags=%s", __entry->xprt, - (struct sockaddr *)&__entry->ss, + __get_dynamic_array_len(addr) != 0 ? + (struct sockaddr *)__get_dynamic_array(addr) : NULL, show_svc_xprt_flags(__entry->flags)) ); @@ -592,19 +606,26 @@ TRACE_EVENT(svc_handle_xprt, TP_STRUCT__entry( __field(struct svc_xprt *, xprt) __field(int, len) - __field_struct(struct sockaddr_storage, ss) __field(unsigned long, flags) + __dynamic_array(unsigned char, addr, xprt != NULL ? + xprt->xpt_remotelen : 0) ), TP_fast_assign( __entry->xprt = xprt; - xprt ? memcpy(&__entry->ss, &xprt->xpt_remote, sizeof(__entry->ss)) : memset(&__entry->ss, 0, sizeof(__entry->ss)); __entry->len = len; - __entry->flags = xprt ? xprt->xpt_flags : 0; + if (xprt) { + memcpy(__get_dynamic_array(addr), + &xprt->xpt_remote, + xprt->xpt_remotelen); + __entry->flags = xprt->xpt_flags; + } else + __entry->flags = 0; ), TP_printk("xprt=0x%p addr=%pIScp len=%d flags=%s", __entry->xprt, - (struct sockaddr *)&__entry->ss, + __get_dynamic_array_len(addr) != 0 ? + (struct sockaddr *)__get_dynamic_array(addr) : NULL, __entry->len, show_svc_xprt_flags(__entry->flags)) ); #endif /* _TRACE_SUNRPC_H */ diff --git a/include/uapi/linux/hyperv.h b/include/uapi/linux/hyperv.h index e4c0a35d6417..e347b24ef9fb 100644 --- a/include/uapi/linux/hyperv.h +++ b/include/uapi/linux/hyperv.h @@ -313,6 +313,7 @@ enum hv_kvp_exchg_pool { #define HV_INVALIDARG 0x80070057 #define HV_GUID_NOTFOUND 0x80041002 #define HV_ERROR_ALREADY_EXISTS 0x80070050 +#define HV_ERROR_DISK_FULL 0x80070070 #define ADDR_FAMILY_NONE 0x00 #define ADDR_FAMILY_IPV4 0x01 diff --git a/include/uapi/linux/msm_kgsl.h b/include/uapi/linux/msm_kgsl.h index aac11dbe5984..71fdf6d6e9e5 100644 --- a/include/uapi/linux/msm_kgsl.h +++ b/include/uapi/linux/msm_kgsl.h @@ -50,6 +50,7 @@ #define KGSL_CONTEXT_IFH_NOP 0x00010000 #define KGSL_CONTEXT_SECURE 0x00020000 #define KGSL_CONTEXT_NO_SNAPSHOT 0x00040000 +#define KGSL_CONTEXT_SPARSE 0x00080000 #define KGSL_CONTEXT_PREEMPT_STYLE_MASK 0x0E000000 #define KGSL_CONTEXT_PREEMPT_STYLE_SHIFT 25 @@ -89,6 +90,7 @@ #define KGSL_CMDBATCH_END_OF_FRAME KGSL_CONTEXT_END_OF_FRAME /* 0x100 */ #define KGSL_CMDBATCH_SYNC KGSL_CONTEXT_SYNC /* 0x400 */ #define KGSL_CMDBATCH_PWR_CONSTRAINT KGSL_CONTEXT_PWR_CONSTRAINT /* 0x800 */ +#define KGSL_CMDBATCH_SPARSE 0x1000 /* 0x1000 */ /* * Reserve bits [16:19] and bits [28:31] for possible bits shared between @@ -1556,4 +1558,34 @@ struct kgsl_sparse_bind { #define IOCTL_KGSL_SPARSE_BIND \ _IOW(KGSL_IOC_TYPE, 0x54, struct kgsl_sparse_bind) +/** + * struct kgsl_gpu_sparse_command - Argument for + * IOCTL_KGSL_GPU_SPARSE_COMMAND + * @flags: Current flags for the object + * @sparselist: List of kgsl_sparse_binding_object to bind/unbind + * @synclist: List of kgsl_command_syncpoints + * @sparsesize: Size of kgsl_sparse_binding_object + * @numsparse: Number of elements in list + * @sync_size: Size of kgsl_command_syncpoint structure + * @numsyncs: Number of kgsl_command_syncpoints in syncpoint list + * @context_id: Context ID submitting the kgsl_gpu_command + * @timestamp: Timestamp for the submitted commands + * @id: Virtual ID to bind/unbind + */ +struct kgsl_gpu_sparse_command { + uint64_t flags; + uint64_t __user sparselist; + uint64_t __user synclist; + unsigned int sparsesize; + unsigned int numsparse; + unsigned int syncsize; + unsigned int numsyncs; + unsigned int context_id; + unsigned int timestamp; + unsigned int id; +}; + +#define IOCTL_KGSL_GPU_SPARSE_COMMAND \ + _IOWR(KGSL_IOC_TYPE, 0x55, struct kgsl_gpu_sparse_command) + #endif /* _UAPI_MSM_KGSL_H */ diff --git a/include/uapi/linux/msm_mdp.h b/include/uapi/linux/msm_mdp.h index 20b879c2e5fc..fca2a3c2d494 100644 --- a/include/uapi/linux/msm_mdp.h +++ b/include/uapi/linux/msm_mdp.h @@ -118,6 +118,7 @@ #define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) /* msmtitanium */ #define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) /* msm8998 */ #define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) /* msm8998 v1.0 */ +#define MDSS_MDP_HW_REV_320 MDSS_MDP_REV(3, 2, 0) /* sdm660 */ enum { NOTIFY_UPDATE_INIT, diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h index 696a4322844a..cc8ece36e0e3 100644 --- a/include/uapi/linux/nl80211.h +++ b/include/uapi/linux/nl80211.h @@ -322,7 +322,7 @@ * @NL80211_CMD_GET_SCAN: get scan results * @NL80211_CMD_TRIGGER_SCAN: trigger a new scan with the given parameters * %NL80211_ATTR_TX_NO_CCK_RATE is used to decide whether to send the - * probe requests at CCK rate or not. %NL80211_ATTR_MAC can be used to + * probe requests at CCK rate or not. %NL80211_ATTR_BSSID can be used to * specify a BSSID to scan for; if not included, the wildcard BSSID will * be used. * @NL80211_CMD_NEW_SCAN_RESULTS: scan notification (as a reply to @@ -826,6 +826,47 @@ * not running. The driver indicates the status of the scan through * cfg80211_scan_done(). * + * @NL80211_CMD_START_NAN: Start NAN operation, identified by its + * %NL80211_ATTR_WDEV interface. This interface must have been previously + * created with %NL80211_CMD_NEW_INTERFACE. After it has been started, the + * NAN interface will create or join a cluster. This command must have a + * valid %NL80211_ATTR_NAN_MASTER_PREF attribute and optional + * %NL80211_ATTR_NAN_DUAL attributes. + * After this command NAN functions can be added. + * @NL80211_CMD_STOP_NAN: Stop the NAN operation, identified by + * its %NL80211_ATTR_WDEV interface. + * @NL80211_CMD_ADD_NAN_FUNCTION: Add a NAN function. The function is defined + * with %NL80211_ATTR_NAN_FUNC nested attribute. When called, this + * operation returns the strictly positive and unique instance id + * (%NL80211_ATTR_NAN_FUNC_INST_ID) and a cookie (%NL80211_ATTR_COOKIE) + * of the function upon success. + * Since instance ID's can be re-used, this cookie is the right + * way to identify the function. This will avoid races when a termination + * event is handled by the user space after it has already added a new + * function that got the same instance id from the kernel as the one + * which just terminated. + * This cookie may be used in NAN events even before the command + * returns, so userspace shouldn't process NAN events until it processes + * the response to this command. + * Look at %NL80211_ATTR_SOCKET_OWNER as well. + * @NL80211_CMD_DEL_NAN_FUNCTION: Delete a NAN function by cookie. + * This command is also used as a notification sent when a NAN function is + * terminated. This will contain a %NL80211_ATTR_NAN_FUNC_INST_ID + * and %NL80211_ATTR_COOKIE attributes. + * @NL80211_CMD_CHANGE_NAN_CONFIG: Change current NAN configuration. NAN + * must be operational (%NL80211_CMD_START_NAN was executed). + * It must contain at least one of the following attributes: + * %NL80211_ATTR_NAN_MASTER_PREF, %NL80211_ATTR_NAN_DUAL. + * @NL80211_CMD_NAN_FUNC_MATCH: Notification sent when a match is reported. + * This will contain a %NL80211_ATTR_NAN_MATCH nested attribute and + * %NL80211_ATTR_COOKIE. + * + * @NL80211_CMD_UPDATE_CONNECT_PARAMS: Update one or more connect parameters + * for subsequent roaming cases if the driver or firmware uses internal + * BSS selection. This command can be issued only while connected and it + * does not result in a change for the current association. Currently, + * only the %NL80211_ATTR_IE data is used and updated with this command. + * * @NL80211_CMD_MAX: highest used command number * @__NL80211_CMD_AFTER_LAST: internal use */ @@ -1014,6 +1055,17 @@ enum nl80211_commands { NL80211_CMD_ABORT_SCAN, + NL80211_CMD_START_NAN, + NL80211_CMD_STOP_NAN, + NL80211_CMD_ADD_NAN_FUNCTION, + NL80211_CMD_DEL_NAN_FUNCTION, + NL80211_CMD_CHANGE_NAN_CONFIG, + NL80211_CMD_NAN_MATCH, + + NL80211_CMD_SET_MULTICAST_TO_UNICAST, + + NL80211_CMD_UPDATE_CONNECT_PARAMS, + /* add new commands above here */ /* used to define NL80211_CMD_MAX below */ @@ -1328,7 +1380,13 @@ enum nl80211_commands { * enum nl80211_band value is used as the index (nla_type() of the nested * data. If a band is not included, it will be configured to allow all * rates based on negotiated supported rates information. This attribute - * is used with %NL80211_CMD_SET_TX_BITRATE_MASK. + * is used with %NL80211_CMD_SET_TX_BITRATE_MASK and with starting AP, + * and joining mesh networks (not IBSS yet). In the later case, it must + * specify just a single bitrate, which is to be used for the beacon. + * The driver must also specify support for this with the extended + * features NL80211_EXT_FEATURE_BEACON_RATE_LEGACY, + * NL80211_EXT_FEATURE_BEACON_RATE_HT and + * NL80211_EXT_FEATURE_BEACON_RATE_VHT. * * @NL80211_ATTR_FRAME_MATCH: A binary attribute which typically must contain * at least one byte, currently used with @NL80211_CMD_REGISTER_FRAME. @@ -1812,6 +1870,70 @@ enum nl80211_commands { * %NL80211_ATTR_EXT_CAPA_MASK, to specify the extended capabilities per * interface type. * + * @NL80211_ATTR_MU_MIMO_GROUP_DATA: array of 24 bytes that defines a MU-MIMO + * groupID for monitor mode. + * The first 8 bytes are a mask that defines the membership in each + * group (there are 64 groups, group 0 and 63 are reserved), + * each bit represents a group and set to 1 for being a member in + * that group and 0 for not being a member. + * The remaining 16 bytes define the position in each group: 2 bits for + * each group. + * (smaller group numbers represented on most significant bits and bigger + * group numbers on least significant bits.) + * This attribute is used only if all interfaces are in monitor mode. + * Set this attribute in order to monitor packets using the given MU-MIMO + * groupID data. + * to turn off that feature set all the bits of the groupID to zero. + * @NL80211_ATTR_MU_MIMO_FOLLOW_MAC_ADDR: mac address for the sniffer to follow + * when using MU-MIMO air sniffer. + * to turn that feature off set an invalid mac address + * (e.g. FF:FF:FF:FF:FF:FF) + * + * @NL80211_ATTR_SCAN_START_TIME_TSF: The time at which the scan was actually + * started (u64). The time is the TSF of the BSS the interface that + * requested the scan is connected to (if available, otherwise this + * attribute must not be included). + * @NL80211_ATTR_SCAN_START_TIME_TSF_BSSID: The BSS according to which + * %NL80211_ATTR_SCAN_START_TIME_TSF is set. + * @NL80211_ATTR_MEASUREMENT_DURATION: measurement duration in TUs (u16). If + * %NL80211_ATTR_MEASUREMENT_DURATION_MANDATORY is not set, this is the + * maximum measurement duration allowed. This attribute is used with + * measurement requests. It can also be used with %NL80211_CMD_TRIGGER_SCAN + * if the scan is used for beacon report radio measurement. + * @NL80211_ATTR_MEASUREMENT_DURATION_MANDATORY: flag attribute that indicates + * that the duration specified with %NL80211_ATTR_MEASUREMENT_DURATION is + * mandatory. If this flag is not set, the duration is the maximum duration + * and the actual measurement duration may be shorter. + * + * @NL80211_ATTR_MESH_PEER_AID: Association ID for the mesh peer (u16). This is + * used to pull the stored data for mesh peer in power save state. + * + * @NL80211_ATTR_NAN_MASTER_PREF: the master preference to be used by + * %NL80211_CMD_START_NAN and optionally with + * %NL80211_CMD_CHANGE_NAN_CONFIG. Its type is u8 and it can't be 0. + * Also, values 1 and 255 are reserved for certification purposes and + * should not be used during a normal device operation. + * @NL80211_ATTR_NAN_DUAL: NAN dual band operation config (see + * &enum nl80211_nan_dual_band_conf). This attribute is used with + * %NL80211_CMD_START_NAN and optionally with + * %NL80211_CMD_CHANGE_NAN_CONFIG. + * @NL80211_ATTR_NAN_FUNC: a function that can be added to NAN. See + * &enum nl80211_nan_func_attributes for description of this nested + * attribute. + * @NL80211_ATTR_NAN_MATCH: used to report a match. This is a nested attribute. + * See &enum nl80211_nan_match_attributes. + * @NL80211_ATTR_FILS_KEK: KEK for FILS (Re)Association Request/Response frame + * protection. + * @NL80211_ATTR_FILS_NONCES: Nonces (part of AAD) for FILS (Re)Association + * Request/Response frame protection. This attribute contains the 16 octet + * STA Nonce followed by 16 octets of AP Nonce. + * + * @NL80211_ATTR_MULTICAST_TO_UNICAST_ENABLED: Indicates whether or not multicast + * packets should be send out as unicast to all stations (flag attribute). + * + * @NL80211_ATTR_BSSID: The BSSID of the AP. Note that %NL80211_ATTR_MAC is also + * used in various commands/events for specifying the BSSID. + * * @NUM_NL80211_ATTR: total number of nl80211_attrs available * @NL80211_ATTR_MAX: highest attribute number currently defined * @__NL80211_ATTR_AFTER_LAST: internal use @@ -2196,6 +2318,28 @@ enum nl80211_attrs { NL80211_ATTR_IFTYPE_EXT_CAPA, + NL80211_ATTR_MU_MIMO_GROUP_DATA, + NL80211_ATTR_MU_MIMO_FOLLOW_MAC_ADDR, + + NL80211_ATTR_SCAN_START_TIME_TSF, + NL80211_ATTR_SCAN_START_TIME_TSF_BSSID, + NL80211_ATTR_MEASUREMENT_DURATION, + NL80211_ATTR_MEASUREMENT_DURATION_MANDATORY, + + NL80211_ATTR_MESH_PEER_AID, + + NL80211_ATTR_NAN_MASTER_PREF, + NL80211_ATTR_NAN_DUAL, + NL80211_ATTR_NAN_FUNC, + NL80211_ATTR_NAN_MATCH, + + NL80211_ATTR_FILS_KEK, + NL80211_ATTR_FILS_NONCES, + + NL80211_ATTR_MULTICAST_TO_UNICAST_ENABLED, + + NL80211_ATTR_BSSID, + /* add attributes here, update the policy in nl80211.c */ __NL80211_ATTR_AFTER_LAST, @@ -4432,12 +4576,47 @@ enum nl80211_feature_flags { /** * enum nl80211_ext_feature_index - bit index of extended features. * @NL80211_EXT_FEATURE_VHT_IBSS: This driver supports IBSS with VHT datarates. + * @NL80211_EXT_FEATURE_RRM: This driver supports RRM. When featured, user can + * can request to use RRM (see %NL80211_ATTR_USE_RRM) with + * %NL80211_CMD_ASSOCIATE and %NL80211_CMD_CONNECT requests, which will set + * the ASSOC_REQ_USE_RRM flag in the association request even if + * NL80211_FEATURE_QUIET is not advertized. + * @NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER: This device supports MU-MIMO air + * sniffer which means that it can be configured to hear packets from + * certain groups which can be configured by the + * %NL80211_ATTR_MU_MIMO_GROUP_DATA attribute, + * or can be configured to follow a station by configuring the + * %NL80211_ATTR_MU_MIMO_FOLLOW_MAC_ADDR attribute. + * @NL80211_EXT_FEATURE_SCAN_START_TIME: This driver includes the actual + * time the scan started in scan results event. The time is the TSF of + * the BSS that the interface that requested the scan is connected to + * (if available). + * @NL80211_EXT_FEATURE_BSS_PARENT_TSF: Per BSS, this driver reports the + * time the last beacon/probe was received. The time is the TSF of the + * BSS that the interface that requested the scan is connected to + * (if available). + * @NL80211_EXT_FEATURE_SET_SCAN_DWELL: This driver supports configuration of + * channel dwell time. + * @NL80211_EXT_FEATURE_BEACON_RATE_LEGACY: Driver supports beacon rate + * configuration (AP/mesh), supporting a legacy (non HT/VHT) rate. + * @NL80211_EXT_FEATURE_BEACON_RATE_HT: Driver supports beacon rate + * configuration (AP/mesh) with HT rates. + * @NL80211_EXT_FEATURE_BEACON_RATE_VHT: Driver supports beacon rate + * configuration (AP/mesh) with VHT rates. * * @NUM_NL80211_EXT_FEATURES: number of extended features. * @MAX_NL80211_EXT_FEATURES: highest extended feature index. */ enum nl80211_ext_feature_index { NL80211_EXT_FEATURE_VHT_IBSS, + NL80211_EXT_FEATURE_RRM, + NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER, + NL80211_EXT_FEATURE_SCAN_START_TIME, + NL80211_EXT_FEATURE_BSS_PARENT_TSF, + NL80211_EXT_FEATURE_SET_SCAN_DWELL, + NL80211_EXT_FEATURE_BEACON_RATE_LEGACY, + NL80211_EXT_FEATURE_BEACON_RATE_HT, + NL80211_EXT_FEATURE_BEACON_RATE_VHT, /* add new features before the definition below */ NUM_NL80211_EXT_FEATURES, diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h index 355eea225dd9..3eb02a1d6d8c 100644 --- a/include/uapi/linux/rtnetlink.h +++ b/include/uapi/linux/rtnetlink.h @@ -306,12 +306,12 @@ enum rtattr_type_t { RTA_TABLE, RTA_MARK, RTA_MFC_STATS, + RTA_UID, RTA_VIA, RTA_NEWDST, RTA_PREF, RTA_ENCAP_TYPE, RTA_ENCAP, - RTA_UID, __RTA_MAX }; diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/ch9.h index 4338eb7b09b3..779a62aafafe 100644 --- a/include/uapi/linux/usb/ch9.h +++ b/include/uapi/linux/usb/ch9.h @@ -954,6 +954,7 @@ enum usb_device_speed { USB_SPEED_HIGH, /* usb 2.0 */ USB_SPEED_WIRELESS, /* wireless (usb 2.5) */ USB_SPEED_SUPER, /* usb 3.0 */ + USB_SPEED_SUPER_PLUS, /* usb 3.1 */ }; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 7be4c28cc1ca..686fc6143010 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -640,6 +640,9 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ #define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */ #define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */ +#define V4L2_PIX_FMT_Y8I v4l2_fourcc('Y', '8', 'I', ' ') /* Greyscale 8-bit L/R interleaved */ +#define V4L2_PIX_FMT_Y12I v4l2_fourcc('Y', '1', '2', 'I') /* Greyscale 12-bit L/R interleaved */ +#define V4L2_PIX_FMT_Z16 v4l2_fourcc('Z', '1', '6', ' ') /* Depth data 16-bit */ #define V4L2_PIX_FMT_SDE_ABGR_8888 \ v4l2_fourcc('R', 'A', '2', '4') /* 32-bit ABGR 8:8:8:8 */ diff --git a/include/uapi/media/msm_media_info.h b/include/uapi/media/msm_media_info.h index 50b8fc32b129..746eee61ad0e 100644 --- a/include/uapi/media/msm_media_info.h +++ b/include/uapi/media/msm_media_info.h @@ -986,6 +986,22 @@ static inline unsigned int VENUS_BUFFER_SIZE( MSM_MEDIA_MAX(extra_size + 8192, 48 * y_stride); size = MSM_MEDIA_ALIGN(size, 4096); break; + case COLOR_FMT_P010_UBWC: + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + + size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane; + size = MSM_MEDIA_ALIGN(size, 4096); + break; case COLOR_FMT_RGBA8888: rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); size = rgb_plane; diff --git a/include/uapi/media/msm_sde_rotator.h b/include/uapi/media/msm_sde_rotator.h index 4487edf0c854..6a92e530d59c 100644 --- a/include/uapi/media/msm_sde_rotator.h +++ b/include/uapi/media/msm_sde_rotator.h @@ -77,13 +77,38 @@ struct msm_sde_rotator_fence { __u32 reserved[5]; }; +/** +* struct msm_sde_rotator_comp_ratio - v4l2 buffer compression ratio +* @index: id number of the buffer +* @type: enum v4l2_buf_type; buffer type +* @numer: numerator of the ratio +* @denom: denominator of the ratio +**/ +struct msm_sde_rotator_comp_ratio { + __u32 index; + __u32 type; + __u32 numer; + __u32 denom; + __u32 reserved[4]; +}; + /* SDE Rotator private ioctl ID */ #define VIDIOC_G_SDE_ROTATOR_FENCE \ _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_sde_rotator_fence) #define VIDIOC_S_SDE_ROTATOR_FENCE \ _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_sde_rotator_fence) +#define VIDIOC_G_SDE_ROTATOR_COMP_RATIO \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_sde_rotator_comp_ratio) +#define VIDIOC_S_SDE_ROTATOR_COMP_RATIO \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_sde_rotator_comp_ratio) /* SDE Rotator private control ID's */ #define V4L2_CID_SDE_ROTATOR_SECURE (V4L2_CID_USER_BASE + 0x1000) +/* + * This control Id indicates this context is associated with the + * secure camera. + */ +#define V4L2_CID_SDE_ROTATOR_SECURE_CAMERA (V4L2_CID_USER_BASE + 0x2000) + #endif /* __UAPI_MSM_SDE_ROTATOR_H__ */ diff --git a/include/uapi/media/msmb_isp.h b/include/uapi/media/msmb_isp.h index 9399f6e84004..fac254c4361b 100644 --- a/include/uapi/media/msmb_isp.h +++ b/include/uapi/media/msmb_isp.h @@ -2,6 +2,7 @@ #define __UAPI_MSMB_ISP__ #include <linux/videodev2.h> +#include <media/msmb_camera.h> #define MAX_PLANES_PER_STREAM 3 #define MAX_NUM_STREAM 7 @@ -292,9 +293,10 @@ struct msm_vfe_axi_plane_cfg { uint8_t rdi_cid;/*CID 1-16*/ }; -enum msm_stream_memory_input_t { - MEMORY_INPUT_DISABLED, - MEMORY_INPUT_ENABLED +enum msm_stream_rdi_input_type { + MSM_CAMERA_RDI_MIN, + MSM_CAMERA_RDI_PDAF, + MSM_CAMERA_RDI_MAX, }; struct msm_vfe_axi_stream_request_cmd { @@ -317,7 +319,7 @@ struct msm_vfe_axi_stream_request_cmd { uint32_t controllable_output; uint32_t burst_len; /* Flag indicating memory input stream */ - enum msm_stream_memory_input_t memory_input; + enum msm_stream_rdi_input_type rdi_input_type; }; struct msm_vfe_axi_stream_release_cmd { @@ -556,6 +558,16 @@ struct msm_isp_buf_request { enum msm_isp_buf_type buf_type; }; +struct msm_isp_buf_request_ver2 { + uint32_t session_id; + uint32_t stream_id; + uint8_t num_buf; + uint32_t handle; + enum msm_isp_buf_type buf_type; + enum smmu_attach_mode security_mode; + uint32_t reserved[4]; +}; + struct msm_isp_qbuf_plane { uint32_t addr; uint32_t offset; @@ -715,6 +727,7 @@ struct msm_isp_fetch_eng_event { struct msm_isp_stats_event { uint32_t stats_mask; /* 4 bytes */ uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; /* 11 bytes */ + uint8_t pd_stats_idx; }; struct msm_isp_stream_ack { @@ -884,8 +897,11 @@ enum msm_isp_ioctl_cmd_code { MSM_ISP_SET_DUAL_HW_MASTER_SLAVE, MSM_ISP_MAP_BUF_START_FE, MSM_ISP_UNMAP_BUF, + MSM_ISP_AHB_CLK_CFG, + MSM_ISP_DUAL_HW_MASTER_SLAVE_SYNC, MSM_ISP_FETCH_ENG_MULTI_PASS_START, MSM_ISP_MAP_BUF_START_MULTI_PASS_FE, + MSM_ISP_REQUEST_BUF_VER2, }; #define VIDIOC_MSM_VFE_REG_CFG \ @@ -989,10 +1005,10 @@ enum msm_isp_ioctl_cmd_code { struct msm_isp_unmap_buf_req) #define VIDIOC_MSM_ISP_AHB_CLK_CFG \ - _IOWR('V', BASE_VIDIOC_PRIVATE+25, struct msm_isp_ahb_clk_cfg) + _IOWR('V', MSM_ISP_AHB_CLK_CFG, struct msm_isp_ahb_clk_cfg) #define VIDIOC_MSM_ISP_DUAL_HW_MASTER_SLAVE_SYNC \ - _IOWR('V', BASE_VIDIOC_PRIVATE+26, \ + _IOWR('V', MSM_ISP_DUAL_HW_MASTER_SLAVE_SYNC, \ struct msm_isp_dual_hw_master_slave_sync) #define VIDIOC_MSM_ISP_FETCH_ENG_MULTI_PASS_START \ @@ -1002,4 +1018,8 @@ enum msm_isp_ioctl_cmd_code { #define VIDIOC_MSM_ISP_MAP_BUF_START_MULTI_PASS_FE \ _IOWR('V', MSM_ISP_MAP_BUF_START_MULTI_PASS_FE, \ struct msm_vfe_fetch_eng_multi_pass_start) + +#define VIDIOC_MSM_ISP_REQUEST_BUF_VER2 \ + _IOWR('V', MSM_ISP_REQUEST_BUF_VER2, struct msm_isp_buf_request_ver2) + #endif /* __MSMB_ISP__ */ diff --git a/include/uapi/scsi/cxlflash_ioctl.h b/include/uapi/scsi/cxlflash_ioctl.h index 831351b2e660..2302f3ce5f86 100644 --- a/include/uapi/scsi/cxlflash_ioctl.h +++ b/include/uapi/scsi/cxlflash_ioctl.h @@ -31,6 +31,16 @@ struct dk_cxlflash_hdr { }; /* + * Return flag definitions available to all ioctls + * + * Similar to the input flags, these are grown from the bottom-up with the + * intention that ioctl-specific return flag definitions would grow from the + * top-down, allowing the two sets to co-exist. While not required/enforced + * at this time, this provides future flexibility. + */ +#define DK_CXLFLASH_ALL_PORTS_ACTIVE 0x0000000000000001ULL + +/* * Notes: * ----- * The 'context_id' field of all ioctl structures contains the context |