diff options
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/drm/Kbuild | 2 | ||||
| -rw-r--r-- | include/uapi/drm/drm_fourcc.h | 8 | ||||
| -rw-r--r-- | include/uapi/drm/drm_mode.h | 2 | ||||
| -rw-r--r-- | include/uapi/drm/msm_drm.h | 54 | ||||
| -rw-r--r-- | include/uapi/drm/msm_drm_pp.h | 82 | ||||
| -rw-r--r-- | include/uapi/drm/sde_drm.h | 298 | ||||
| -rw-r--r-- | include/uapi/linux/android/binder.h | 104 | ||||
| -rw-r--r-- | include/uapi/linux/v4l2-controls.h | 3 | ||||
| -rw-r--r-- | include/uapi/media/msm_vidc.h | 2 | ||||
| -rw-r--r-- | include/uapi/sound/lsm_params.h | 51 |
10 files changed, 587 insertions, 19 deletions
diff --git a/include/uapi/drm/Kbuild b/include/uapi/drm/Kbuild index 38d437096c35..c3c78a0d0052 100644 --- a/include/uapi/drm/Kbuild +++ b/include/uapi/drm/Kbuild @@ -18,3 +18,5 @@ header-y += via_drm.h header-y += vmwgfx_drm.h header-y += msm_drm.h header-y += virtgpu_drm.h +header-y += sde_drm.h +header-y += msm_drm_pp.h diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 0b69a7753558..53d7c80f5eb0 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -229,4 +229,12 @@ */ #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) +/* + * Qualcomm Compressed Format + * + * Refers to a compressed variant of the base format that is compressed. + * Implementation may be platform and base-format specific. + */ +#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) + #endif /* DRM_FOURCC_H */ diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 6c11ca401de8..09c22caf34dd 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -72,6 +72,7 @@ #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) +#define DRM_MODE_FLAG_SEAMLESS (1<<19) /* DPMS flags */ @@ -354,6 +355,7 @@ struct drm_mode_fb_cmd { #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */ +#define DRM_MODE_FB_SECURE (1<<2) /* for secure framebuffers */ struct drm_mode_fb_cmd2 { __u32 fb_id; diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 75a232b9a970..fd1be42188cd 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -20,6 +20,7 @@ #include <stddef.h> #include <drm/drm.h> +#include <drm/sde_drm.h> /* Please note that modifications to all structs defined here are * subject to backwards-compatibility constraints: @@ -196,6 +197,39 @@ struct drm_msm_wait_fence { struct drm_msm_timespec timeout; /* in */ }; +/** + * struct drm_msm_event_req - Payload to event enable/disable ioctls. + * @object_id: DRM object id. Ex: for crtc pass crtc id. + * @object_type: DRM object type. Ex: for crtc set it to DRM_MODE_OBJECT_CRTC. + * @event: Event for which notification is being enabled/disabled. + * Ex: for Histogram set - DRM_EVENT_HISTOGRAM. + * @client_context: Opaque pointer that will be returned during event response + * notification. + * @index: Object index(ex: crtc index), optional for user-space to set. + * Driver will override value based on object_id and object_type. + */ +struct drm_msm_event_req { + __u32 object_id; + __u32 object_type; + __u32 event; + __u64 client_context; + __u32 index; +}; + +/** + * struct drm_msm_event_resp - payload returned when read is called for + * custom notifications. + * @base: Event type and length of complete notification payload. + * @info: Contains information about DRM that which raised this event. + * @data: Custom payload that driver returns for event type. + * size of data = base.length - (sizeof(base) + sizeof(info)) + */ +struct drm_msm_event_resp { + struct drm_event base; + struct drm_msm_event_req info; + __u8 data[]; +}; + #define DRM_MSM_GET_PARAM 0x00 /* placeholder: #define DRM_MSM_SET_PARAM 0x01 @@ -206,7 +240,18 @@ struct drm_msm_wait_fence { #define DRM_MSM_GEM_CPU_FINI 0x05 #define DRM_MSM_GEM_SUBMIT 0x06 #define DRM_MSM_WAIT_FENCE 0x07 -#define DRM_MSM_NUM_IOCTLS 0x08 +#define DRM_SDE_WB_CONFIG 0x08 +#define DRM_MSM_REGISTER_EVENT 0x09 +#define DRM_MSM_DEREGISTER_EVENT 0x0A +#define DRM_MSM_NUM_IOCTLS 0x0B + +/** + * Currently DRM framework supports only VSYNC event. + * Starting the custom events at 0xff to provide space for DRM + * framework to add new events. + */ +#define DRM_EVENT_HISTOGRAM 0xff +#define DRM_EVENT_AD 0x100 #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) @@ -215,5 +260,10 @@ struct drm_msm_wait_fence { #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini) #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) - +#define DRM_IOCTL_SDE_WB_CONFIG \ + DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg) +#define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \ + DRM_MSM_REGISTER_EVENT), struct drm_msm_event_req) +#define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \ + DRM_MSM_DEREGISTER_EVENT), struct drm_msm_event_req) #endif /* __MSM_DRM_H__ */ diff --git a/include/uapi/drm/msm_drm_pp.h b/include/uapi/drm/msm_drm_pp.h new file mode 100644 index 000000000000..9ed3a13953ef --- /dev/null +++ b/include/uapi/drm/msm_drm_pp.h @@ -0,0 +1,82 @@ +#ifndef _MSM_DRM_PP_H_ +#define _MSM_DRM_PP_H_ + +#include <drm/drm.h> + +/** + * struct drm_msm_pcc_coeff - PCC coefficient structure for each color + * component. + * @c: constant coefficient. + * @r: red coefficient. + * @g: green coefficient. + * @b: blue coefficient. + * @rg: red green coefficient. + * @gb: green blue coefficient. + * @rb: red blue coefficient. + * @rgb: red blue green coefficient. + */ + +struct drm_msm_pcc_coeff { + __u32 c; + __u32 r; + __u32 g; + __u32 b; + __u32 rg; + __u32 gb; + __u32 rb; + __u32 rgb; +}; + +/** + * struct drm_msm_pcc - pcc feature structure + * flags: for customizing operations + * r: red coefficients. + * g: green coefficients. + * b: blue coefficients. + */ + +struct drm_msm_pcc { + __u64 flags; + struct drm_msm_pcc_coeff r; + struct drm_msm_pcc_coeff g; + struct drm_msm_pcc_coeff b; +}; + +/* struct drm_msm_pa_vlut - picture adjustment vLUT structure + * flags: for customizing vlut operation + * val: vLUT values + */ +#define PA_VLUT_SIZE 256 +struct drm_msm_pa_vlut { + __u64 flags; + __u32 val[PA_VLUT_SIZE]; +}; + +/* struct drm_msm_memcol - Memory color feature strucuture. + * Skin, sky, foliage features are supported. + * @prot_flags: Bit mask for enabling protection feature. + * @color_adjust_p0: Adjustment curve. + * @color_adjust_p1: Adjustment curve. + * @color_adjust_p2: Adjustment curve. + * @blend_gain: Blend gain weightage from othe PA features. + * @sat_hold: Saturation hold value. + * @val_hold: Value hold info. + * @hue_region: Hue qualifier. + * @sat_region: Saturation qualifier. + * @val_region: Value qualifier. + */ +#define DRM_MSM_MEMCOL +struct drm_msm_memcol { + __u64 prot_flags; + __u32 color_adjust_p0; + __u32 color_adjust_p1; + __u32 color_adjust_p2; + __u32 blend_gain; + __u32 sat_hold; + __u32 val_hold; + __u32 hue_region; + __u32 sat_region; + __u32 val_region; +}; + +#endif /* _MSM_DRM_PP_H_ */ diff --git a/include/uapi/drm/sde_drm.h b/include/uapi/drm/sde_drm.h new file mode 100644 index 000000000000..c7bed3b1ccf3 --- /dev/null +++ b/include/uapi/drm/sde_drm.h @@ -0,0 +1,298 @@ +#ifndef _SDE_DRM_H_ +#define _SDE_DRM_H_ + +/* Total number of supported color planes */ +#define SDE_MAX_PLANES 4 + +/* Total number of parameterized detail enhancer mapping curves */ +#define SDE_MAX_DE_CURVES 3 + + /* Y/RGB and UV filter configuration */ +#define FILTER_EDGE_DIRECTED_2D 0x0 +#define FILTER_CIRCULAR_2D 0x1 +#define FILTER_SEPARABLE_1D 0x2 +#define FILTER_BILINEAR 0x3 + +/* Alpha filters */ +#define FILTER_ALPHA_DROP_REPEAT 0x0 +#define FILTER_ALPHA_BILINEAR 0x1 +#define FILTER_ALPHA_2D 0x3 + +/* Blend filters */ +#define FILTER_BLEND_CIRCULAR_2D 0x0 +#define FILTER_BLEND_SEPARABLE_1D 0x1 + +/* LUT configuration flags */ +#define SCALER_LUT_SWAP 0x1 +#define SCALER_LUT_DIR_WR 0x2 +#define SCALER_LUT_Y_CIR_WR 0x4 +#define SCALER_LUT_UV_CIR_WR 0x8 +#define SCALER_LUT_Y_SEP_WR 0x10 +#define SCALER_LUT_UV_SEP_WR 0x20 + +/** + * Blend operations for "blend_op" property + * + * @SDE_DRM_BLEND_OP_NOT_DEFINED: No blend operation defined for the layer. + * @SDE_DRM_BLEND_OP_OPAQUE: Apply a constant blend operation. The layer + * would appear opaque in case fg plane alpha + * is 0xff. + * @SDE_DRM_BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already + * has alpha pre-multiplication done. If the fg + * plane alpha is less than 0xff, apply + * modulation as well. This operation is + * intended on layers having alpha channel. + * @SDE_DRM_BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not + * alpha pre-multiplied. Apply + * pre-multiplication. If fg plane alpha is + * less than 0xff, apply modulation as well. + * @SDE_DRM_BLEND_OP_MAX: Used to track maximum blend operation + * possible by mdp. + */ +#define SDE_DRM_BLEND_OP_NOT_DEFINED 0 +#define SDE_DRM_BLEND_OP_OPAQUE 1 +#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2 +#define SDE_DRM_BLEND_OP_COVERAGE 3 +#define SDE_DRM_BLEND_OP_MAX 4 + +/** + * Bit masks for "src_config" property + * construct bitmask via (1UL << SDE_DRM_<flag>) + */ +#define SDE_DRM_DEINTERLACE 0 /* Specifies interlaced input */ + +/* DRM bitmasks are restricted to 0..63 */ +#define SDE_DRM_BITMASK_COUNT 64 + +/** + * struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure + * @num_ext_pxls_lr: Number of total horizontal pixels + * @num_ext_pxls_tb: Number of total vertical lines + * @left_ftch: Number of extra pixels to overfetch from left + * @right_ftch: Number of extra pixels to overfetch from right + * @top_ftch: Number of extra lines to overfetch from top + * @btm_ftch: Number of extra lines to overfetch from bottom + * @left_rpt: Number of extra pixels to repeat from left + * @right_rpt: Number of extra pixels to repeat from right + * @top_rpt: Number of extra lines to repeat from top + * @btm_rpt: Number of extra lines to repeat from bottom + */ +struct sde_drm_pix_ext_v1 { + /* + * Number of pixels ext in left, right, top and bottom direction + * for all color components. + */ + int32_t num_ext_pxls_lr[SDE_MAX_PLANES]; + int32_t num_ext_pxls_tb[SDE_MAX_PLANES]; + + /* + * Number of pixels needs to be overfetched in left, right, top + * and bottom directions from source image for scaling. + */ + int32_t left_ftch[SDE_MAX_PLANES]; + int32_t right_ftch[SDE_MAX_PLANES]; + int32_t top_ftch[SDE_MAX_PLANES]; + int32_t btm_ftch[SDE_MAX_PLANES]; + /* + * Number of pixels needs to be repeated in left, right, top and + * bottom directions for scaling. + */ + int32_t left_rpt[SDE_MAX_PLANES]; + int32_t right_rpt[SDE_MAX_PLANES]; + int32_t top_rpt[SDE_MAX_PLANES]; + int32_t btm_rpt[SDE_MAX_PLANES]; + +}; + +/** + * struct sde_drm_scaler_v1 - version 1 of struct sde_drm_scaler + * @lr: Pixel extension settings for left/right + * @tb: Pixel extension settings for top/botton + * @init_phase_x: Initial scaler phase values for x + * @phase_step_x: Phase step values for x + * @init_phase_y: Initial scaler phase values for y + * @phase_step_y: Phase step values for y + * @horz_filter: Horizontal filter array + * @vert_filter: Vertical filter array + */ +struct sde_drm_scaler_v1 { + /* + * Pix ext settings + */ + struct sde_drm_pix_ext_v1 pe; + /* + * Phase settings + */ + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + + /* + * Filter type to be used for scaling in horizontal and vertical + * directions + */ + uint32_t horz_filter[SDE_MAX_PLANES]; + uint32_t vert_filter[SDE_MAX_PLANES]; +}; + +/** + * struct sde_drm_de_v1 - version 1 of detail enhancer structure + * @enable: Enables/disables detail enhancer + * @sharpen_level1: Sharpening strength for noise + * @sharpen_level2: Sharpening strength for context + * @clip: Clip coefficient + * @limit: Detail enhancer limit factor + * @thr_quiet: Quite zone threshold + * @thr_dieout: Die-out zone threshold + * @thr_low: Linear zone left threshold + * @thr_high: Linear zone right threshold + * @prec_shift: Detail enhancer precision + * @adjust_a: Mapping curves A coefficients + * @adjust_b: Mapping curves B coefficients + * @adjust_c: Mapping curves C coefficients + */ +struct sde_drm_de_v1 { + uint32_t enable; + int16_t sharpen_level1; + int16_t sharpen_level2; + uint16_t clip; + uint16_t limit; + uint16_t thr_quiet; + uint16_t thr_dieout; + uint16_t thr_low; + uint16_t thr_high; + uint16_t prec_shift; + int16_t adjust_a[SDE_MAX_DE_CURVES]; + int16_t adjust_b[SDE_MAX_DE_CURVES]; + int16_t adjust_c[SDE_MAX_DE_CURVES]; +}; + +/** + * struct sde_drm_scaler_v2 - version 2 of struct sde_drm_scaler + * @enable: Scaler enable + * @dir_en: Detail enhancer enable + * @pe: Pixel extension settings + * @horz_decimate: Horizontal decimation factor + * @vert_decimate: Vertical decimation factor + * @init_phase_x: Initial scaler phase values for x + * @phase_step_x: Phase step values for x + * @init_phase_y: Initial scaler phase values for y + * @phase_step_y: Phase step values for y + * @preload_x: Horizontal preload value + * @preload_y: Vertical preload value + * @src_width: Source width + * @src_height: Source height + * @dst_width: Destination width + * @dst_height: Destination height + * @y_rgb_filter_cfg: Y/RGB plane filter configuration + * @uv_filter_cfg: UV plane filter configuration + * @alpha_filter_cfg: Alpha filter configuration + * @blend_cfg: Selection of blend coefficients + * @lut_flag: LUT configuration flags + * @dir_lut_idx: 2d 4x4 LUT index + * @y_rgb_cir_lut_idx: Y/RGB circular LUT index + * @uv_cir_lut_idx: UV circular LUT index + * @y_rgb_sep_lut_idx: Y/RGB separable LUT index + * @uv_sep_lut_idx: UV separable LUT index + * @de: Detail enhancer settings +*/ +struct sde_drm_scaler_v2 { + /* + * General definitions + */ + uint32_t enable; + uint32_t dir_en; + + /* + * Pix ext settings + */ + struct sde_drm_pix_ext_v1 pe; + + /* + * Decimation settings + */ + uint32_t horz_decimate; + uint32_t vert_decimate; + + /* + * Phase settings + */ + int32_t init_phase_x[SDE_MAX_PLANES]; + int32_t phase_step_x[SDE_MAX_PLANES]; + int32_t init_phase_y[SDE_MAX_PLANES]; + int32_t phase_step_y[SDE_MAX_PLANES]; + + uint32_t preload_x[SDE_MAX_PLANES]; + uint32_t preload_y[SDE_MAX_PLANES]; + uint32_t src_width[SDE_MAX_PLANES]; + uint32_t src_height[SDE_MAX_PLANES]; + + uint32_t dst_width; + uint32_t dst_height; + + uint32_t y_rgb_filter_cfg; + uint32_t uv_filter_cfg; + uint32_t alpha_filter_cfg; + uint32_t blend_cfg; + + uint32_t lut_flag; + uint32_t dir_lut_idx; + + /* for Y(RGB) and UV planes*/ + uint32_t y_rgb_cir_lut_idx; + uint32_t uv_cir_lut_idx; + uint32_t y_rgb_sep_lut_idx; + uint32_t uv_sep_lut_idx; + + /* + * Detail enhancer settings + */ + struct sde_drm_de_v1 de; +}; + + +/* + * Define constants for struct sde_drm_csc + */ +#define SDE_CSC_MATRIX_COEFF_SIZE 9 +#define SDE_CSC_CLAMP_SIZE 6 +#define SDE_CSC_BIAS_SIZE 3 + +/** + * struct sde_drm_csc_v1 - version 1 of struct sde_drm_csc + * @ctm_coeff: Matrix coefficients, in S31.32 format + * @pre_bias: Pre-bias array values + * @post_bias: Post-bias array values + * @pre_clamp: Pre-clamp array values + * @post_clamp: Post-clamp array values + */ +struct sde_drm_csc_v1 { + int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE]; + uint32_t pre_bias[SDE_CSC_BIAS_SIZE]; + uint32_t post_bias[SDE_CSC_BIAS_SIZE]; + uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE]; + uint32_t post_clamp[SDE_CSC_CLAMP_SIZE]; +}; + +/* Writeback Config version definition */ +#define SDE_DRM_WB_CFG 0x1 + +/* SDE_DRM_WB_CONFIG_FLAGS - Writeback configuration flags */ +#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1<<0) + +/** + * struct sde_drm_wb_cfg - Writeback configuration structure + * @flags: see DRM_MSM_WB_CONFIG_FLAGS + * @connector_id: writeback connector identifier + * @count_modes: Count of modes in modes_ptr + * @modes: Pointer to struct drm_mode_modeinfo + */ +struct sde_drm_wb_cfg { + uint32_t flags; + uint32_t connector_id; + uint32_t count_modes; + uint64_t modes; +}; + +#endif /* _SDE_DRM_H_ */ diff --git a/include/uapi/linux/android/binder.h b/include/uapi/linux/android/binder.h index 41420e341e75..51f891fb1b18 100644 --- a/include/uapi/linux/android/binder.h +++ b/include/uapi/linux/android/binder.h @@ -33,6 +33,8 @@ enum { BINDER_TYPE_HANDLE = B_PACK_CHARS('s', 'h', '*', B_TYPE_LARGE), BINDER_TYPE_WEAK_HANDLE = B_PACK_CHARS('w', 'h', '*', B_TYPE_LARGE), BINDER_TYPE_FD = B_PACK_CHARS('f', 'd', '*', B_TYPE_LARGE), + BINDER_TYPE_FDA = B_PACK_CHARS('f', 'd', 'a', B_TYPE_LARGE), + BINDER_TYPE_PTR = B_PACK_CHARS('p', 't', '*', B_TYPE_LARGE), }; enum { @@ -48,6 +50,14 @@ typedef __u64 binder_size_t; typedef __u64 binder_uintptr_t; #endif +/** + * struct binder_object_header - header shared by all binder metadata objects. + * @type: type of the object + */ +struct binder_object_header { + __u32 type; +}; + /* * This is the flattened representation of a Binder object for transfer * between processes. The 'offsets' supplied as part of a binder transaction @@ -56,9 +66,8 @@ typedef __u64 binder_uintptr_t; * between processes. */ struct flat_binder_object { - /* 8 bytes for large_flat_header. */ - __u32 type; - __u32 flags; + struct binder_object_header hdr; + __u32 flags; /* 8 bytes of data. */ union { @@ -70,6 +79,84 @@ struct flat_binder_object { binder_uintptr_t cookie; }; +/** + * struct binder_fd_object - describes a filedescriptor to be fixed up. + * @hdr: common header structure + * @pad_flags: padding to remain compatible with old userspace code + * @pad_binder: padding to remain compatible with old userspace code + * @fd: file descriptor + * @cookie: opaque data, used by user-space + */ +struct binder_fd_object { + struct binder_object_header hdr; + __u32 pad_flags; + union { + binder_uintptr_t pad_binder; + __u32 fd; + }; + + binder_uintptr_t cookie; +}; + +/* struct binder_buffer_object - object describing a userspace buffer + * @hdr: common header structure + * @flags: one or more BINDER_BUFFER_* flags + * @buffer: address of the buffer + * @length: length of the buffer + * @parent: index in offset array pointing to parent buffer + * @parent_offset: offset in @parent pointing to this buffer + * + * A binder_buffer object represents an object that the + * binder kernel driver can copy verbatim to the target + * address space. A buffer itself may be pointed to from + * within another buffer, meaning that the pointer inside + * that other buffer needs to be fixed up as well. This + * can be done by setting the BINDER_BUFFER_FLAG_HAS_PARENT + * flag in @flags, by setting @parent buffer to the index + * in the offset array pointing to the parent binder_buffer_object, + * and by setting @parent_offset to the offset in the parent buffer + * at which the pointer to this buffer is located. + */ +struct binder_buffer_object { + struct binder_object_header hdr; + __u32 flags; + binder_uintptr_t buffer; + binder_size_t length; + binder_size_t parent; + binder_size_t parent_offset; +}; + +enum { + BINDER_BUFFER_FLAG_HAS_PARENT = 0x01, +}; + +/* struct binder_fd_array_object - object describing an array of fds in a buffer + * @hdr: common header structure + * @num_fds: number of file descriptors in the buffer + * @parent: index in offset array to buffer holding the fd array + * @parent_offset: start offset of fd array in the buffer + * + * A binder_fd_array object represents an array of file + * descriptors embedded in a binder_buffer_object. It is + * different from a regular binder_buffer_object because it + * describes a list of file descriptors to fix up, not an opaque + * blob of memory, and hence the kernel needs to treat it differently. + * + * An example of how this would be used is with Android's + * native_handle_t object, which is a struct with a list of integers + * and a list of file descriptors. The native_handle_t struct itself + * will be represented by a struct binder_buffer_objct, whereas the + * embedded list of file descriptors is represented by a + * struct binder_fd_array_object with that binder_buffer_object as + * a parent. + */ +struct binder_fd_array_object { + struct binder_object_header hdr; + binder_size_t num_fds; + binder_size_t parent; + binder_size_t parent_offset; +}; + /* * On 64-bit platforms where user code may run in 32-bits the driver must * translate the buffer (and local binder) addresses appropriately. @@ -162,6 +249,11 @@ struct binder_transaction_data { } data; }; +struct binder_transaction_data_sg { + struct binder_transaction_data transaction_data; + binder_size_t buffers_size; +}; + struct binder_ptr_cookie { binder_uintptr_t ptr; binder_uintptr_t cookie; @@ -346,6 +438,12 @@ enum binder_driver_command_protocol { /* * void *: cookie */ + + BC_TRANSACTION_SG = _IOW('c', 17, struct binder_transaction_data_sg), + BC_REPLY_SG = _IOW('c', 18, struct binder_transaction_data_sg), + /* + * binder_transaction_data_sg: the sent command. + */ }; #endif /* _UAPI_LINUX_BINDER_H */ diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 8fdf57504ab6..c8653a9f0e9e 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -1058,6 +1058,9 @@ enum vl42_mpeg_vidc_video_h264_svc_nal { (V4L2_CID_MPEG_MSM_VIDC_BASE + 68) enum v4l2_mpeg_vidc_video_perf_mode { +#define V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT \ + V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT + V4L2_MPEG_VIDC_VIDEO_PERF_UNINIT = 0, V4L2_MPEG_VIDC_VIDEO_PERF_MAX_QUALITY = 1, V4L2_MPEG_VIDC_VIDEO_PERF_POWER_SAVE = 2 }; diff --git a/include/uapi/media/msm_vidc.h b/include/uapi/media/msm_vidc.h index b259bdef8a93..e9370cb660b2 100644 --- a/include/uapi/media/msm_vidc.h +++ b/include/uapi/media/msm_vidc.h @@ -245,7 +245,7 @@ enum msm_vidc_extradata_type { MSM_VIDC_EXTRADATA_DIGITAL_ZOOM = 0x07000010, #define MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO \ MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO - MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x070000011, + MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x00000014, MSM_VIDC_EXTRADATA_MULTISLICE_INFO = 0x7F100000, MSM_VIDC_EXTRADATA_NUM_CONCEALED_MB = 0x7F100001, MSM_VIDC_EXTRADATA_INDEX = 0x7F100002, diff --git a/include/uapi/sound/lsm_params.h b/include/uapi/sound/lsm_params.h index eafdc117413a..9ca5930475ba 100644 --- a/include/uapi/sound/lsm_params.h +++ b/include/uapi/sound/lsm_params.h @@ -1,6 +1,9 @@ #ifndef _UAPI_LSM_PARAMS_H__ #define _UAPI_LSM_PARAMS_H__ +#define LSM_POLLING_ENABLE_SUPPORT +#define LSM_EVENT_TIMESTAMP_MODE_SUPPORT + #include <linux/types.h> #include <sound/asound.h> @@ -18,6 +21,19 @@ #define LSM_OUT_TRANSFER_MODE_RT (0) #define LSM_OUT_TRANSFER_MODE_FTRT (1) +#define LSM_ENDPOINT_DETECT_THRESHOLD (0) +#define LSM_OPERATION_MODE (1) +#define LSM_GAIN (2) +#define LSM_MIN_CONFIDENCE_LEVELS (3) +#define LSM_REG_SND_MODEL (4) +#define LSM_DEREG_SND_MODEL (5) +#define LSM_CUSTOM_PARAMS (6) +#define LSM_POLLING_ENABLE (7) +#define LSM_PARAMS_MAX (LSM_POLLING_ENABLE + 1) + +#define LSM_EVENT_NON_TIME_STAMP_MODE (0) +#define LSM_EVENT_TIME_STAMP_MODE (1) + enum lsm_app_id { LSM_VOICE_WAKEUP_APP_ID = 1, LSM_VOICE_WAKEUP_APP_ID_V2 = 2, @@ -35,18 +51,6 @@ enum lsm_vw_status { LSM_VOICE_WAKEUP_STATUS_REJECTED }; -enum LSM_PARAM_TYPE { - LSM_ENDPOINT_DETECT_THRESHOLD = 0, - LSM_OPERATION_MODE, - LSM_GAIN, - LSM_MIN_CONFIDENCE_LEVELS, - LSM_REG_SND_MODEL, - LSM_DEREG_SND_MODEL, - LSM_CUSTOM_PARAMS, - /* driver ioctl will parse only so many params */ - LSM_PARAMS_MAX, -}; - /* * Data for LSM_ENDPOINT_DETECT_THRESHOLD param_type * @epd_begin: Begin threshold @@ -75,6 +79,14 @@ struct snd_lsm_gain { __u16 gain; }; +/* + * Data for LSM_POLLING_ENABLE param_type + * @poll_en: Polling enable or disable + */ +struct snd_lsm_poll_enable { + bool poll_en; +}; + struct snd_lsm_sound_model_v2 { __u8 __user *data; @@ -95,11 +107,20 @@ struct snd_lsm_event_status { __u8 payload[0]; }; +struct snd_lsm_event_status_v3 { + __u32 timestamp_lsw; + __u32 timestamp_msw; + __u16 status; + __u16 payload_size; + __u8 payload[0]; +}; + struct snd_lsm_detection_params { __u8 *conf_level; enum lsm_detection_mode detect_mode; __u8 num_confidence_levels; bool detect_failure; + bool poll_enable; }; /* @@ -122,7 +143,7 @@ struct lsm_params_info { __u32 param_id; __u32 param_size; __u8 __user *param_data; - enum LSM_PARAM_TYPE param_type; + uint32_t param_type; }; /* @@ -171,5 +192,9 @@ struct snd_lsm_output_format_cfg { struct snd_lsm_module_params) #define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, \ struct snd_lsm_output_format_cfg) +#define SNDRV_LSM_SET_PORT _IO('U', 0x0D) +#define SNDRV_LSM_SET_FWK_MODE_CONFIG _IOW('U', 0x0E, uint32_t) +#define SNDRV_LSM_EVENT_STATUS_V3 _IOW('U', 0x0F, \ + struct snd_lsm_event_status_v3) #endif |