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path: root/drivers/crypto/msm/qce50.c
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Diffstat (limited to 'drivers/crypto/msm/qce50.c')
-rw-r--r--drivers/crypto/msm/qce50.c52
1 files changed, 38 insertions, 14 deletions
diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c
index 61f99370863d..3562de7fc967 100644
--- a/drivers/crypto/msm/qce50.c
+++ b/drivers/crypto/msm/qce50.c
@@ -84,6 +84,8 @@ static LIST_HEAD(qce50_bam_list);
/* Index to point the dummy request */
#define DUMMY_REQ_INDEX MAX_QCE_BAM_REQ
+#define TOTAL_IOVEC_SPACE_PER_PIPE (QCE_MAX_NUM_DSCR * sizeof(struct sps_iovec))
+
enum qce_owner {
QCE_OWNER_NONE = 0,
QCE_OWNER_CLIENT = 1,
@@ -92,7 +94,6 @@ enum qce_owner {
struct dummy_request {
struct qce_sha_req sreq;
- uint8_t *in_buf;
struct scatterlist sg;
struct ahash_request areq;
};
@@ -110,6 +111,8 @@ struct qce_device {
unsigned char *coh_vmem; /* Allocated coherent virtual memory */
dma_addr_t coh_pmem; /* Allocated coherent physical memory */
int memsize; /* Memory allocated */
+ unsigned char *iovec_vmem; /* Allocate iovec virtual memory */
+ int iovec_memsize; /* Memory allocated */
uint32_t bam_mem; /* bam physical address, from DT */
uint32_t bam_mem_size; /* bam io size, from DT */
int is_shared; /* CE HW is shared */
@@ -150,6 +153,7 @@ struct qce_device {
atomic_t bunch_cmd_seq;
atomic_t last_intr_seq;
bool cadence_flag;
+ uint8_t *dummyreq_in_buf;
};
static void print_notify_debug(struct sps_event_notify *notify);
@@ -4299,24 +4303,30 @@ static int qce_setup_ce_sps_data(struct qce_device *pce_dev)
{
unsigned char *vaddr;
int i;
+ unsigned char *iovec_vaddr;
+ int iovec_memsize;
vaddr = pce_dev->coh_vmem;
vaddr = (unsigned char *)ALIGN(((uintptr_t)vaddr),
pce_dev->ce_bam_info.ce_burst_size);
+ iovec_vaddr = pce_dev->iovec_vmem;
+ iovec_memsize = pce_dev->iovec_memsize;
for (i = 0; i < MAX_QCE_ALLOC_BAM_REQ; i++) {
/* Allow for 256 descriptor (cmd and data) entries per pipe */
pce_dev->ce_request_info[i].ce_sps.in_transfer.iovec =
- (struct sps_iovec *)vaddr;
+ (struct sps_iovec *)iovec_vaddr;
pce_dev->ce_request_info[i].ce_sps.in_transfer.iovec_phys =
- (uintptr_t)GET_PHYS_ADDR(vaddr);
- vaddr += QCE_MAX_NUM_DSCR * sizeof(struct sps_iovec);
-
+ virt_to_phys(pce_dev->ce_request_info[i].
+ ce_sps.in_transfer.iovec);
+ iovec_vaddr += TOTAL_IOVEC_SPACE_PER_PIPE;
+ iovec_memsize -= TOTAL_IOVEC_SPACE_PER_PIPE;
pce_dev->ce_request_info[i].ce_sps.out_transfer.iovec =
- (struct sps_iovec *)vaddr;
+ (struct sps_iovec *)iovec_vaddr;
pce_dev->ce_request_info[i].ce_sps.out_transfer.iovec_phys =
- (uintptr_t)GET_PHYS_ADDR(vaddr);
- vaddr += QCE_MAX_NUM_DSCR * sizeof(struct sps_iovec);
-
+ virt_to_phys(pce_dev->ce_request_info[i].
+ ce_sps.out_transfer.iovec);
+ iovec_vaddr += TOTAL_IOVEC_SPACE_PER_PIPE;
+ iovec_memsize -= TOTAL_IOVEC_SPACE_PER_PIPE;
if (pce_dev->support_cmd_dscr)
qce_setup_cmdlistptrs(pce_dev, i, &vaddr);
vaddr = (unsigned char *)ALIGN(((uintptr_t)vaddr),
@@ -4341,9 +4351,8 @@ static int qce_setup_ce_sps_data(struct qce_device *pce_dev)
(uintptr_t)vaddr;
vaddr += pce_dev->ce_bam_info.ce_burst_size * 2;
}
- pce_dev->dummyreq.in_buf = (uint8_t *)vaddr;
- vaddr += DUMMY_REQ_DATA_LEN;
- if ((vaddr - pce_dev->coh_vmem) > pce_dev->memsize)
+ if ((vaddr - pce_dev->coh_vmem) > pce_dev->memsize ||
+ iovec_memsize < 0)
panic("qce50: Not enough coherent memory. Allocate %x , need %lx\n",
pce_dev->memsize, (uintptr_t)vaddr -
(uintptr_t)pce_dev->coh_vmem);
@@ -5876,8 +5885,8 @@ static int setup_dummy_req(struct qce_device *pce_dev)
"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopqopqrpqrs";
int len = DUMMY_REQ_DATA_LEN;
- memcpy(pce_dev->dummyreq.in_buf, input, len);
- sg_set_buf(&pce_dev->dummyreq.sg, pce_dev->dummyreq.in_buf, len);
+ memcpy(pce_dev->dummyreq_in_buf, input, len);
+ sg_set_buf(&pce_dev->dummyreq.sg, pce_dev->dummyreq_in_buf, len);
sg_mark_end(&pce_dev->dummyreq.sg);
pce_dev->dummyreq.sreq.alg = QCE_HASH_SHA1;
@@ -5933,12 +5942,23 @@ void *qce_open(struct platform_device *pdev, int *rc)
pce_dev->memsize = 10 * PAGE_SIZE * MAX_QCE_ALLOC_BAM_REQ;
pce_dev->coh_vmem = dma_alloc_coherent(pce_dev->pdev,
pce_dev->memsize, &pce_dev->coh_pmem, GFP_KERNEL);
+
if (pce_dev->coh_vmem == NULL) {
*rc = -ENOMEM;
pr_err("Can not allocate coherent memory for sps data\n");
goto err_iobase;
}
+ pce_dev->iovec_memsize = TOTAL_IOVEC_SPACE_PER_PIPE *
+ MAX_QCE_ALLOC_BAM_REQ * 2;
+ pce_dev->iovec_vmem = kzalloc(pce_dev->iovec_memsize, GFP_KERNEL);
+ if (pce_dev->iovec_vmem == NULL)
+ goto err_mem;
+
+ pce_dev->dummyreq_in_buf = kzalloc(DUMMY_REQ_DATA_LEN, GFP_KERNEL);
+ if (pce_dev->dummyreq_in_buf == NULL)
+ goto err_mem;
+
*rc = __qce_init_clk(pce_dev);
if (*rc)
goto err_mem;
@@ -5978,6 +5998,8 @@ err_enable_clk:
__qce_deinit_clk(pce_dev);
err_mem:
+ kfree(pce_dev->dummyreq_in_buf);
+ kfree(pce_dev->iovec_vmem);
if (pce_dev->coh_vmem)
dma_free_coherent(pce_dev->pdev, pce_dev->memsize,
pce_dev->coh_vmem, pce_dev->coh_pmem);
@@ -6008,6 +6030,8 @@ int qce_close(void *handle)
if (pce_dev->coh_vmem)
dma_free_coherent(pce_dev->pdev, pce_dev->memsize,
pce_dev->coh_vmem, pce_dev->coh_pmem);
+ kfree(pce_dev->dummyreq_in_buf);
+ kfree(pce_dev->iovec_vmem);
qce_disable_clk(pce_dev);
__qce_deinit_clk(pce_dev);