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path: root/drivers/clk/qcom/gcc-sdm660.c
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Diffstat (limited to 'drivers/clk/qcom/gcc-sdm660.c')
-rw-r--r--drivers/clk/qcom/gcc-sdm660.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index b55310e091af..251acafca196 100644
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -732,6 +732,7 @@ static struct clk_rcg2 gp3_clk_src = {
};
static const struct freq_tbl ftbl_hmss_gpll0_clk_src[] = {
+ F(300000000, P_GPLL0_OUT_MAIN, 2, 0, 0),
F(600000000, P_GPLL0_OUT_MAIN, 1, 0, 0),
{ }
};
@@ -2755,6 +2756,9 @@ static int gcc_660_probe(struct platform_device *pdev)
/* Keep bimc gfx clock port on all the time */
clk_prepare_enable(gcc_bimc_gfx_clk.clkr.hw.clk);
+ /* Set the HMSS_GPLL0_SRC for 300MHz to CPU subsystem */
+ clk_set_rate(hmss_gpll0_clk_src.clkr.hw.clk, 300000000);
+
dev_info(&pdev->dev, "Registered GCC clocks\n");
return ret;
@@ -2954,6 +2958,9 @@ static const char *const debug_mux_parent_names[] = {
"mmss_video_axi_clk",
"mmss_video_core_clk",
"mmss_video_subcore0_clk",
+ "mmss_throttle_camss_axi_clk",
+ "mmss_throttle_mdss_axi_clk",
+ "mmss_throttle_video_axi_clk",
"gpucc_gfx3d_clk",
"gpucc_rbbmtimer_clk",
"gpucc_rbcpr_clk",
@@ -3219,6 +3226,12 @@ static struct clk_debug_mux gcc_debug_mux = {
0x00E, 0, 0, 0x1000, BM(14, 13) },
{ "mmss_video_subcore0_clk", 0x22, MMCC,
0x01A, 0, 0, 0x1000, BM(14, 13) },
+ { "mmss_throttle_camss_axi_clk", 0x22, MMCC,
+ 0x0AA, 0, 0, 0x1000, BM(14, 13) },
+ { "mmss_throttle_mdss_axi_clk", 0x22, MMCC,
+ 0x0AB, 0, 0, 0x1000, BM(14, 13) },
+ { "mmss_throttle_video_axi_clk", 0x22, MMCC,
+ 0x0AC, 0, 0, 0x1000, BM(14, 13) },
{ "gpucc_gfx3d_clk", 0x13d, GPU,
0x008, 0, 0, 0, BM(18, 17) },
{ "gpucc_rbbmtimer_clk", 0x13d, GPU,