diff options
103 files changed, 2891 insertions, 3768 deletions
diff --git a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt index 0299b1aef2b6..52ffbe5c7207 100644 --- a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt +++ b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt @@ -37,8 +37,8 @@ Required properties: "display_2" = DISPLAY_2 - qcom,mdss-dsi-panel-timings: An array of length 12 that specifies the PHY timing settings for the panel. -- qcom,mdss-dsi-panel-timings-8996: An array of length 40 char that specifies the 8996 PHY lane - timing settings for the panel. +- qcom,mdss-dsi-panel-timings-phy-v2: An array of length 40 char that specifies the PHY version 2 + lane timing settings for the panel. - qcom,mdss-dsi-on-command: A byte stream formed by multiple dcs packets base on qcom dsi controller protocol. byte 0: dcs data type @@ -638,7 +638,7 @@ Example: qcom,mdss-mdp-transfer-time-us = <12500>; qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33 22 27 1e 03 04 00]; - qcom,mdss-dsi-panel-timings-8996 = [23 20 06 09 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 diff --git a/Documentation/devicetree/bindings/power/qcom-charger/qpnp-fg-gen3.txt b/Documentation/devicetree/bindings/power/qcom-charger/qpnp-fg-gen3.txt index ac63b3c3bf01..35d8d0d7d50b 100644 --- a/Documentation/devicetree/bindings/power/qcom-charger/qpnp-fg-gen3.txt +++ b/Documentation/devicetree/bindings/power/qcom-charger/qpnp-fg-gen3.txt @@ -273,6 +273,45 @@ First Level Node - FG Gen3 device is specified, then ESR to Rslow scaling factors will be updated to account it for an accurate ESR. +- qcom,fg-esr-filter-switch-temp + Usage: optional + Value type: <u32> + Definition: Battery temperature threshold below which low temperature + ESR filter coefficients will be switched to normal + temperature ESR filter coefficients. If this is not + specified, then the default value used will be 100. Unit is + in decidegC. + +- qcom,fg-esr-tight-filter-micro-pct + Usage: optional + Value type: <u32> + Definition: Value in micro percentage for ESR tight filter. If this is + not specified, then a default value of 3907 (0.39 %) will + be used. Lowest possible value is 1954 (0.19 %). + +- qcom,fg-esr-broad-filter-micro-pct + Usage: optional + Value type: <u32> + Definition: Value in micro percentage for ESR broad filter. If this is + not specified, then a default value of 99610 (9.96 %) will + be used. Lowest possible value is 1954 (0.19 %). + +- qcom,fg-esr-tight-lt-filter-micro-pct + Usage: optional + Value type: <u32> + Definition: Value in micro percentage for low temperature ESR tight + filter. If this is not specified, then a default value of + 48829 (4.88 %) will be used. Lowest possible value is 1954 + (0.19 %). + +- qcom,fg-esr-broad-lt-filter-micro-pct + Usage: optional + Value type: <u32> + Definition: Value in micro percentage for low temperature ESR broad + filter. If this is not specified, then a default value of + 148438 (14.84 %) will be used. Lowest possible value is + 1954 (0.19 %). + ========================================================== Second Level Nodes - Peripherals managed by FG Gen3 driver ========================================================== diff --git a/arch/arm/boot/dts/qcom/dsi-adv7533-1080p.dtsi b/arch/arm/boot/dts/qcom/dsi-adv7533-1080p.dtsi index d67922a865fb..7994285f13f1 100644 --- a/arch/arm/boot/dts/qcom/dsi-adv7533-1080p.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-adv7533-1080p.dtsi @@ -64,7 +64,7 @@ qcom,mdss-pan-physical-height-dimension = <90>; qcom,mdss-dsi-force-clock-lane-hs; qcom,mdss-dsi-always-on; - qcom,mdss-dsi-panel-timings-8996 = [1d 1a 03 05 01 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [1d 1a 03 05 01 03 04 a0 1d 1a 03 05 01 03 04 a0 1d 1a 03 05 01 03 04 a0 1d 1a 03 05 01 03 04 a0 diff --git a/arch/arm/boot/dts/qcom/dsi-adv7533-720p.dtsi b/arch/arm/boot/dts/qcom/dsi-adv7533-720p.dtsi index f6a42b430b58..b84488c0cef3 100644 --- a/arch/arm/boot/dts/qcom/dsi-adv7533-720p.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-adv7533-720p.dtsi @@ -63,7 +63,7 @@ dsi_adv7533_720p: qcom,mdss_dsi_adv7533_720p { qcom,mdss-pan-physical-height-dimension = <90>; qcom,mdss-dsi-force-clock-lane-hs; qcom,mdss-dsi-always-on; - qcom,mdss-dsi-panel-timings-8996 = [1c 19 02 03 01 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [1c 19 02 03 01 03 04 a0 1c 19 02 03 01 03 04 a0 1c 19 02 03 01 03 04 a0 1c 19 02 03 01 03 04 a0 diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi new file mode 100644 index 000000000000..7a3660a3b480 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi @@ -0,0 +1,266 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + dsi_nt35597_truly_dsc_video: qcom,mdss_dsi_nt35597_dsc_cmd_truly { + qcom,mdss-dsi-panel-name = + "nt35597 cmd mode dsi truly panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <2560>; + qcom,mdss-dsi-h-front-porch = <100>; + qcom,mdss-dsi-h-back-porch = <32>; + qcom,mdss-dsi-h-pulse-width = <16>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <8>; + qcom,mdss-dsi-v-front-porch = <10>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [ + /* CMD2_P0 */ + 15 01 00 00 10 00 02 ff 20 + 15 01 00 00 10 00 02 fb 01 + 15 01 00 00 10 00 02 00 01 + 15 01 00 00 10 00 02 01 55 + 15 01 00 00 10 00 02 02 45 + 15 01 00 00 10 00 02 05 40 + 15 01 00 00 10 00 02 06 19 + 15 01 00 00 10 00 02 07 1e + 15 01 00 00 10 00 02 0b 73 + 15 01 00 00 10 00 02 0c 73 + 15 01 00 00 10 00 02 0e b0 + 15 01 00 00 10 00 02 0f ae + 15 01 00 00 10 00 02 11 b8 + 15 01 00 00 10 00 02 13 00 + 15 01 00 00 10 00 02 58 80 + 15 01 00 00 10 00 02 59 01 + 15 01 00 00 10 00 02 5a 00 + 15 01 00 00 10 00 02 5b 01 + 15 01 00 00 10 00 02 5c 80 + 15 01 00 00 10 00 02 5d 81 + 15 01 00 00 10 00 02 5e 00 + 15 01 00 00 10 00 02 5f 01 + 15 01 00 00 10 00 02 72 31 + 15 01 00 00 10 00 02 68 03 + /* CMD2_P4 */ + 15 01 00 00 10 00 02 ff 24 + 15 01 00 00 10 00 02 fb 01 + 15 01 00 00 10 00 02 00 1c + 15 01 00 00 10 00 02 01 0b + 15 01 00 00 10 00 02 02 0c + 15 01 00 00 10 00 02 03 01 + 15 01 00 00 10 00 02 04 0f + 15 01 00 00 10 00 02 05 10 + 15 01 00 00 10 00 02 06 10 + 15 01 00 00 10 00 02 07 10 + 15 01 00 00 10 00 02 08 89 + 15 01 00 00 10 00 02 09 8a + 15 01 00 00 10 00 02 0a 13 + 15 01 00 00 10 00 02 0b 13 + 15 01 00 00 10 00 02 0c 15 + 15 01 00 00 10 00 02 0d 15 + 15 01 00 00 10 00 02 0e 17 + 15 01 00 00 10 00 02 0f 17 + 15 01 00 00 10 00 02 10 1c + 15 01 00 00 10 00 02 11 0b + 15 01 00 00 10 00 02 12 0c + 15 01 00 00 10 00 02 13 01 + 15 01 00 00 10 00 02 14 0f + 15 01 00 00 10 00 02 15 10 + 15 01 00 00 10 00 02 16 10 + 15 01 00 00 10 00 02 17 10 + 15 01 00 00 10 00 02 18 89 + 15 01 00 00 10 00 02 19 8a + 15 01 00 00 10 00 02 1a 13 + 15 01 00 00 10 00 02 1b 13 + 15 01 00 00 10 00 02 1c 15 + 15 01 00 00 10 00 02 1d 15 + 15 01 00 00 10 00 02 1e 17 + 15 01 00 00 10 00 02 1f 17 + /* STV */ + 15 01 00 00 10 00 02 20 40 + 15 01 00 00 10 00 02 21 01 + 15 01 00 00 10 00 02 22 00 + 15 01 00 00 10 00 02 23 40 + 15 01 00 00 10 00 02 24 40 + 15 01 00 00 10 00 02 25 6d + 15 01 00 00 10 00 02 26 40 + 15 01 00 00 10 00 02 27 40 + /* Vend */ + 15 01 00 00 10 00 02 e0 00 + 15 01 00 00 10 00 02 dc 21 + 15 01 00 00 10 00 02 dd 22 + 15 01 00 00 10 00 02 de 07 + 15 01 00 00 10 00 02 df 07 + 15 01 00 00 10 00 02 e3 6D + 15 01 00 00 10 00 02 e1 07 + 15 01 00 00 10 00 02 e2 07 + /* UD */ + 15 01 00 00 10 00 02 29 d8 + 15 01 00 00 10 00 02 2a 2a + /* CLK */ + 15 01 00 00 10 00 02 4b 03 + 15 01 00 00 10 00 02 4c 11 + 15 01 00 00 10 00 02 4d 10 + 15 01 00 00 10 00 02 4e 01 + 15 01 00 00 10 00 02 4f 01 + 15 01 00 00 10 00 02 50 10 + 15 01 00 00 10 00 02 51 00 + 15 01 00 00 10 00 02 52 80 + 15 01 00 00 10 00 02 53 00 + 15 01 00 00 10 00 02 56 00 + 15 01 00 00 10 00 02 54 07 + 15 01 00 00 10 00 02 58 07 + 15 01 00 00 10 00 02 55 25 + /* Reset XDONB */ + 15 01 00 00 10 00 02 5b 43 + 15 01 00 00 10 00 02 5c 00 + 15 01 00 00 10 00 02 5f 73 + 15 01 00 00 10 00 02 60 73 + 15 01 00 00 10 00 02 63 22 + 15 01 00 00 10 00 02 64 00 + 15 01 00 00 10 00 02 67 08 + 15 01 00 00 10 00 02 68 04 + /* Resolution:1440x2560*/ + 15 01 00 00 10 00 02 72 02 + /* mux */ + 15 01 00 00 10 00 02 7a 80 + 15 01 00 00 10 00 02 7b 91 + 15 01 00 00 10 00 02 7c D8 + 15 01 00 00 10 00 02 7d 60 + 15 01 00 00 10 00 02 7f 15 + 15 01 00 00 10 00 02 75 15 + /* ABOFF */ + 15 01 00 00 10 00 02 b3 C0 + 15 01 00 00 10 00 02 b4 00 + 15 01 00 00 10 00 02 b5 00 + /* Source EQ */ + 15 01 00 00 10 00 02 78 00 + 15 01 00 00 10 00 02 79 00 + 15 01 00 00 10 00 02 80 00 + 15 01 00 00 10 00 02 83 00 + /* FP BP */ + 15 01 00 00 10 00 02 93 0a + 15 01 00 00 10 00 02 94 0a + /* Inversion Type */ + 15 01 00 00 10 00 02 8a 00 + 15 01 00 00 10 00 02 9b ff + /* IMGSWAP =1 @PortSwap=1 */ + 15 01 00 00 10 00 02 9d b0 + 15 01 00 00 10 00 02 9f 63 + 15 01 00 00 10 00 02 98 10 + /* FRM */ + 15 01 00 00 10 00 02 ec 00 + /* CMD1 */ + 15 01 00 00 10 00 02 ff 10 + /* VESA DSC PPS settings(1440x2560 slide 16H) */ + 39 01 00 00 10 00 11 c1 09 20 00 10 02 00 02 68 + 01 bb 00 0a 06 67 04 c5 + 39 01 00 00 10 00 03 c2 10 f0 + /* C0h = 0x0(2 Port SDC)0x01(1 PortA FBC) + * 0x02(MTK) 0x03(1 PortA VESA) + */ + 15 01 00 00 10 00 02 c0 03 + /* VBP+VSA=,VFP = 10H */ + 15 01 00 00 10 00 04 3b 03 0a 0a + /* FTE on */ + 15 01 00 00 10 00 02 35 00 + /* EN_BK =1(auto black) */ + 15 01 00 00 10 00 02 e5 01 + /* CMD mode(10) VDO mode(03) */ + 15 01 00 00 10 00 02 bb 10 + /* Non Reload MTP */ + 15 01 00 00 10 00 02 fb 01 + /* SlpOut + DispOn */ + 05 01 00 00 a0 00 02 11 00 + 05 01 00 00 a0 00 02 29 00 + ]; + qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03 + 04 00]; + qcom,mdss-dsi-t-clk-post = <0x0b>; + qcom,mdss-dsi-t-clk-pre = <0x23>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,ulps-enabled; + + qcom,compression-mode = "dsc"; + qcom,config-select = <&dsi_nt35597_truly_dsc_cmd_config0>; + + dsi_nt35597_truly_dsc_cmd_config0: config0 { + qcom,mdss-dsc-encoders = <1>; + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + + dsi_nt35597_truly_dsc_cmd_config1: config1 { + qcom,lm-split = <720 720>; + qcom,mdss-dsc-encoders = <1>; /* 3D Mux */ + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + + dsi_nt35597_truly_dsc_cmd_config2: config2 { + qcom,lm-split = <720 720>; + qcom,mdss-dsc-encoders = <2>; /* DSC Merge */ + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi new file mode 100644 index 000000000000..ca2ff6eb4924 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi @@ -0,0 +1,252 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + dsi_nt35597_truly_dsc_video: qcom,mdss_dsi_nt35597_dsc_video_truly { + qcom,mdss-dsi-panel-name = + "nt35597 video mode dsi truly panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <2560>; + qcom,mdss-dsi-h-front-porch = <100>; + qcom,mdss-dsi-h-back-porch = <32>; + qcom,mdss-dsi-h-pulse-width = <16>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <8>; + qcom,mdss-dsi-v-front-porch = <10>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [ + /* CMD2_P0 */ + 15 01 00 00 10 00 02 ff 20 + 15 01 00 00 10 00 02 fb 01 + 15 01 00 00 10 00 02 00 01 + 15 01 00 00 10 00 02 01 55 + 15 01 00 00 10 00 02 02 45 + 15 01 00 00 10 00 02 05 40 + 15 01 00 00 10 00 02 06 19 + 15 01 00 00 10 00 02 07 1e + 15 01 00 00 10 00 02 0b 73 + 15 01 00 00 10 00 02 0c 73 + 15 01 00 00 10 00 02 0e b0 + 15 01 00 00 10 00 02 0f aE + 15 01 00 00 10 00 02 11 b8 + 15 01 00 00 10 00 02 13 00 + 15 01 00 00 10 00 02 58 80 + 15 01 00 00 10 00 02 59 01 + 15 01 00 00 10 00 02 5a 00 + 15 01 00 00 10 00 02 5b 01 + 15 01 00 00 10 00 02 5c 80 + 15 01 00 00 10 00 02 5d 81 + 15 01 00 00 10 00 02 5e 00 + 15 01 00 00 10 00 02 5f 01 + 15 01 00 00 10 00 02 72 31 + 15 01 00 00 10 00 02 68 03 + /* CMD2_P4 */ + 15 01 00 00 10 00 02 ff 24 + 15 01 00 00 10 00 02 fb 01 + 15 01 00 00 10 00 02 00 1c + 15 01 00 00 10 00 02 01 0b + 15 01 00 00 10 00 02 02 0c + 15 01 00 00 10 00 02 03 01 + 15 01 00 00 10 00 02 04 0f + 15 01 00 00 10 00 02 05 10 + 15 01 00 00 10 00 02 06 10 + 15 01 00 00 10 00 02 07 10 + 15 01 00 00 10 00 02 08 89 + 15 01 00 00 10 00 02 09 8a + 15 01 00 00 10 00 02 0a 13 + 15 01 00 00 10 00 02 0b 13 + 15 01 00 00 10 00 02 0c 15 + 15 01 00 00 10 00 02 0d 15 + 15 01 00 00 10 00 02 0e 17 + 15 01 00 00 10 00 02 0f 17 + 15 01 00 00 10 00 02 10 1c + 15 01 00 00 10 00 02 11 0b + 15 01 00 00 10 00 02 12 0c + 15 01 00 00 10 00 02 13 01 + 15 01 00 00 10 00 02 14 0f + 15 01 00 00 10 00 02 15 10 + 15 01 00 00 10 00 02 16 10 + 15 01 00 00 10 00 02 17 10 + 15 01 00 00 10 00 02 18 89 + 15 01 00 00 10 00 02 19 8a + 15 01 00 00 10 00 02 1a 13 + 15 01 00 00 10 00 02 1b 13 + 15 01 00 00 10 00 02 1c 15 + 15 01 00 00 10 00 02 1d 15 + 15 01 00 00 10 00 02 1e 17 + 15 01 00 00 10 00 02 1f 17 + /* STV */ + 15 01 00 00 10 00 02 20 40 + 15 01 00 00 10 00 02 21 01 + 15 01 00 00 10 00 02 22 00 + 15 01 00 00 10 00 02 23 40 + 15 01 00 00 10 00 02 24 40 + 15 01 00 00 10 00 02 25 6d + 15 01 00 00 10 00 02 26 40 + 15 01 00 00 10 00 02 27 40 + /* Vend */ + 15 01 00 00 10 00 02 e0 00 + 15 01 00 00 10 00 02 dc 21 + 15 01 00 00 10 00 02 dd 22 + 15 01 00 00 10 00 02 de 07 + 15 01 00 00 10 00 02 df 07 + 15 01 00 00 10 00 02 e3 6d + 15 01 00 00 10 00 02 e1 07 + 15 01 00 00 10 00 02 e2 07 + /* UD */ + 15 01 00 00 10 00 02 29 d8 + 15 01 00 00 10 00 02 2a 2a + /* CLK */ + 15 01 00 00 10 00 02 4b 03 + 15 01 00 00 10 00 02 4c 11 + 15 01 00 00 10 00 02 4d 10 + 15 01 00 00 10 00 02 4e 01 + 15 01 00 00 10 00 02 4f 01 + 15 01 00 00 10 00 02 50 10 + 15 01 00 00 10 00 02 51 00 + 15 01 00 00 10 00 02 52 80 + 15 01 00 00 10 00 02 53 00 + 15 01 00 00 10 00 02 56 00 + 15 01 00 00 10 00 02 54 07 + 15 01 00 00 10 00 02 58 07 + 15 01 00 00 10 00 02 55 25 + /* Reset XDONB */ + 15 01 00 00 10 00 02 5b 43 + 15 01 00 00 10 00 02 5c 00 + 15 01 00 00 10 00 02 5f 73 + 15 01 00 00 10 00 02 60 73 + 15 01 00 00 10 00 02 63 22 + 15 01 00 00 10 00 02 64 00 + 15 01 00 00 10 00 02 67 08 + 15 01 00 00 10 00 02 68 04 + /* Resolution:1440x2560*/ + 15 01 00 00 10 00 02 72 02 + /* mux */ + 15 01 00 00 10 00 02 7a 80 + 15 01 00 00 10 00 02 7b 91 + 15 01 00 00 10 00 02 7c d8 + 15 01 00 00 10 00 02 7d 60 + 15 01 00 00 10 00 02 7f 15 + 15 01 00 00 10 00 02 75 15 + /* ABOFF */ + 15 01 00 00 10 00 02 b3 c0 + 15 01 00 00 10 00 02 b4 00 + 15 01 00 00 10 00 02 b5 00 + /* Source EQ */ + 15 01 00 00 10 00 02 78 00 + 15 01 00 00 10 00 02 79 00 + 15 01 00 00 10 00 02 80 00 + 15 01 00 00 10 00 02 83 00 + /* FP BP */ + 15 01 00 00 10 00 02 93 0a + 15 01 00 00 10 00 02 94 0a + /* Inversion Type */ + 15 01 00 00 10 00 02 8a 00 + 15 01 00 00 10 00 02 9b ff + /* IMGSWAP =1 @PortSwap=1 */ + 15 01 00 00 10 00 02 9d b0 + 15 01 00 00 10 00 02 9f 63 + 15 01 00 00 10 00 02 98 10 + /* FRM */ + 15 01 00 00 10 00 02 ec 00 + /* CMD1 */ + 15 01 00 00 10 00 02 ff 10 + /* VESA DSC PPS settings(1440x2560 slide 16H) */ + 39 01 00 00 10 00 11 c1 09 20 00 10 02 00 02 68 01 + bb 00 0a 06 67 04 c5 + 39 01 00 00 10 00 03 c2 10 f0 + /* C0h = 0x00(2 Port SDC); 0x01(1 PortA FBC); + * 0x02(MTK); 0x03(1 PortA VESA) + */ + 15 01 00 00 10 00 02 c0 03 + /* VBP+VSA=,VFP = 10H */ + 39 01 00 00 10 00 04 3b 03 0a 0a + /* FTE on */ + 15 01 00 00 10 00 02 35 00 + /* EN_BK =1(auto black) */ + 15 01 00 00 10 00 02 e5 01 + /* CMD mode(10) VDO mode(03) */ + 15 01 00 00 10 00 02 bb 03 + /* Non Reload MTP */ + 15 01 00 00 10 00 02 fb 01 + /* SlpOut + DispOn */ + 05 01 00 00 a0 00 02 11 00 + 05 01 00 00 a0 00 02 29 00 + ]; + qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [00 11 04 04 07 0c 04 04 03 03 + 04 00]; + qcom,mdss-dsi-t-clk-post = <0xb>; + qcom,mdss-dsi-t-clk-pre = <0x23>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <74>; + qcom,mdss-pan-physical-height-dimension = <131>; + + qcom,compression-mode = "dsc"; + qcom,config-select = <&dsi_nt35597_truly_dsc_video_config0>; + + dsi_nt35597_truly_dsc_video_config0: config0 { + qcom,mdss-dsc-encoders = <1>; + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + + dsi_nt35597_truly_dsc_video_config1: config1 { + qcom,lm-split = <720 720>; + qcom,mdss-dsc-encoders = <1>; /* 3D Mux */ + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + + dsi_nt35597_truly_dsc_video_config2: config2 { + qcom,lm-split = <720 720>; + qcom,mdss-dsc-encoders = <2>; /* DSC Merge */ + qcom,mdss-dsc-slice-height = <16>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <2>; + + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi new file mode 100644 index 000000000000..7774a28ff495 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi @@ -0,0 +1,416 @@ +/* Copyright (c) 2017, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + dsi_dual_nt36850_truly_cmd: qcom,mdss_dsi_nt36850_truly_wqhd_cmd{ + qcom,mdss-dsi-panel-name = + "Dual nt36850 cmd mode dsi truly panel without DSC"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <720>; + qcom,mdss-dsi-panel-height = <2560>; + qcom,mdss-dsi-h-front-porch = <120>; + qcom,mdss-dsi-h-back-porch = <140>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <20>; + qcom,mdss-dsi-v-front-porch = <8>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [ + 15 01 00 00 00 00 02 ff 24 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 00 19 + 15 01 00 00 00 00 02 01 03 + 15 01 00 00 00 00 02 02 04 + 15 01 00 00 00 00 02 03 1b + 15 01 00 00 00 00 02 04 1d + 15 01 00 00 00 00 02 05 01 + 15 01 00 00 00 00 02 06 0c + 15 01 00 00 00 00 02 07 0f + 15 01 00 00 00 00 02 08 1f + 15 01 00 00 00 00 02 09 00 + 15 01 00 00 00 00 02 0a 00 + 15 01 00 00 00 00 02 0b 13 + 15 01 00 00 00 00 02 0c 16 + 15 01 00 00 00 00 02 0d 14 + 15 01 00 00 00 00 02 0e 15 + 15 01 00 00 00 00 02 0f 00 + 15 01 00 00 00 00 02 10 19 + 15 01 00 00 00 00 02 11 03 + 15 01 00 00 00 00 02 12 04 + 15 01 00 00 00 00 02 13 1b + 15 01 00 00 00 00 02 14 1d + 15 01 00 00 00 00 02 15 01 + 15 01 00 00 00 00 02 16 0c + 15 01 00 00 00 00 02 17 0f + 15 01 00 00 00 00 02 18 1f + 15 01 00 00 00 00 02 19 00 + 15 01 00 00 00 00 02 1a 00 + 15 01 00 00 00 00 02 1b 13 + 15 01 00 00 00 00 02 1c 16 + 15 01 00 00 00 00 02 1d 14 + 15 01 00 00 00 00 02 1e 15 + 15 01 00 00 00 00 02 1f 00 + 15 01 00 00 00 00 02 21 01 + 15 01 00 00 00 00 02 22 10 + 15 01 00 00 00 00 02 23 28 + 15 01 00 00 00 00 02 24 28 + 15 01 00 00 00 00 02 25 5d + 15 01 00 00 00 00 02 26 28 + 15 01 00 00 00 00 02 27 28 + 15 01 00 00 00 00 02 29 d8 + 15 01 00 00 00 00 02 2a 15 + 15 01 00 00 00 00 02 2b 00 + 15 01 00 00 00 00 02 2d 00 + 15 01 00 00 00 00 02 2f 02 + 15 01 00 00 00 00 02 30 02 + 15 01 00 00 00 00 02 31 00 + 15 01 00 00 00 00 02 32 23 + 15 01 00 00 00 00 02 33 01 + 15 01 00 00 00 00 02 34 03 + 15 01 00 00 00 00 02 35 49 + 15 01 00 00 00 00 02 36 00 + 15 01 00 00 00 00 02 37 1d + 15 01 00 00 00 00 02 38 08 + 15 01 00 00 00 00 02 39 03 + 15 01 00 00 00 00 02 3a 49 + 15 01 00 00 00 00 02 42 01 + 15 01 00 00 00 00 02 43 8c + 15 01 00 00 00 00 02 44 a3 + 15 01 00 00 00 00 02 48 8c + 15 01 00 00 00 00 02 49 a3 + 15 01 00 00 00 00 02 5b 00 + 15 01 00 00 00 00 02 5f 4d + 15 01 00 00 00 00 02 63 00 + 15 01 00 00 00 00 02 67 04 + 15 01 00 00 00 00 02 6e 10 + 15 01 00 00 00 00 02 72 02 + 15 01 00 00 00 00 02 73 00 + 15 01 00 00 00 00 02 74 04 + 15 01 00 00 00 00 02 75 1b + 15 01 00 00 00 00 02 76 05 + 15 01 00 00 00 00 02 77 01 + 15 01 00 00 00 00 02 78 00 + 15 01 00 00 00 00 02 79 00 + 15 01 00 00 00 00 02 7a 00 + 15 01 00 00 00 00 02 7b 91 + 15 01 00 00 00 00 02 7c da + 15 01 00 00 00 00 02 7d 10 + 15 01 00 00 00 00 02 7e 04 + 15 01 00 00 00 00 02 7f 1b + 15 01 00 00 00 00 02 80 00 + 15 01 00 00 00 00 02 81 05 + 15 01 00 00 00 00 02 82 01 + 15 01 00 00 00 00 02 83 00 + 15 01 00 00 00 00 02 84 05 + 15 01 00 00 00 00 02 85 05 + 15 01 00 00 00 00 02 86 1b + 15 01 00 00 00 00 02 87 1b + 15 01 00 00 00 00 02 88 1b + 15 01 00 00 00 00 02 89 1b + 15 01 00 00 00 00 02 8a 00 + 15 01 00 00 00 00 02 8b f0 + 15 01 00 00 00 00 02 8c 00 + 15 01 00 00 00 00 02 8f 63 + 15 01 00 00 00 00 02 90 51 + 15 01 00 00 00 00 02 91 40 + 15 01 00 00 00 00 02 92 51 + 15 01 00 00 00 00 02 93 08 + 15 01 00 00 00 00 02 94 08 + 15 01 00 00 00 00 02 95 51 + 15 01 00 00 00 00 02 96 51 + 15 01 00 00 00 00 02 97 00 + 15 01 00 00 00 00 02 98 00 + 15 01 00 00 00 00 02 99 33 + 15 01 00 00 00 00 02 9b ff + 15 01 00 00 00 00 02 9c 01 + 15 01 00 00 00 00 02 9d 30 + 15 01 00 00 00 00 02 a5 10 + 15 01 00 00 00 00 02 a6 01 + 15 01 00 00 00 00 02 a9 21 + 15 01 00 00 00 00 02 b3 2a + 15 01 00 00 00 00 02 b4 da + 15 01 00 00 00 00 02 ba 83 + 15 01 00 00 00 00 02 c4 24 + 15 01 00 00 00 00 02 c5 aa + 15 01 00 00 00 00 02 c6 09 + 15 01 00 00 00 00 02 c7 00 + 15 01 00 00 00 00 02 c9 c0 + 15 01 00 00 00 00 02 ca 04 + 15 01 00 00 00 00 02 d5 3f + 15 01 00 00 00 00 02 d6 10 + 15 01 00 00 00 00 02 d7 3f + 15 01 00 00 00 00 02 d8 10 + 15 01 00 00 00 00 02 d9 ee + 15 01 00 00 00 00 02 da 49 + 15 01 00 00 00 00 02 db 94 + 15 01 00 00 00 00 02 e9 33 + 15 01 00 00 00 00 02 eb 28 + 15 01 00 00 00 00 02 ec 00 + 15 01 00 00 00 00 02 ee 00 + 15 01 00 00 00 00 02 ef 06 + 15 01 00 00 00 00 02 f0 01 + 15 01 00 00 00 00 02 f1 01 + 15 01 00 00 00 00 02 f2 0d + 15 01 00 00 00 00 02 f3 48 + 15 01 00 00 00 00 02 f6 00 + 15 01 00 00 00 00 02 f7 00 + 15 01 00 00 00 00 02 f8 00 + 15 01 00 00 00 00 02 f9 00 + 15 01 00 00 00 00 02 ff 26 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 00 ab + 15 01 00 00 00 00 02 01 00 + 15 01 00 00 00 00 02 02 80 + 15 01 00 00 00 00 02 03 08 + 15 01 00 00 00 00 02 04 01 + 15 01 00 00 00 00 02 05 32 + 15 01 00 00 00 00 02 06 4c + 15 01 00 00 00 00 02 07 26 + 15 01 00 00 00 00 02 08 09 + 15 01 00 00 00 00 02 09 02 + 15 01 00 00 00 00 02 0a 32 + 15 01 00 00 00 00 02 0b 55 + 15 01 00 00 00 00 02 0c 14 + 15 01 00 00 00 00 02 0d 28 + 15 01 00 00 00 00 02 0e 00 + 15 01 00 00 00 00 02 0f 00 + 15 01 00 00 00 00 02 10 00 + 15 01 00 00 00 00 02 11 22 + 15 01 00 00 00 00 02 12 0a + 15 01 00 00 00 00 02 13 20 + 15 01 00 00 00 00 02 14 06 + 15 01 00 00 00 00 02 15 00 + 15 01 00 00 00 00 02 16 40 + 15 01 00 00 00 00 02 19 43 + 15 01 00 00 00 00 02 1a 03 + 15 01 00 00 00 00 02 1b 25 + 15 01 00 00 00 00 02 1c 11 + 15 01 00 00 00 00 02 1d 00 + 15 01 00 00 00 00 02 1e 80 + 15 01 00 00 00 00 02 1f 00 + 15 01 00 00 00 00 02 20 00 + 15 01 00 00 00 00 02 21 03 + 15 01 00 00 00 00 02 22 22 + 15 01 00 00 00 00 02 23 25 + 15 01 00 00 00 00 02 24 00 + 15 01 00 00 00 00 02 25 a7 + 15 01 00 00 00 00 02 26 00 + 15 01 00 00 00 00 02 27 a5 + 15 01 00 00 00 00 02 28 06 + 15 01 00 00 00 00 02 29 85 + 15 01 00 00 00 00 02 2a 3f + 15 01 00 00 00 00 02 2b 97 + 15 01 00 00 00 00 02 2f 25 + 15 01 00 00 00 00 02 30 26 + 15 01 00 00 00 00 02 31 41 + 15 01 00 00 00 00 02 32 04 + 15 01 00 00 00 00 02 33 04 + 15 01 00 00 00 00 02 34 2b + 15 01 00 00 00 00 02 35 00 + 15 01 00 00 00 00 02 36 00 + 15 01 00 00 00 00 02 37 c8 + 15 01 00 00 00 00 02 38 26 + 15 01 00 00 00 00 02 39 25 + 15 01 00 00 00 00 02 3a 26 + 15 01 00 00 00 00 02 3f eb + 15 01 00 00 00 00 02 41 21 + 15 01 00 00 00 00 02 42 03 + 15 01 00 00 00 00 02 43 00 + 15 01 00 00 00 00 02 44 11 + 15 01 00 00 00 00 02 45 00 + 15 01 00 00 00 00 02 46 00 + 15 01 00 00 00 00 02 47 00 + 15 01 00 00 00 00 02 48 00 + 15 01 00 00 00 00 02 49 03 + 15 01 00 00 00 00 02 4a 00 + 15 01 00 00 00 00 02 4b 00 + 15 01 00 00 00 00 02 4c 01 + 15 01 00 00 00 00 02 4d 4e + 15 01 00 00 00 00 02 4e 01 + 15 01 00 00 00 00 02 4f 4c + 15 01 00 00 00 00 02 50 0d + 15 01 00 00 00 00 02 51 0e + 15 01 00 00 00 00 02 52 23 + 15 01 00 00 00 00 02 53 97 + 15 01 00 00 00 00 02 54 4b + 15 01 00 00 00 00 02 55 4c + 15 01 00 00 00 00 02 56 20 + 15 01 00 00 00 00 02 58 04 + 15 01 00 00 00 00 02 59 04 + 15 01 00 00 00 00 02 5a 09 + 15 01 00 00 00 00 02 5b 00 + 15 01 00 00 00 00 02 5c 00 + 15 01 00 00 00 00 02 5d c8 + 15 01 00 00 00 00 02 5e 4c + 15 01 00 00 00 00 02 5f 4b + 15 01 00 00 00 00 02 60 00 + 15 01 00 00 00 00 02 80 2b + 15 01 00 00 00 00 02 81 43 + 15 01 00 00 00 00 02 82 03 + 15 01 00 00 00 00 02 83 25 + 15 01 00 00 00 00 02 84 11 + 15 01 00 00 00 00 02 85 00 + 15 01 00 00 00 00 02 86 80 + 15 01 00 00 00 00 02 87 00 + 15 01 00 00 00 00 02 88 00 + 15 01 00 00 00 00 02 89 03 + 15 01 00 00 00 00 02 8a 22 + 15 01 00 00 00 00 02 8b 25 + 15 01 00 00 00 00 02 8c 00 + 15 01 00 00 00 00 02 8d a4 + 15 01 00 00 00 00 02 8e 00 + 15 01 00 00 00 00 02 8f a2 + 15 01 00 00 00 00 02 90 06 + 15 01 00 00 00 00 02 91 63 + 15 01 00 00 00 00 02 92 30 + 15 01 00 00 00 00 02 93 97 + 15 01 00 00 00 00 02 94 25 + 15 01 00 00 00 00 02 95 26 + 15 01 00 00 00 00 02 96 41 + 15 01 00 00 00 00 02 97 04 + 15 01 00 00 00 00 02 98 04 + 15 01 00 00 00 00 02 99 f0 + 15 01 00 00 00 00 02 9a 00 + 15 01 00 00 00 00 02 9b 00 + 15 01 00 00 00 00 02 9c c8 + 15 01 00 00 00 00 02 9d 50 + 15 01 00 00 00 00 02 9e 26 + 15 01 00 00 00 00 02 9f 25 + 15 01 00 00 00 00 02 a0 26 + 15 01 00 00 00 00 02 a2 00 + 15 01 00 00 00 00 02 a3 33 + 15 01 00 00 00 00 02 a5 40 + 15 01 00 00 00 00 02 a6 40 + 15 01 00 00 00 00 02 ac 91 + 15 01 00 00 00 00 02 ad 66 + 15 01 00 00 00 00 02 ae 66 + 15 01 00 00 00 00 02 b1 40 + 15 01 00 00 00 00 02 b2 40 + 15 01 00 00 00 00 02 b4 40 + 15 01 00 00 00 00 02 b5 40 + 15 01 00 00 00 00 02 b7 40 + 15 01 00 00 00 00 02 b8 40 + 15 01 00 00 00 00 02 ba 22 + 15 01 00 00 00 00 02 bb 00 + 15 01 00 00 00 00 02 c2 01 + 15 01 00 00 00 00 02 c3 01 + 15 01 00 00 00 00 02 c4 01 + 15 01 00 00 00 00 02 c5 01 + 15 01 00 00 00 00 02 c6 01 + 15 01 00 00 00 00 02 c8 00 + 15 01 00 00 00 00 02 c9 00 + 15 01 00 00 00 00 02 ca 00 + 15 01 00 00 00 00 02 cd 00 + 15 01 00 00 00 00 02 ce 00 + 15 01 00 00 00 00 02 d6 04 + 15 01 00 00 00 00 02 d7 00 + 15 01 00 00 00 00 02 d8 0d + 15 01 00 00 00 00 02 d9 00 + 15 01 00 00 00 00 02 da 00 + 15 01 00 00 00 00 02 db 00 + 15 01 00 00 00 00 02 dc 00 + 15 01 00 00 00 00 02 dd 00 + 15 01 00 00 00 00 02 de 00 + 15 01 00 00 00 00 02 df 01 + 15 01 00 00 00 00 02 e0 00 + 15 01 00 00 00 00 02 e1 00 + 15 01 00 00 00 00 02 e2 19 + 15 01 00 00 00 00 02 e3 04 + 15 01 00 00 00 00 02 e4 00 + 15 01 00 00 00 00 02 e5 04 + 15 01 00 00 00 00 02 e6 00 + 15 01 00 00 00 00 02 e7 12 + 15 01 00 00 00 00 02 e8 00 + 15 01 00 00 00 00 02 e9 50 + 15 01 00 00 00 00 02 ea 10 + 15 01 00 00 00 00 02 eb 02 + 15 01 00 00 00 00 02 ff 27 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ff 28 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 60 0a + 15 01 00 00 00 00 02 63 32 + 15 01 00 00 00 00 02 64 01 + 15 01 00 00 00 00 02 68 da + 15 01 00 00 00 00 02 69 00 + 15 01 00 00 00 00 02 ff 29 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 60 0a + 15 01 00 00 00 00 02 63 32 + 15 01 00 00 00 00 02 64 01 + 15 01 00 00 00 00 02 68 da + 15 01 00 00 00 00 02 69 00 + 15 01 00 00 00 00 02 ff e0 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 35 40 + 15 01 00 00 00 00 02 36 40 + 15 01 00 00 00 00 02 37 00 + 15 01 00 00 00 00 02 89 c6 + 15 01 00 00 00 00 02 ff f0 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ea 40 + 15 01 00 00 00 00 02 ff 10 + 15 01 00 00 00 00 02 36 00 + 15 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 03 44 03 e8 + 15 01 00 00 00 00 02 51 ff + 15 01 00 00 00 00 02 53 2c + 15 01 00 00 00 00 02 55 01 + 05 01 00 00 0a 00 02 20 00 + 15 01 00 00 00 00 02 bb 10 + 05 01 00 00 78 00 02 11 00 + 05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-lane-map = "lane_map_0123"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-tx-eot-append; + qcom,cmd-sync-wait-broadcast; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = + [da 34 24 00 64 68 28 38 2a 03 04 00]; + qcom,mdss-dsi-t-clk-pre = <0x29>; + qcom,mdss-dsi-t-clk-post = <0x03>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm-pm660.dtsi b/arch/arm/boot/dts/qcom/msm-pm660.dtsi index 3674e2e5570b..e8e773a33622 100644 --- a/arch/arm/boot/dts/qcom/msm-pm660.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pm660.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -585,8 +585,8 @@ pm660_haptics: qcom,haptic@c000 { compatible = "qcom,qpnp-haptic"; reg = <0xc000 0x100>; - interrupts = <0x1 0xc0 0x0>, - <0x1 0xc0 0x1>; + interrupts = <0x1 0xc0 0x0 IRQ_TYPE_NONE>, + <0x1 0xc0 0x1 IRQ_TYPE_NONE>; interrupt-names = "sc-irq", "play-irq"; qcom,actuator-type = "lra"; qcom,play-mode = "direct"; diff --git a/arch/arm/boot/dts/qcom/msm-pm660l.dtsi b/arch/arm/boot/dts/qcom/msm-pm660l.dtsi index a9820cfbc02c..d0033d5bf3bc 100644 --- a/arch/arm/boot/dts/qcom/msm-pm660l.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pm660l.dtsi @@ -167,6 +167,17 @@ qcom,supported-sizes = <6>, <9>; qcom,ramp-index = <2>; #pwm-cells = <2>; + qcom,period = <6000000>; + + qcom,lpg { + label = "lpg"; + cell-index = <0>; + qcom,duty-percents = + <0x01 0x0a 0x14 0x1e 0x28 0x32 0x3c + 0x46 0x50 0x5a 0x64 + 0x64 0x5a 0x50 0x46 0x3c 0x32 0x28 0x1e + 0x14 0x0a 0x01>; + }; }; pm660l_pwm_4: pwm@b400 { @@ -197,8 +208,12 @@ qcom,max-current = <12>; qcom,default-state = "off"; linux,name = "red"; - linux,default-trigger = - "battery-charging"; + qcom,start-idx = <0>; + qcom,idx-len = <22>; + qcom,duty-pcts = + [01 0a 14 1e 28 32 3c 46 50 5a 64 + 64 5a 50 46 3c 32 28 1e 14 0a 01]; + qcom,use-blink; }; green_led: qcom,rgb_1 { @@ -210,7 +225,6 @@ qcom,max-current = <12>; qcom,default-state = "off"; linux,name = "green"; - linux,default-trigger = "battery-full"; }; blue_led: qcom,rgb_2 { @@ -222,7 +236,6 @@ qcom,max-current = <12>; qcom,default-state = "off"; linux,name = "blue"; - linux,default-trigger = "boot-indication"; }; }; diff --git a/arch/arm/boot/dts/qcom/msm-pmi8998.dtsi b/arch/arm/boot/dts/qcom/msm-pmi8998.dtsi index 99f3f58cc20e..b1880c076e1c 100644 --- a/arch/arm/boot/dts/qcom/msm-pmi8998.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pmi8998.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -618,8 +618,8 @@ status = "disabled"; compatible = "qcom,qpnp-haptic"; reg = <0xc000 0x100>; - interrupts = <0x3 0xc0 0x0>, - <0x3 0xc0 0x1>; + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_NONE>, + <0x3 0xc0 0x1 IRQ_TYPE_NONE>; interrupt-names = "sc-irq", "play-irq"; qcom,actuator-type = "lra"; qcom,play-mode = "direct"; diff --git a/arch/arm/boot/dts/qcom/msm8996-mdss-panels.dtsi b/arch/arm/boot/dts/qcom/msm8996-mdss-panels.dtsi index e62c7fbcc1af..bfb85274846f 100644 --- a/arch/arm/boot/dts/qcom/msm8996-mdss-panels.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-mdss-panels.dtsi @@ -131,7 +131,7 @@ }; &dsi_nt35950_4k_dsc_cmd { - qcom,mdss-dsi-panel-timings-8996 = [21 1e 06 08 04 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 @@ -139,7 +139,7 @@ }; &dsi_sharp_4k_dsc_video { - qcom,mdss-dsi-panel-timings-8996 = [21 1e 06 08 04 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 @@ -147,7 +147,7 @@ }; &dsi_sharp_4k_dsc_cmd { - qcom,mdss-dsi-panel-timings-8996 = [21 1e 06 08 04 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 21 1e 06 08 04 03 04 a0 @@ -155,7 +155,7 @@ }; &dsi_dual_sharp_video { - qcom,mdss-dsi-panel-timings-8996 = [23 20 06 09 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 @@ -163,7 +163,7 @@ }; &dsi_dual_jdi_cmd { - qcom,mdss-dsi-panel-timings-8996 = [22 1e 06 08 04 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 @@ -173,7 +173,7 @@ }; &dsi_dual_jdi_video { - qcom,mdss-dsi-panel-timings-8996 = [22 1e 06 08 04 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 22 1e 06 08 04 03 04 a0 @@ -181,7 +181,7 @@ }; &dsi_dual_sharp_1080_120hz_cmd { - qcom,mdss-dsi-panel-timings-8996 = [23 1e 07 08 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 @@ -189,7 +189,7 @@ }; &dsi_dual_nt35597_video { - qcom,mdss-dsi-panel-timings-8996 = [23 1e 07 08 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 @@ -199,7 +199,7 @@ }; &dsi_dual_nt35597_cmd { - qcom,mdss-dsi-panel-timings-8996 = [23 1e 07 08 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 @@ -209,7 +209,7 @@ }; &dsi_nt35597_dsc_video { - qcom,mdss-dsi-panel-timings-8996 = [20 1d 05 07 03 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 @@ -219,7 +219,7 @@ }; &dsi_nt35597_dsc_cmd { - qcom,mdss-dsi-panel-timings-8996 = [20 1d 05 07 03 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 20 1d 05 07 03 03 04 a0 @@ -229,7 +229,7 @@ }; &dsi_dual_jdi_4k_nofbc_video { - qcom,mdss-dsi-panel-timings-8996 = [ + qcom,mdss-dsi-panel-timings-phy-v2 = [ 2c 27 0e 10 0a 03 04 a0 2c 27 0e 10 0a 03 04 a0 2c 27 0e 10 0a 03 04 a0 @@ -238,14 +238,14 @@ }; &dsi_hx8379a_fwvga_truly_vid { - qcom,mdss-dsi-panel-timings-8996 = [23 20 06 09 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 20 06 09 05 03 04 a0 23 2e 06 08 05 03 04 a0]; }; &dsi_r69007_wqxga_cmd { - qcom,mdss-dsi-panel-timings-8996 = [23 1f 07 09 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 @@ -253,7 +253,7 @@ }; &dsi_sharp_1080_cmd { - qcom,mdss-dsi-panel-timings-8996 = [23 1f 07 09 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 23 1f 07 09 05 03 04 a0 diff --git a/arch/arm/boot/dts/qcom/msm8998-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/qcom/msm8998-camera-sensor-cdp.dtsi index 61fc31a17e52..2cb08e1709a5 100644 --- a/arch/arm/boot/dts/qcom/msm8998-camera-sensor-cdp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-camera-sensor-cdp.dtsi @@ -254,6 +254,7 @@ qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,eeprom-src = <&eeprom1>; + qcom,actuator-src = <&actuator1>; cam_vdig-supply = <&pm8998_lvs1>; cam_vio-supply = <&pm8998_lvs1>; cam_vana-supply = <&pmi8998_bob>; diff --git a/arch/arm/boot/dts/qcom/msm8998-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/qcom/msm8998-camera-sensor-mtp.dtsi index 0bd9ab40e8f1..0a41383ba874 100644 --- a/arch/arm/boot/dts/qcom/msm8998-camera-sensor-mtp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-camera-sensor-mtp.dtsi @@ -254,6 +254,7 @@ qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,eeprom-src = <&eeprom1>; + qcom,actuator-src = <&actuator1>; cam_vdig-supply = <&pm8998_lvs1>; cam_vio-supply = <&pm8998_lvs1>; cam_vana-supply = <&pmi8998_bob>; diff --git a/arch/arm/boot/dts/qcom/msm8998-v2.dtsi b/arch/arm/boot/dts/qcom/msm8998-v2.dtsi index 99975877658d..fa7cdd5194a3 100644 --- a/arch/arm/boot/dts/qcom/msm8998-v2.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-v2.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -298,6 +298,7 @@ &devfreq_memlat_0 { qcom,core-dev-table = + < 300000 1525 >, < 595200 3143 >, < 1324800 4173 >, < 1555200 5859 >, diff --git a/arch/arm/boot/dts/qcom/sdm630.dtsi b/arch/arm/boot/dts/qcom/sdm630.dtsi index e42f78fb7708..2ebabab84f11 100644 --- a/arch/arm/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm/boot/dts/qcom/sdm630.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -875,6 +875,35 @@ label = "rpm"; }; + glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { + compatible = "qcom,glink-spi-xprt"; + label = "wdsp"; + qcom,remote-fifo-config = <&glink_fifo_wdsp>; + qcom,qos-config = <&glink_qos_wdsp>; + qcom,ramp-time = <0x10>, + <0x20>, + <0x30>, + <0x40>; + }; + + glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { + compatible = "qcom,glink-fifo-config"; + qcom,out-read-idx-reg = <0x12000>; + qcom,out-write-idx-reg = <0x12004>; + qcom,in-read-idx-reg = <0x1200c>; + qcom,in-write-idx-reg = <0x12010>; + }; + + glink_qos_wdsp: qcom,glink-qos-config-wdsp { + compatible = "qcom,glink-qos-config"; + qcom,flow-info = <0x80 0x0>, + <0x70 0x1>, + <0x60 0x2>, + <0x50 0x3>; + qcom,mtu-size = <0x800>; + qcom,tput-stats-cycle = <0xa>; + }; + qcom,glink_pkt { compatible = "qcom,glinkpkt"; @@ -1244,6 +1273,7 @@ #include "msm-pm660l.dtsi" #include "msm-pm660-rpm-regulator.dtsi" #include "msm-pm660l-rpm-regulator.dtsi" +#include "sdm660-bus.dtsi" #include "sdm630-regulator.dtsi" #include "msm-gdsc-660.dtsi" #include "sdm660-common.dtsi" diff --git a/arch/arm/boot/dts/qcom/sdm660-mdss-panels.dtsi b/arch/arm/boot/dts/qcom/sdm660-mdss-panels.dtsi index 28e5f6ba8b45..84a99be7371e 100644 --- a/arch/arm/boot/dts/qcom/sdm660-mdss-panels.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-mdss-panels.dtsi @@ -67,7 +67,7 @@ }; &dsi_dual_nt35597_truly_video { - qcom,mdss-dsi-panel-timings-8996 = [23 1e 07 08 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 @@ -75,7 +75,7 @@ }; &dsi_dual_nt35597_truly_cmd { - qcom,mdss-dsi-panel-timings-8996 = [23 1e 07 08 05 03 04 a0 + qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 23 1e 07 08 05 03 04 a0 diff --git a/arch/arm/boot/dts/qcom/sdm660-qrd.dtsi b/arch/arm/boot/dts/qcom/sdm660-qrd.dtsi index 2b53a88f4bf5..a20ea718b815 100644 --- a/arch/arm/boot/dts/qcom/sdm660-qrd.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-qrd.dtsi @@ -103,3 +103,45 @@ &soc { }; + +&pm660l_gpios { + /* GPIO 7 for VOL_UP */ + gpio@c600 { + status = "ok"; + qcom,mode = <0>; + qcom,pull = <0>; + qcom,vin-sel = <0>; + qcom,src-sel = <0>; + qcom,out-strength = <1>; + }; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + status = "ok"; + + vol_up { + label = "volume_up"; + gpios = <&pm660l_gpios 7 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; +}; + +/ { + qrd_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + + #include "fg-gen3-batterydata-qrd-skuk-4v4-3000mah.dtsi" + }; +}; + +&pm660_fg { + qcom,battery-data = <&qrd_batterydata>; + qcom,fg-jeita-thresholds = <0 5 55 55>; +}; diff --git a/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi b/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi index fc88c324e5e2..479a9fdd91ca 100644 --- a/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -10,6 +10,7 @@ * GNU General Public License for more details. */ +#include <dt-bindings/clock/qcom,gcc-sdm660.h> #include <dt-bindings/clock/qcom,gpu-sdm660.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -633,4 +634,158 @@ }; }; }; + + /* APC0 CPR Controller node for Silver cluster */ + apc0_cpr: cprh-ctrl@179c8000 { + compatible = "qcom,cprh-sdm660-kbss-regulator"; + reg = <0x179c8000 0x4000>, <0x00784000 0x1000>; + reg-names = "cpr_ctrl", "fuse_base"; + clocks = <&clock_gcc GCC_HMSS_RBCPR_CLK>; + clock-names = "core_clk"; + qcom,cpr-ctrl-name = "apc0"; + qcom,cpr-controller-id = <0>; + + qcom,cpr-sensor-time = <1000>; + qcom,cpr-loop-time = <5000000>; + qcom,cpr-idle-cycles = <15>; + qcom,cpr-up-down-delay-time = <3000>; + qcom,cpr-step-quot-init-min = <12>; + qcom,cpr-step-quot-init-max = <14>; + qcom,cpr-count-mode = <0>; /* All at once */ + qcom,cpr-count-repeat = <14>; + qcom,cpr-down-error-step-limit = <1>; + qcom,cpr-up-error-step-limit = <1>; + qcom,cpr-corner-switch-delay-time = <1042>; + qcom,cpr-voltage-settling-time = <1760>; + + qcom,apm-threshold-voltage = <872000>; + qcom,apm-crossover-voltage = <872000>; + qcom,apm-hysteresis-voltage = <20000>; + qcom,voltage-step = <4000>; + qcom,voltage-base = <400000>; + qcom,cpr-saw-use-unit-mV; + + qcom,cpr-panic-reg-addr-list = + <0x179cbaa4 0x17912c18>; + qcom,cpr-panic-reg-name-list = + "PWR_CPRH_STATUS", "APCLUS0_L2_SAW4_PMIC_STS"; + + thread@0 { + qcom,cpr-thread-id = <0>; + qcom,cpr-consecutive-up = <0>; + qcom,cpr-consecutive-down = <2>; + qcom,cpr-up-threshold = <2>; + qcom,cpr-down-threshold = <2>; + + apc0_pwrcl_vreg: regulator { + regulator-name = "apc0_pwrcl_corner"; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <8>; + + qcom,cpr-fuse-corners = <5>; + qcom,cpr-fuse-combos = <16>; + qcom,cpr-speed-bins = <2>; + qcom,cpr-speed-bin-corners = <8 8>; + qcom,cpr-corners = <8>; + qcom,cpr-corner-fmax-map = <2 3 4 5 8>; + + qcom,cpr-voltage-ceiling = + <724000 724000 724000 788000 868000 + 924000 988000 1068000>; + + qcom,cpr-voltage-floor = + <588000 588000 596000 652000 712000 + 744000 784000 844000>; + + qcom,corner-frequencies = + <300000000 633600000 902400000 + 1113600000 1401600000 1536000000 + 1747200000 1843200000>; + + qcom,allow-voltage-interpolation; + qcom,allow-quotient-interpolation; + qcom,cpr-scaled-open-loop-voltage-as-ceiling; + }; + }; + }; + + /* APC1 CPR Controller node for Gold cluster */ + apc1_cpr: cprh-ctrl@179c4000 { + compatible = "qcom,cprh-sdm660-kbss-regulator"; + reg = <0x179c4000 0x4000>, <0x00784000 0x1000>; + reg-names = "cpr_ctrl", "fuse_base"; + clocks = <&clock_gcc GCC_HMSS_RBCPR_CLK>; + clock-names = "core_clk"; + qcom,cpr-ctrl-name = "apc1"; + qcom,cpr-controller-id = <1>; + + qcom,cpr-sensor-time = <1000>; + qcom,cpr-loop-time = <5000000>; + qcom,cpr-idle-cycles = <15>; + qcom,cpr-up-down-delay-time = <3000>; + qcom,cpr-step-quot-init-min = <12>; + qcom,cpr-step-quot-init-max = <14>; + qcom,cpr-count-mode = <0>; /* All at once */ + qcom,cpr-count-repeat = <14>; + qcom,cpr-down-error-step-limit = <1>; + qcom,cpr-up-error-step-limit = <1>; + qcom,cpr-corner-switch-delay-time = <1042>; + qcom,cpr-voltage-settling-time = <1760>; + + qcom,apm-threshold-voltage = <872000>; + qcom,apm-crossover-voltage = <872000>; + qcom,apm-hysteresis-voltage = <20000>; + qcom,voltage-step = <4000>; + qcom,voltage-base = <400000>; + qcom,cpr-saw-use-unit-mV; + + qcom,cpr-panic-reg-addr-list = + <0x179c7aa4 0x17812c18>; + qcom,cpr-panic-reg-name-list = + "PERF_CPRH_STATUS", "APCLUS1_L2_SAW4_PMIC_STS"; + + thread@0 { + qcom,cpr-thread-id = <0>; + qcom,cpr-consecutive-up = <0>; + qcom,cpr-consecutive-down = <2>; + qcom,cpr-up-threshold = <2>; + qcom,cpr-down-threshold = <2>; + + apc1_perfcl_vreg: regulator { + regulator-name = "apc1_perfcl_corner"; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <7>; + + qcom,cpr-fuse-corners = <5>; + qcom,cpr-fuse-combos = <16>; + qcom,cpr-speed-bins = <2>; + qcom,cpr-speed-bin-corners = <7 7>; + qcom,cpr-corners = <7>; + qcom,cpr-corner-fmax-map = <2 3 4 6 7>; + + qcom,cpr-voltage-ceiling = + <724000 724000 788000 868000 + 924000 988000 1068000>; + + qcom,cpr-voltage-floor = + <588000 596000 652000 712000 + 744000 784000 844000>; + + qcom,corner-frequencies = + /* Speed bin 0 */ + <300000000 1113600000 1401600000 + 1747200000 1958400000 2150400000 + 2457600000>, + + /* Speed bin 1 */ + <300000000 1113600000 1401600000 + 1747200000 1958400000 2150400000 + 2208000000>; + + qcom,allow-voltage-interpolation; + qcom,allow-quotient-interpolation; + qcom,cpr-scaled-open-loop-voltage-as-ceiling; + }; + }; + }; }; diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index a12a43ffa64c..54aa729352a3 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -1094,7 +1094,8 @@ reg-names = "osm", "pwrcl_pll", "perfcl_pll", "apcs_common", "perfcl_efuse"; - /* ToDo: Add power and perf supply rails */ + vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; + vdd-perfcl-supply = <&apc1_perfcl_vreg>; interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>; @@ -1102,31 +1103,31 @@ qcom,pwrcl-speedbin0-v0 = < 300000000 0x0004000f 0x01200020 0x1 1 >, - < 633600000 0x05040021 0x03200020 0x1 1 >, - < 902400000 0x0404002f 0x04260026 0x1 2 >, - < 1113600000 0x0404003a 0x052e002e 0x2 3 >, - < 1401600000 0x04040049 0x073a003a 0x2 4 >, - < 1536000000 0x04040050 0x08400040 0x3 5 >, - < 1747200000 0x0404005b 0x09480048 0x3 6 >, - < 1843200000 0x04040060 0x094c004c 0x3 7 >; + < 633600000 0x05040021 0x03200020 0x1 2 >, + < 902400000 0x0404002f 0x04260026 0x1 3 >, + < 1113600000 0x0404003a 0x052e002e 0x2 4 >, + < 1401600000 0x04040049 0x073a003a 0x2 5 >, + < 1536000000 0x04040050 0x08400040 0x3 6 >, + < 1747200000 0x0404005b 0x09480048 0x3 7 >, + < 1843200000 0x04040060 0x094c004c 0x3 8 >; qcom,perfcl-speedbin0-v0 = < 300000000 0x0004000f 0x01200020 0x1 1 >, - < 1113600000 0x0404003a 0x052e002e 0x1 1 >, - < 1401600000 0x04040049 0x073a003a 0x2 2 >, - < 1747200000 0x0404005b 0x09480048 0x2 3 >, - < 1958400000 0x04040066 0x0a510051 0x3 4 >, - < 2150400000 0x04040070 0x0b590059 0x3 5 >, - < 2457600000 0x04040080 0x0c660066 0x3 6 >; + < 1113600000 0x0404003a 0x052e002e 0x1 2 >, + < 1401600000 0x04040049 0x073a003a 0x2 3 >, + < 1747200000 0x0404005b 0x09480048 0x2 4 >, + < 1958400000 0x04040066 0x0a510051 0x3 5 >, + < 2150400000 0x04040070 0x0b590059 0x3 6 >, + < 2457600000 0x04040080 0x0c660066 0x3 7 >; qcom,perfcl-speedbin1-v0 = < 300000000 0x0004000f 0x01200020 0x1 1 >, - < 1113600000 0x0404003a 0x052e002e 0x1 1 >, - < 1401600000 0x04040049 0x073a003a 0x2 2 >, - < 1747200000 0x0404005b 0x09480048 0x2 3 >, - < 1958400000 0x04040066 0x0a510051 0x3 4 >, - < 2150400000 0x04040070 0x0b590059 0x3 5 >, - < 2208000000 0x04040073 0x0b5c005c 0x3 6 >; + < 1113600000 0x0404003a 0x052e002e 0x1 2 >, + < 1401600000 0x04040049 0x073a003a 0x2 3 >, + < 1747200000 0x0404005b 0x09480048 0x2 4 >, + < 1958400000 0x04040066 0x0a510051 0x3 5 >, + < 2150400000 0x04040070 0x0b590059 0x3 6 >, + < 2208000000 0x04040073 0x0b5c005c 0x3 7 >; qcom,up-timer = <1000 1000>; qcom,down-timer = <1000 1000>; @@ -1160,19 +1161,6 @@ qcom,wfx-fsm-en; qcom,pc-fsm-en; - qcom,pwrcl-apcs-mem-acc-cfg = - <0x179d1360 0x179d1364 0x179d1364>; - qcom,perfcl-apcs-mem-acc-cfg = - <0x179d1368 0x179d136C 0x179d1370>; - qcom,pwrcl-apcs-mem-acc-val = - <0x00000000 0x80000000 0x80000000>, - <0x00000000 0x00000000 0x00000000>, - <0x00000000 0x00000001 0x00000001>; - qcom,perfcl-apcs-mem-acc-val = - <0x00000000 0x00000000 0x80000000>, - <0x00000000 0x00000000 0x00000000>, - <0x00000000 0x00000000 0x00000001>; - clock-names = "aux_clk", "xo_a"; clocks = <&clock_gcc HMSS_GPLL0_CLK_SRC>, <&clock_rpmcc RPM_XO_A_CLK_SRC>; @@ -1565,6 +1553,35 @@ qcom,xprt = "smem"; }; + glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { + compatible = "qcom,glink-spi-xprt"; + label = "wdsp"; + qcom,remote-fifo-config = <&glink_fifo_wdsp>; + qcom,qos-config = <&glink_qos_wdsp>; + qcom,ramp-time = <0x10>, + <0x20>, + <0x30>, + <0x40>; + }; + + glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { + compatible = "qcom,glink-fifo-config"; + qcom,out-read-idx-reg = <0x12000>; + qcom,out-write-idx-reg = <0x12004>; + qcom,in-read-idx-reg = <0x1200c>; + qcom,in-write-idx-reg = <0x12010>; + }; + + glink_qos_wdsp: qcom,glink-qos-config-wdsp { + compatible = "qcom,glink-qos-config"; + qcom,flow-info = <0x80 0x0>, + <0x70 0x1>, + <0x60 0x2>, + <0x50 0x3>; + qcom,mtu-size = <0x800>; + qcom,tput-stats-cycle = <0xa>; + }; + qcom,glink_pkt { compatible = "qcom,glinkpkt"; diff --git a/arch/arm/configs/msmcortex_defconfig b/arch/arm/configs/msmcortex_defconfig index c5c7d924aab6..9cf5a15e80eb 100644 --- a/arch/arm/configs/msmcortex_defconfig +++ b/arch/arm/configs/msmcortex_defconfig @@ -254,7 +254,6 @@ CONFIG_PPPOPNS=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -266,6 +265,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y diff --git a/arch/arm/configs/sdm660-perf_defconfig b/arch/arm/configs/sdm660-perf_defconfig index 879b6ff88423..d555a1b179d8 100644 --- a/arch/arm/configs/sdm660-perf_defconfig +++ b/arch/arm/configs/sdm660-perf_defconfig @@ -280,7 +280,6 @@ CONFIG_USB_USBNET=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -292,6 +291,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y diff --git a/arch/arm/configs/sdm660_defconfig b/arch/arm/configs/sdm660_defconfig index 10b8666a2d40..2c94274b0637 100644 --- a/arch/arm/configs/sdm660_defconfig +++ b/arch/arm/configs/sdm660_defconfig @@ -279,7 +279,6 @@ CONFIG_USB_USBNET=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -291,6 +290,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y diff --git a/arch/arm64/configs/msm-perf_defconfig b/arch/arm64/configs/msm-perf_defconfig index 08dccf8e5022..07e413e31234 100644 --- a/arch/arm64/configs/msm-perf_defconfig +++ b/arch/arm64/configs/msm-perf_defconfig @@ -279,7 +279,6 @@ CONFIG_WIL6210=m CONFIG_CNSS=y CONFIG_CLD_LL_CORE=y CONFIG_BUS_AUTO_SUSPEND=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -293,6 +292,7 @@ CONFIG_SECURE_TOUCH=y CONFIG_TOUCHSCREEN_GEN_VKEYS=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y diff --git a/arch/arm64/configs/msm_defconfig b/arch/arm64/configs/msm_defconfig index 4620e74de5bc..76d949319dfa 100644 --- a/arch/arm64/configs/msm_defconfig +++ b/arch/arm64/configs/msm_defconfig @@ -265,7 +265,6 @@ CONFIG_WIL6210=m CONFIG_CNSS=y CONFIG_CLD_LL_CORE=y CONFIG_BUS_AUTO_SUSPEND=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -280,6 +279,7 @@ CONFIG_SECURE_TOUCH=y CONFIG_TOUCHSCREEN_GEN_VKEYS=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y # CONFIG_SERIO_SERPORT is not set diff --git a/arch/arm64/configs/msmcortex-perf_defconfig b/arch/arm64/configs/msmcortex-perf_defconfig index 71d067b27ddd..07d24ea6b707 100644 --- a/arch/arm64/configs/msmcortex-perf_defconfig +++ b/arch/arm64/configs/msmcortex-perf_defconfig @@ -275,7 +275,6 @@ CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_WIL6210=m CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -286,6 +285,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO_SERPORT is not set # CONFIG_VT is not set diff --git a/arch/arm64/configs/msmcortex_defconfig b/arch/arm64/configs/msmcortex_defconfig index 02b9e08955f6..25b5c206e1ae 100644 --- a/arch/arm64/configs/msmcortex_defconfig +++ b/arch/arm64/configs/msmcortex_defconfig @@ -275,7 +275,6 @@ CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_WIL6210=m CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -287,6 +286,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y diff --git a/arch/arm64/configs/sdm660-perf_defconfig b/arch/arm64/configs/sdm660-perf_defconfig index f15fd895e65c..7d203e49d595 100644 --- a/arch/arm64/configs/sdm660-perf_defconfig +++ b/arch/arm64/configs/sdm660-perf_defconfig @@ -278,7 +278,6 @@ CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_WIL6210=m CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -289,6 +288,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO_SERPORT is not set # CONFIG_VT is not set @@ -397,9 +397,9 @@ CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE=y CONFIG_MSMB_JPEG=y CONFIG_MSM_FD=y CONFIG_MSM_JPEGDMA=y -CONFIG_MSM_VIDC_V4L2=m -CONFIG_MSM_VIDC_VMEM=m -CONFIG_MSM_VIDC_GOVERNORS=m +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_VIDC_VMEM=y +CONFIG_MSM_VIDC_GOVERNORS=y CONFIG_MSM_SDE_ROTATOR=y CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y CONFIG_QCOM_KGSL=y diff --git a/arch/arm64/configs/sdm660_defconfig b/arch/arm64/configs/sdm660_defconfig index b52a672a5b5e..c295ba7e0d70 100644 --- a/arch/arm64/configs/sdm660_defconfig +++ b/arch/arm64/configs/sdm660_defconfig @@ -278,7 +278,6 @@ CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_ATH_CARDS=y CONFIG_WIL6210=m CONFIG_CLD_LL_CORE=y -CONFIG_QPNP_POWER_ON=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_KEYRESET=y CONFIG_KEYBOARD_GPIO=y @@ -290,6 +289,7 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v21=y CONFIG_SECURE_TOUCH=y CONFIG_INPUT_MISC=y CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y CONFIG_INPUT_KEYCHORD=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_GPIO=y @@ -399,9 +399,9 @@ CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE=y CONFIG_MSMB_JPEG=y CONFIG_MSM_FD=y CONFIG_MSM_JPEGDMA=y -CONFIG_MSM_VIDC_V4L2=m -CONFIG_MSM_VIDC_VMEM=m -CONFIG_MSM_VIDC_GOVERNORS=m +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_VIDC_VMEM=y +CONFIG_MSM_VIDC_GOVERNORS=y CONFIG_MSM_SDE_ROTATOR=y CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y CONFIG_QCOM_KGSL=y diff --git a/drivers/clk/msm/clock-osm.c b/drivers/clk/msm/clock-osm.c index 9e1036c19760..79e8a7d8eb00 100644 --- a/drivers/clk/msm/clock-osm.c +++ b/drivers/clk/msm/clock-osm.c @@ -231,6 +231,8 @@ enum clk_osm_trace_packet_id { #define MSM8998V2_PWRCL_BOOT_RATE 1555200000 #define MSM8998V2_PERFCL_BOOT_RATE 1728000000 +#define DEBUG_REG_NUM 3 + /* ACD registers */ #define ACD_HW_VERSION 0x0 #define ACDCR 0x4 @@ -340,6 +342,12 @@ struct osm_entry { long frequency; }; +const char *clk_panic_reg_names[] = {"WDOG_DOMAIN_PSTATE_STATUS", + "WDOG_PROGRAM_COUNTER", + "APM_STATUS"}; +const int clk_panic_reg_offsets[] = {WDOG_DOMAIN_PSTATE_STATUS, + WDOG_PROGRAM_COUNTER}; + static struct dentry *osm_debugfs_base; struct clk_osm { @@ -350,6 +358,7 @@ struct clk_osm { struct platform_device *vdd_dev; void *vbases[NUM_BASES]; unsigned long pbases[NUM_BASES]; + void __iomem *debug_regs[DEBUG_REG_NUM]; spinlock_t lock; u32 cpu_reg_mask; @@ -1371,6 +1380,64 @@ static int clk_osm_resources_init(struct platform_device *pdev) perfcl_clk.acd_init = false; } + pwrcl_clk.debug_regs[0] = devm_ioremap(&pdev->dev, + pwrcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[0], + 0x4); + if (!pwrcl_clk.debug_regs[0]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[0]); + return -ENOMEM; + } + + pwrcl_clk.debug_regs[1] = devm_ioremap(&pdev->dev, + pwrcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[1], + 0x4); + if (!pwrcl_clk.debug_regs[1]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[1]); + return -ENOMEM; + } + + pwrcl_clk.debug_regs[2] = devm_ioremap(&pdev->dev, + pwrcl_clk.apm_ctrl_status, + 0x4); + if (!pwrcl_clk.debug_regs[2]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[2]); + return -ENOMEM; + } + + perfcl_clk.debug_regs[0] = devm_ioremap(&pdev->dev, + perfcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[0], + 0x4); + if (!perfcl_clk.debug_regs[0]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[0]); + return -ENOMEM; + } + + perfcl_clk.debug_regs[1] = devm_ioremap(&pdev->dev, + perfcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[1], + 0x4); + if (!perfcl_clk.debug_regs[1]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[1]); + return -ENOMEM; + } + + perfcl_clk.debug_regs[2] = devm_ioremap(&pdev->dev, + perfcl_clk.apm_ctrl_status, + 0x4); + if (!perfcl_clk.debug_regs[2]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[2]); + return -ENOMEM; + } + vdd_pwrcl = devm_regulator_get(&pdev->dev, "vdd-pwrcl"); if (IS_ERR(vdd_pwrcl)) { rc = PTR_ERR(vdd_pwrcl); @@ -2976,36 +3043,16 @@ static int clk_osm_panic_callback(struct notifier_block *nfb, unsigned long event, void *data) { - void __iomem *virt_addr; - u32 value, reg; + int i; + u32 value; struct clk_osm *c = container_of(nfb, struct clk_osm, panic_notifier); - reg = c->pbases[OSM_BASE] + WDOG_DOMAIN_PSTATE_STATUS; - virt_addr = ioremap(reg, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("DOM%d_PSTATE_STATUS[0x%08x]=0x%08x\n", c->cluster_num, - reg, value); - iounmap(virt_addr); - } - - reg = c->pbases[OSM_BASE] + WDOG_PROGRAM_COUNTER; - virt_addr = ioremap(reg, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("DOM%d_PROGRAM_COUNTER[0x%08x]=0x%08x\n", c->cluster_num, - reg, value); - iounmap(virt_addr); - } - - virt_addr = ioremap(c->apm_ctrl_status, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("APM_CTLER_STATUS_%d[0x%08x]=0x%08x\n", c->cluster_num, - c->apm_ctrl_status, value); - iounmap(virt_addr); + for (i = 0; i < DEBUG_REG_NUM; i++) { + value = readl_relaxed(c->debug_regs[i]); + pr_err("%s_%d=0x%08x\n", clk_panic_reg_names[i], + c->cluster_num, value); } return NOTIFY_OK; @@ -3108,17 +3155,17 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev) msm8998_v2 = true; } - rc = clk_osm_resources_init(pdev); + rc = clk_osm_parse_dt_configs(pdev); if (rc) { - if (rc != -EPROBE_DEFER) - dev_err(&pdev->dev, "resources init failed, rc=%d\n", - rc); + dev_err(&pdev->dev, "Unable to parse device tree configurations\n"); return rc; } - rc = clk_osm_parse_dt_configs(pdev); + rc = clk_osm_resources_init(pdev); if (rc) { - dev_err(&pdev->dev, "Unable to parse device tree configurations\n"); + if (rc != -EPROBE_DEFER) + dev_err(&pdev->dev, "resources init failed, rc=%d\n", + rc); return rc; } diff --git a/drivers/clk/qcom/clk-cpu-osm.c b/drivers/clk/qcom/clk-cpu-osm.c index ab6a1384ffbd..5ed0dba189f7 100644 --- a/drivers/clk/qcom/clk-cpu-osm.c +++ b/drivers/clk/qcom/clk-cpu-osm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -88,6 +88,7 @@ enum clk_osm_trace_packet_id { #define CORE_COUNT_VAL(val) ((val & GENMASK(18, 16)) >> 16) #define SINGLE_CORE 1 #define MAX_CORE_COUNT 4 +#define DEBUG_REG_NUM 3 #define ENABLE_REG 0x1004 #define INDEX_REG 0x1150 @@ -321,6 +322,13 @@ static struct dentry *osm_debugfs_base; static struct regulator *vdd_pwrcl; static struct regulator *vdd_perfcl; +const char *clk_panic_reg_names[] = {"WDOG_DOMAIN_PSTATE_STATUS", + "WDOG_PROGRAM_COUNTER", + "APM_STATUS"}; + +const int clk_panic_reg_offsets[] = {WDOG_DOMAIN_PSTATE_STATUS, + WDOG_PROGRAM_COUNTER}; + static const struct regmap_config osm_qcom_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -336,6 +344,7 @@ struct clk_osm { struct platform_device *vdd_dev; void *vbases[NUM_BASES]; unsigned long pbases[NUM_BASES]; + void __iomem *debug_regs[DEBUG_REG_NUM]; spinlock_t lock; u32 cpu_reg_mask; @@ -1366,6 +1375,64 @@ static int clk_osm_resources_init(struct platform_device *pdev) perfcl_clk.acd_init = false; } + pwrcl_clk.debug_regs[0] = devm_ioremap(&pdev->dev, + pwrcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[0], + 0x4); + if (!pwrcl_clk.debug_regs[0]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[0]); + return -ENOMEM; + } + + pwrcl_clk.debug_regs[1] = devm_ioremap(&pdev->dev, + pwrcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[1], + 0x4); + if (!pwrcl_clk.debug_regs[1]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[1]); + return -ENOMEM; + } + + pwrcl_clk.debug_regs[2] = devm_ioremap(&pdev->dev, + pwrcl_clk.apm_ctrl_status, + 0x4); + if (!pwrcl_clk.debug_regs[2]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[2]); + return -ENOMEM; + }; + + perfcl_clk.debug_regs[0] = devm_ioremap(&pdev->dev, + perfcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[0], + 0x4); + if (!perfcl_clk.debug_regs[0]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[0]); + return -ENOMEM; + } + + perfcl_clk.debug_regs[1] = devm_ioremap(&pdev->dev, + perfcl_clk.pbases[OSM_BASE] + + clk_panic_reg_offsets[1], + 0x4); + if (!perfcl_clk.debug_regs[1]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[1]); + return -ENOMEM; + } + + perfcl_clk.debug_regs[2] = devm_ioremap(&pdev->dev, + perfcl_clk.apm_ctrl_status, + 0x4); + if (!perfcl_clk.debug_regs[2]) { + dev_err(&pdev->dev, "Failed to map %s debug register\n", + clk_panic_reg_names[2]); + return -ENOMEM; + }; + vdd_pwrcl = devm_regulator_get(&pdev->dev, "vdd-pwrcl"); if (IS_ERR(vdd_pwrcl)) { rc = PTR_ERR(vdd_pwrcl); @@ -2859,36 +2926,16 @@ static int clk_osm_panic_callback(struct notifier_block *nfb, unsigned long event, void *data) { - void __iomem *virt_addr; - u32 value, reg; + int i; + u32 value; struct clk_osm *c = container_of(nfb, struct clk_osm, panic_notifier); - reg = c->pbases[OSM_BASE] + WDOG_DOMAIN_PSTATE_STATUS; - virt_addr = ioremap(reg, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("DOM%d_PSTATE_STATUS[0x%08x]=0x%08x\n", c->cluster_num, - reg, value); - iounmap(virt_addr); - } - - reg = c->pbases[OSM_BASE] + WDOG_PROGRAM_COUNTER; - virt_addr = ioremap(reg, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("DOM%d_PROGRAM_COUNTER[0x%08x]=0x%08x\n", c->cluster_num, - reg, value); - iounmap(virt_addr); - } - - virt_addr = ioremap(c->apm_ctrl_status, 0x4); - if (virt_addr != NULL) { - value = readl_relaxed(virt_addr); - pr_err("APM_CTLER_STATUS_%d[0x%08x]=0x%08x\n", c->cluster_num, - c->apm_ctrl_status, value); - iounmap(virt_addr); + for (i = 0; i < DEBUG_REG_NUM; i++) { + value = readl_relaxed(c->debug_regs[i]); + pr_err("%s_%d=0x%08x\n", clk_panic_reg_names[i], + c->cluster_num, value); } return NOTIFY_OK; @@ -3020,17 +3067,17 @@ static int clk_cpu_osm_driver_probe(struct platform_device *pdev) clk_data->clk_num = num_clks; - rc = clk_osm_resources_init(pdev); + rc = clk_osm_parse_dt_configs(pdev); if (rc) { - if (rc != -EPROBE_DEFER) - dev_err(&pdev->dev, "resources init failed, rc=%d\n", - rc); + dev_err(&pdev->dev, "Unable to parse device tree configurations\n"); return rc; } - rc = clk_osm_parse_dt_configs(pdev); + rc = clk_osm_resources_init(pdev); if (rc) { - dev_err(&pdev->dev, "Unable to parse device tree configurations\n"); + if (rc != -EPROBE_DEFER) + dev_err(&pdev->dev, "resources init failed, rc=%d\n", + rc); return rc; } diff --git a/drivers/cpufreq/cpufreq_interactive.c b/drivers/cpufreq/cpufreq_interactive.c index 30e1a2138002..24ac49019b29 100644 --- a/drivers/cpufreq/cpufreq_interactive.c +++ b/drivers/cpufreq/cpufreq_interactive.c @@ -490,7 +490,7 @@ static void cpufreq_interactive_timer(unsigned long data) spin_lock_irqsave(&ppol->target_freq_lock, flags); spin_lock(&ppol->load_lock); - skip_hispeed_logic = tunables->enable_prediction ? true : + skip_hispeed_logic = tunables->ignore_hispeed_on_notif && ppol->notif_pending; skip_min_sample_time = tunables->fast_ramp_down && ppol->notif_pending; ppol->notif_pending = false; diff --git a/drivers/cpuidle/lpm-levels.c b/drivers/cpuidle/lpm-levels.c index 81801605d6e7..823b7d988284 100644 --- a/drivers/cpuidle/lpm-levels.c +++ b/drivers/cpuidle/lpm-levels.c @@ -1061,8 +1061,9 @@ static int cluster_select(struct lpm_cluster *cluster, bool from_idle, best_level = i; - if (predicted ? (pred_us <= pwr_params->max_residency) - : (sleep_us <= pwr_params->max_residency)) + if (from_idle && + (predicted ? (pred_us <= pwr_params->max_residency) + : (sleep_us <= pwr_params->max_residency))) break; } diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 84d3ec98e6b9..7f29f3644fb6 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -3,7 +3,7 @@ config DRM_MSM tristate "MSM DRM" depends on DRM depends on ARCH_QCOM || (ARM && COMPILE_TEST) - depends on OF && COMMON_CLK + depends on OF select REGULATOR select DRM_KMS_HELPER select DRM_PANEL diff --git a/drivers/gpu/msm/adreno-gpulist.h b/drivers/gpu/msm/adreno-gpulist.h index 6a00919f144b..2418ee003c22 100644 --- a/drivers/gpu/msm/adreno-gpulist.h +++ b/drivers/gpu/msm/adreno-gpulist.h @@ -293,6 +293,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { ADRENO_CPZ_RETENTION, .pm4fw_name = "a530_pm4.fw", .pfpfw_name = "a530_pfp.fw", + .zap_name = "a512_zap", .gpudev = &adreno_a5xx_gpudev, .gmem_size = (SZ_256K + SZ_16K), .num_protected_regs = 0x20, diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index 9b8bcdffdfba..2557dcda7621 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -25,14 +25,6 @@ config INPUT if INPUT -config QPNP_POWER_ON - tristate "QPNP PMIC POWER-ON Driver" - depends on SPMI && ARCH_QCOM - help - This driver supports the power-on functionality on Qualcomm - PNP PMIC. It currently supports reporting the change in status of - the KPDPWR_N line (connected to the power-key). - config INPUT_LEDS tristate "Export input device LEDs in sysfs" depends on LEDS_CLASS diff --git a/drivers/input/Makefile b/drivers/input/Makefile index fd35ebf6acd9..2a6d05ab9170 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -7,7 +7,6 @@ obj-$(CONFIG_INPUT) += input-core.o input-core-y := input.o input-compat.o input-mt.o ff-core.o -obj-$(CONFIG_QPNP_POWER_ON) += qpnp-power-on.o obj-$(CONFIG_INPUT_FF_MEMLESS) += ff-memless.o obj-$(CONFIG_INPUT_POLLDEV) += input-polldev.o obj-$(CONFIG_INPUT_SPARSEKMAP) += sparse-keymap.o diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 9c1380b65b77..5cfa1848e37c 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -161,6 +161,15 @@ config INPUT_PMIC8XXX_PWRKEY To compile this driver as a module, choose M here: the module will be called pmic8xxx-pwrkey. +config INPUT_QPNP_POWER_ON + tristate "QPNP PMIC Power-on support" + depends on SPMI + help + This option enables device driver support for the power-on + functionality of Qualcomm Technologies, Inc. PNP PMICs. It supports + reporting the change in status of the KPDPWR_N line (connected to the + power-key) as well as reset features. + config INPUT_SPARCSPKR tristate "SPARC Speaker support" depends on PCI && SPARC64 diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 4e806ac056ce..a5ab4b762d31 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -57,6 +57,7 @@ obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o obj-$(CONFIG_INPUT_PM8941_PWRKEY) += pm8941-pwrkey.o obj-$(CONFIG_INPUT_PM8XXX_VIBRATOR) += pm8xxx-vibrator.o obj-$(CONFIG_INPUT_PMIC8XXX_PWRKEY) += pmic8xxx-pwrkey.o +obj-$(CONFIG_INPUT_QPNP_POWER_ON) += qpnp-power-on.o obj-$(CONFIG_INPUT_POWERMATE) += powermate.o obj-$(CONFIG_INPUT_PWM_BEEPER) += pwm-beeper.o obj-$(CONFIG_INPUT_RB532_BUTTON) += rb532_button.o diff --git a/drivers/input/qpnp-power-on.c b/drivers/input/misc/qpnp-power-on.c index 967b23cae05c..e1c16aa5da43 100644 --- a/drivers/input/qpnp-power-on.c +++ b/drivers/input/misc/qpnp-power-on.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -30,7 +30,7 @@ #include <linux/regulator/driver.h> #include <linux/regulator/machine.h> #include <linux/regulator/of_regulator.h> -#include <linux/qpnp/power-on.h> +#include <linux/input/qpnp-power-on.h> #include <linux/power_supply.h> #define PMIC_VER_8941 0x01 @@ -223,7 +223,7 @@ struct qpnp_pon { static int pon_ship_mode_en; module_param_named( - ship_mode_en, pon_ship_mode_en, int, S_IRUSR | S_IWUSR + ship_mode_en, pon_ship_mode_en, int, 0600 ); static struct qpnp_pon *sys_reset_dev; diff --git a/drivers/media/dvb-core/dvb_ringbuffer.c b/drivers/media/dvb-core/dvb_ringbuffer.c index 0d44deed65bd..8ab60a4fec00 100644 --- a/drivers/media/dvb-core/dvb_ringbuffer.c +++ b/drivers/media/dvb-core/dvb_ringbuffer.c @@ -233,9 +233,11 @@ ssize_t dvb_ringbuffer_write_user(struct dvb_ringbuffer *rbuf, */ smp_store_release(&rbuf->pwrite, 0); } - status = copy_from_user(rbuf->data+rbuf->pwrite, buf, todo); - if (status) - return len - todo; + + if (copy_from_user(rbuf->data + rbuf->pwrite, buf, todo)) { + smp_store_release(&rbuf->pwrite, oldpwrite); + return -EFAULT; + } /* smp_store_release() for write pointer update, see above */ smp_store_release(&rbuf->pwrite, (rbuf->pwrite + todo) % rbuf->size); diff --git a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c index 6c09f3820dfd..34fffa8dd7ce 100644 --- a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c +++ b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c @@ -686,6 +686,50 @@ error: } EXPORT_SYMBOL(msm_camera_regulator_enable); +/* set regulator mode */ +int msm_camera_regulator_set_mode(struct msm_cam_regulator *vdd_info, + int cnt, bool mode) +{ + int i; + int rc; + struct msm_cam_regulator *tmp = vdd_info; + + if (!tmp) { + pr_err("Invalid params"); + return -EINVAL; + } + CDBG("cnt : %d\n", cnt); + + for (i = 0; i < cnt; i++) { + if (tmp && !IS_ERR_OR_NULL(tmp->vdd)) { + CDBG("name : %s, enable : %d\n", tmp->name, mode); + if (mode) { + rc = regulator_set_mode(tmp->vdd, + REGULATOR_MODE_FAST); + if (rc < 0) { + pr_err("regulator enable failed %d\n", + i); + goto error; + } + } else { + rc = regulator_set_mode(tmp->vdd, + REGULATOR_MODE_NORMAL); + if (rc < 0) + pr_err("regulator disable failed %d\n", + i); + goto error; + } + } + tmp++; + } + + return 0; +error: + return rc; +} +EXPORT_SYMBOL(msm_camera_regulator_set_mode); + + /* Put regulators regulators */ void msm_camera_put_regulators(struct platform_device *pdev, struct msm_cam_regulator **vdd_info, int cnt) diff --git a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h index 0e9d26bebe30..55074490bd72 100644 --- a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h +++ b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h @@ -248,6 +248,23 @@ int msm_camera_regulator_enable(struct msm_cam_regulator *vdd_info, int cnt, int enable); /** + * @brief : set the regultors mode + * + * This function sets the regulators for a specific + * mode. say:REGULATOR_MODE_FAST/REGULATOR_MODE_NORMAL + * + * @param vdd_info: Pointer to list of regulators + * @param cnt: Number of regulators to enable/disable + * @param mode: Flags specifies either enable/disable + * + * @return Status of operation. Negative in case of error. Zero otherwise. + */ + +int msm_camera_regulator_set_mode(struct msm_cam_regulator *vdd_info, + int cnt, bool mode); + + +/** * @brief : Release the regulators * * This function releases the regulator resources. diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp.c index 35daf30bac63..840d84388a17 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.c @@ -500,6 +500,10 @@ static int vfe_probe(struct platform_device *pdev) memset(&vfe_common_data, 0, sizeof(vfe_common_data)); mutex_init(&vfe_common_data.vfe_common_mutex); spin_lock_init(&vfe_common_data.common_dev_data_lock); + spin_lock_init(&vfe_common_data.vfe_irq_dump. + common_dev_irq_dump_lock); + spin_lock_init(&vfe_common_data.vfe_irq_dump. + common_dev_tasklet_dump_lock); for (i = 0; i < (VFE_AXI_SRC_MAX * MAX_VFE); i++) spin_lock_init(&(vfe_common_data.streams[i].lock)); for (i = 0; i < (MSM_ISP_STATS_MAX * MAX_VFE); i++) diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h index 9c7eba21fde1..4b881f4fd7b6 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h @@ -66,6 +66,8 @@ #define MAX_BUFFERS_IN_HW 2 #define MAX_VFE 2 +#define MAX_VFE_IRQ_DEBUG_DUMP_SIZE 10 +#define MAX_RECOVERY_THRESHOLD 5 struct vfe_device; struct msm_vfe_axi_stream; @@ -133,6 +135,8 @@ struct msm_isp_timestamp { }; struct msm_vfe_irq_ops { + void (*read_and_clear_irq_status)(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1); void (*read_irq_status)(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1); void (*process_reg_update)(struct vfe_device *vfe_dev, @@ -525,6 +529,7 @@ struct msm_vfe_axi_shared_data { uint16_t stream_handle_cnt; uint32_t event_mask; uint8_t enable_frameid_recovery; + uint8_t recovery_count; }; struct msm_vfe_stats_hardware_info { @@ -691,6 +696,26 @@ struct master_slave_resource_info { enum msm_vfe_dual_cam_sync_mode dual_sync_mode; }; +struct msm_vfe_irq_debug_info { + uint32_t vfe_id; + struct msm_isp_timestamp ts; + uint32_t core_id; + uint32_t irq_status0[MAX_VFE]; + uint32_t irq_status1[MAX_VFE]; + uint32_t ping_pong_status[MAX_VFE]; +}; + +struct msm_vfe_irq_dump { + spinlock_t common_dev_irq_dump_lock; + spinlock_t common_dev_tasklet_dump_lock; + uint8_t current_irq_index; + uint8_t current_tasklet_index; + struct msm_vfe_irq_debug_info + irq_debug[MAX_VFE_IRQ_DEBUG_DUMP_SIZE]; + struct msm_vfe_irq_debug_info + tasklet_debug[MAX_VFE_IRQ_DEBUG_DUMP_SIZE]; +}; + struct msm_vfe_common_dev_data { spinlock_t common_dev_data_lock; struct dual_vfe_resource *dual_vfe_res; @@ -698,6 +723,8 @@ struct msm_vfe_common_dev_data { struct msm_vfe_axi_stream streams[VFE_AXI_SRC_MAX * MAX_VFE]; struct msm_vfe_stats_stream stats_streams[MSM_ISP_STATS_MAX * MAX_VFE]; struct mutex vfe_common_mutex; + /* Irq debug Info */ + struct msm_vfe_irq_dump vfe_irq_dump; }; struct msm_vfe_common_subdev { @@ -790,8 +817,9 @@ struct vfe_device { /* irq info */ uint32_t irq0_mask; uint32_t irq1_mask; - uint32_t bus_err_ign_mask; + uint32_t recovery_irq0_mask; + uint32_t recovery_irq1_mask; }; struct vfe_parent_device { diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c index 43f562b18209..bf18fc59585c 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c @@ -576,7 +576,7 @@ static void msm_vfe32_process_error_status(struct vfe_device *vfe_dev) pr_err("%s: axi error\n", __func__); } -static void msm_vfe32_read_irq_status(struct vfe_device *vfe_dev, +static void msm_vfe32_read_and_clear_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1) { *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x2C); @@ -594,6 +594,13 @@ static void msm_vfe32_read_irq_status(struct vfe_device *vfe_dev, msm_camera_io_r(vfe_dev->vfe_base + 0x7B4); } +static void msm_vfe32_read_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t irq_status1) +{ + *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x2C); + *irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x30); +} + static void msm_vfe32_process_reg_update(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1, struct msm_isp_timestamp *ts) @@ -1423,6 +1430,8 @@ struct msm_vfe_hardware_info vfe32_hw_info = { .vfe_clk_idx = VFE32_CLK_IDX, .vfe_ops = { .irq_ops = { + .read_and_clear_irq_status = + msm_vfe32_read_and_clear_irq_status, .read_irq_status = msm_vfe32_read_irq_status, .process_camif_irq = msm_vfe32_process_camif_irq, .process_reset_irq = msm_vfe32_process_reset_irq, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c index ab01d37790d6..8e549c338bdd 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c @@ -566,7 +566,7 @@ static void msm_vfe40_process_error_status(struct vfe_device *vfe_dev) msm_isp_update_last_overflow_ab_ib(vfe_dev); } -static void msm_vfe40_read_irq_status(struct vfe_device *vfe_dev, +static void msm_vfe40_read_and_clear_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1) { *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38); @@ -599,6 +599,13 @@ static void msm_vfe40_read_irq_status(struct vfe_device *vfe_dev, } +static void msm_vfe40_read_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1) +{ + *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38); + *irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x3C); +} + static void msm_vfe40_process_reg_update(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1, struct msm_isp_timestamp *ts) @@ -1770,7 +1777,8 @@ static int msm_vfe40_axi_halt(struct vfe_device *vfe_dev, static void msm_vfe40_axi_restart(struct vfe_device *vfe_dev, uint32_t blocking, uint32_t enable_camif) { - msm_vfe40_config_irq(vfe_dev, 0x800000E0, 0xFEFFFF7E, + msm_vfe40_config_irq(vfe_dev, vfe_dev->recovery_irq0_mask, + vfe_dev->recovery_irq1_mask, MSM_ISP_IRQ_ENABLE); msm_camera_io_w_mb(0x140000, vfe_dev->vfe_base + 0x318); @@ -2198,6 +2206,8 @@ struct msm_vfe_hardware_info vfe40_hw_info = { .min_ib = 12000000, .vfe_ops = { .irq_ops = { + .read_and_clear_irq_status = + msm_vfe40_read_and_clear_irq_status, .read_irq_status = msm_vfe40_read_irq_status, .process_camif_irq = msm_vfe40_process_input_irq, .process_reset_irq = msm_vfe40_process_reset_irq, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp44.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp44.c index 0a72a041de28..957cbc292be3 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp44.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp44.c @@ -401,7 +401,7 @@ static void msm_vfe44_process_error_status(struct vfe_device *vfe_dev) } } -static void msm_vfe44_read_irq_status(struct vfe_device *vfe_dev, +static void msm_vfe44_read_and_clear_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1) { *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38); @@ -429,6 +429,13 @@ static void msm_vfe44_read_irq_status(struct vfe_device *vfe_dev, } +static void msm_vfe44_read_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1) +{ + *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38); + *irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x3C); +} + static void msm_vfe44_process_reg_update(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1, struct msm_isp_timestamp *ts) @@ -1341,8 +1348,8 @@ static int msm_vfe44_axi_halt(struct vfe_device *vfe_dev, static void msm_vfe44_axi_restart(struct vfe_device *vfe_dev, uint32_t blocking, uint32_t enable_camif) { - msm_vfe44_config_irq(vfe_dev, 0x800000E0, 0xFFFFFF7E, - MSM_ISP_IRQ_ENABLE); + msm_vfe44_config_irq(vfe_dev, vfe_dev->recovery_irq0_mask, + vfe_dev->recovery_irq1_mask, MSM_ISP_IRQ_ENABLE); msm_camera_io_w_mb(0x140000, vfe_dev->vfe_base + 0x318); /* Start AXI */ @@ -1806,6 +1813,8 @@ struct msm_vfe_hardware_info vfe44_hw_info = { .min_ib = 100000000, .vfe_ops = { .irq_ops = { + .read_and_clear_irq_status = + msm_vfe44_read_and_clear_irq_status, .read_irq_status = msm_vfe44_read_irq_status, .process_camif_irq = msm_vfe44_process_input_irq, .process_reset_irq = msm_vfe44_process_reset_irq, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp46.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp46.c index f2d53c956fdc..cc768db875db 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp46.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp46.c @@ -345,7 +345,7 @@ static void msm_vfe46_process_error_status(struct vfe_device *vfe_dev) pr_err("%s: status bf scale bus overflow\n", __func__); } -static void msm_vfe46_read_irq_status(struct vfe_device *vfe_dev, +static void msm_vfe46_read_and_clear_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1) { *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C); @@ -369,6 +369,13 @@ static void msm_vfe46_read_irq_status(struct vfe_device *vfe_dev, } +static void msm_vfe46_read_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1) +{ + *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C); + *irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x70); +} + static void msm_vfe46_process_reg_update(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1, struct msm_isp_timestamp *ts) @@ -1406,7 +1413,8 @@ static int msm_vfe46_axi_halt(struct vfe_device *vfe_dev, static void msm_vfe46_axi_restart(struct vfe_device *vfe_dev, uint32_t blocking, uint32_t enable_camif) { - msm_vfe46_config_irq(vfe_dev, 0x810000E0, 0xFFFFFF7E, + msm_vfe46_config_irq(vfe_dev, vfe_dev->recovery_irq0_mask, + vfe_dev->recovery_irq1_mask, MSM_ISP_IRQ_ENABLE); msm_camera_io_w_mb(0x20000, vfe_dev->vfe_base + 0x3CC); @@ -1882,6 +1890,8 @@ struct msm_vfe_hardware_info vfe46_hw_info = { .min_ib = 100000000, .vfe_ops = { .irq_ops = { + .read_and_clear_irq_status = + msm_vfe46_read_and_clear_irq_status, .read_irq_status = msm_vfe46_read_irq_status, .process_camif_irq = msm_vfe46_process_input_irq, .process_reset_irq = msm_vfe46_process_reset_irq, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp47.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp47.c index 71ee9211a434..9747cfd6dca3 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp47.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp47.c @@ -556,7 +556,7 @@ void msm_vfe47_process_error_status(struct vfe_device *vfe_dev) pr_err("%s: status dsp error\n", __func__); } -void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev, +void msm_vfe47_read_and_clear_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1) { *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C); @@ -582,6 +582,13 @@ void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev, } +void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1) +{ + *irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C); + *irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x70); +} + void msm_vfe47_process_reg_update(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1, struct msm_isp_timestamp *ts) @@ -1931,7 +1938,9 @@ void msm_vfe47_axi_restart(struct vfe_device *vfe_dev, uint32_t blocking, uint32_t enable_camif) { vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev, - 0x810000E0, 0xFFFFFF7E, MSM_ISP_IRQ_ENABLE); + vfe_dev->recovery_irq0_mask, + vfe_dev->recovery_irq1_mask, + MSM_ISP_IRQ_ENABLE); /* Start AXI */ msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x400); @@ -2783,7 +2792,8 @@ struct msm_vfe_hardware_info vfe47_hw_info = { .min_ab = 100000000, .vfe_ops = { .irq_ops = { - .read_irq_status = msm_vfe47_read_irq_status, + .read_and_clear_irq_status = + msm_vfe47_read_and_clear_irq_status, .process_camif_irq = msm_vfe47_process_input_irq, .process_reset_irq = msm_vfe47_process_reset_irq, .process_halt_irq = msm_vfe47_process_halt_irq, @@ -2793,6 +2803,7 @@ struct msm_vfe_hardware_info vfe47_hw_info = { .process_stats_irq = msm_isp_process_stats_irq, .process_epoch_irq = msm_vfe47_process_epoch_irq, .config_irq = msm_vfe47_config_irq, + .read_irq_status = msm_vfe47_read_irq_status, }, .axi_ops = { .reload_wm = msm_vfe47_axi_reload_wm, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp47.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp47.h index 55cf6a17b18c..22a1a21bce9a 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp47.h +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp47.h @@ -30,6 +30,8 @@ enum msm_vfe47_stats_comp_idx { extern struct msm_vfe_hardware_info vfe47_hw_info; +void msm_vfe47_read_and_clear_irq_status(struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1); void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev, uint32_t *irq_status0, uint32_t *irq_status1); void msm_vfe47_enable_camif_error(struct vfe_device *vfe_dev, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp48.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp48.c index f346ceb6c9e5..916f30049bf0 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp48.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp48.c @@ -269,6 +269,8 @@ struct msm_vfe_hardware_info vfe48_hw_info = { .min_ab = 100000000, .vfe_ops = { .irq_ops = { + .read_and_clear_irq_status = + msm_vfe47_read_and_clear_irq_status, .read_irq_status = msm_vfe47_read_irq_status, .process_camif_irq = msm_vfe47_process_input_irq, .process_reset_irq = msm_vfe47_process_reset_irq, diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c index 941119fad78e..60801ff6be0a 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c @@ -558,6 +558,7 @@ static int msm_isp_composite_irq(struct vfe_device *vfe_dev, { /* interrupt recv on same vfe w/o recv on other vfe */ if (stream_info->composite_irq[irq] & (1 << vfe_dev->pdev->id)) { + msm_isp_dump_ping_pong_mismatch(vfe_dev); pr_err("%s: irq %d out of sync for dual vfe on vfe %d\n", __func__, irq, vfe_dev->pdev->id); return -EINVAL; @@ -1604,7 +1605,23 @@ void msm_isp_halt_send_error(struct vfe_device *vfe_dev, uint32_t event) struct msm_isp_event_data error_event; struct msm_vfe_axi_halt_cmd halt_cmd; struct vfe_device *temp_dev = NULL; + uint32_t irq_status0 = 0, irq_status1 = 0; + if (atomic_read(&vfe_dev->error_info.overflow_state) != + NO_OVERFLOW) + /* Recovery is already in Progress */ + return; + + if (event == ISP_EVENT_PING_PONG_MISMATCH && + vfe_dev->axi_data.recovery_count < MAX_RECOVERY_THRESHOLD) { + pr_err("%s: ping pong mismatch on vfe%d recovery count %d\n", + __func__, vfe_dev->pdev->id, + vfe_dev->axi_data.recovery_count); + msm_isp_process_overflow_irq(vfe_dev, + &irq_status0, &irq_status1, 1); + vfe_dev->axi_data.recovery_count++; + return; + } memset(&halt_cmd, 0, sizeof(struct msm_vfe_axi_halt_cmd)); memset(&error_event, 0, sizeof(struct msm_isp_event_data)); halt_cmd.stop_camif = 1; @@ -3777,6 +3794,7 @@ void msm_isp_process_axi_irq_stream(struct vfe_device *vfe_dev, (~(pingpong_status >> stream_info->wm[vfe_idx][i]) & 0x1)) { spin_unlock_irqrestore(&stream_info->lock, flags); + msm_isp_dump_ping_pong_mismatch(vfe_dev); pr_err("%s: Write master ping pong mismatch. Status: 0x%x %x\n", __func__, pingpong_status, stream_info->stream_src); @@ -3798,7 +3816,7 @@ void msm_isp_process_axi_irq_stream(struct vfe_device *vfe_dev, spin_unlock_irqrestore(&stream_info->lock, flags); if (rc < 0) msm_isp_halt_send_error(vfe_dev, - ISP_EVENT_BUF_FATAL_ERROR); + ISP_EVENT_PING_PONG_MISMATCH); return; } diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c index 38ce78d941c9..72703c9590ed 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c @@ -195,7 +195,7 @@ static int32_t msm_isp_stats_buf_divert(struct vfe_device *vfe_dev, spin_unlock_irqrestore(&stream_info->lock, flags); if (rc < 0) msm_isp_halt_send_error(vfe_dev, - ISP_EVENT_BUF_FATAL_ERROR); + ISP_EVENT_PING_PONG_MISMATCH); return rc; } diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c index 4abb6d1d91a8..e238f54a9100 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c @@ -21,6 +21,9 @@ #include "msm_camera_io_util.h" #include "cam_smmu_api.h" #include "msm_isp48.h" +#define CREATE_TRACE_POINTS +#include "trace/events/msm_cam.h" + #define MAX_ISP_V4l2_EVENTS 100 static DEFINE_MUTEX(bandwidth_mgr_mutex); @@ -1784,9 +1787,10 @@ static inline void msm_isp_update_error_info(struct vfe_device *vfe_dev, vfe_dev->error_info.error_count++; } -static int msm_isp_process_overflow_irq( +int msm_isp_process_overflow_irq( struct vfe_device *vfe_dev, - uint32_t *irq_status0, uint32_t *irq_status1) + uint32_t *irq_status0, uint32_t *irq_status1, + uint8_t force_overflow) { uint32_t overflow_mask; uint32_t bus_err = 0; @@ -1816,7 +1820,7 @@ static int msm_isp_process_overflow_irq( get_overflow_mask(&overflow_mask); overflow_mask &= *irq_status1; - if (overflow_mask) { + if (overflow_mask || force_overflow) { struct msm_isp_event_data error_event; int i; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; @@ -1840,7 +1844,8 @@ static int msm_isp_process_overflow_irq( pr_err("%s: wm %d assigned to stream handle %x\n", __func__, i, axi_data->free_wm[i]); } - + vfe_dev->recovery_irq0_mask = vfe_dev->irq0_mask; + vfe_dev->recovery_irq1_mask = vfe_dev->irq1_mask; vfe_dev->hw_info->vfe_ops.core_ops. set_halt_restart_mask(vfe_dev); /* mask off other vfe if dual vfe is used */ @@ -1855,6 +1860,8 @@ static int msm_isp_process_overflow_irq( atomic_set(&temp_vfe->error_info.overflow_state, OVERFLOW_DETECTED); + temp_vfe->recovery_irq0_mask = temp_vfe->irq0_mask; + temp_vfe->recovery_irq1_mask = temp_vfe->irq1_mask; temp_vfe->hw_info->vfe_ops.core_ops. set_halt_restart_mask(temp_vfe); } @@ -1889,6 +1896,77 @@ void msm_isp_reset_burst_count_and_frame_drop( msm_isp_reset_framedrop(vfe_dev, stream_info); } +void msm_isp_prepare_irq_debug_info(struct vfe_device *vfe_dev, + uint32_t irq_status0, uint32_t irq_status1) +{ + + unsigned long flags; + struct msm_vfe_irq_debug_info *irq_debug; + uint8_t current_index; + + spin_lock_irqsave(&vfe_dev->common_data->vfe_irq_dump. + common_dev_irq_dump_lock, flags); + /* Fill current VFE debug info */ + current_index = vfe_dev->common_data->vfe_irq_dump. + current_irq_index % MAX_VFE_IRQ_DEBUG_DUMP_SIZE; + irq_debug = &vfe_dev->common_data->vfe_irq_dump. + irq_debug[current_index]; + irq_debug->vfe_id = vfe_dev->pdev->id; + irq_debug->core_id = smp_processor_id(); + msm_isp_get_timestamp(&irq_debug->ts, vfe_dev); + irq_debug->irq_status0[vfe_dev->pdev->id] = irq_status0; + irq_debug->irq_status1[vfe_dev->pdev->id] = irq_status1; + irq_debug->ping_pong_status[vfe_dev->pdev->id] = + vfe_dev->hw_info->vfe_ops.axi_ops. + get_pingpong_status(vfe_dev); + if (vfe_dev->is_split && + (vfe_dev->common_data-> + dual_vfe_res->vfe_dev[!vfe_dev->pdev->id]) + && (vfe_dev->common_data->dual_vfe_res-> + vfe_dev[!vfe_dev->pdev->id]->vfe_open_cnt)) { + /* Fill other VFE debug Info */ + vfe_dev->hw_info->vfe_ops.irq_ops.read_irq_status( + vfe_dev->common_data->dual_vfe_res-> + vfe_dev[!vfe_dev->pdev->id], + &irq_debug->irq_status0[!vfe_dev->pdev->id], + &irq_debug->irq_status1[!vfe_dev->pdev->id]); + irq_debug->ping_pong_status[!vfe_dev->pdev->id] = + vfe_dev->hw_info->vfe_ops.axi_ops. + get_pingpong_status(vfe_dev->common_data-> + dual_vfe_res->vfe_dev[!vfe_dev->pdev->id]); + } + vfe_dev->common_data->vfe_irq_dump.current_irq_index++; + spin_unlock_irqrestore(&vfe_dev->common_data->vfe_irq_dump. + common_dev_irq_dump_lock, flags); +} + +void msm_isp_prepare_tasklet_debug_info(struct vfe_device *vfe_dev, + uint32_t irq_status0, uint32_t irq_status1, + struct msm_isp_timestamp ts) +{ + struct msm_vfe_irq_debug_info *irq_debug; + uint8_t current_index; + unsigned long flags; + + spin_lock_irqsave(&vfe_dev->common_data->vfe_irq_dump. + common_dev_tasklet_dump_lock, flags); + current_index = vfe_dev->common_data->vfe_irq_dump. + current_tasklet_index % MAX_VFE_IRQ_DEBUG_DUMP_SIZE; + irq_debug = &vfe_dev->common_data->vfe_irq_dump. + tasklet_debug[current_index]; + irq_debug->vfe_id = vfe_dev->pdev->id; + irq_debug->core_id = smp_processor_id(); + irq_debug->ts = ts; + irq_debug->irq_status0[vfe_dev->pdev->id] = irq_status0; + irq_debug->irq_status1[vfe_dev->pdev->id] = irq_status1; + irq_debug->ping_pong_status[vfe_dev->pdev->id] = + vfe_dev->hw_info->vfe_ops.axi_ops. + get_pingpong_status(vfe_dev); + vfe_dev->common_data->vfe_irq_dump.current_tasklet_index++; + spin_unlock_irqrestore(&vfe_dev->common_data->vfe_irq_dump. + common_dev_tasklet_dump_lock, flags); +} + static void msm_isp_enqueue_tasklet_cmd(struct vfe_device *vfe_dev, uint32_t irq_status0, uint32_t irq_status1) { @@ -1923,7 +2001,7 @@ irqreturn_t msm_isp_process_irq(int irq_num, void *data) uint32_t error_mask0, error_mask1; vfe_dev->hw_info->vfe_ops.irq_ops. - read_irq_status(vfe_dev, &irq_status0, &irq_status1); + read_and_clear_irq_status(vfe_dev, &irq_status0, &irq_status1); if ((irq_status0 == 0) && (irq_status1 == 0)) { ISP_DBG("%s:VFE%d irq_status0 & 1 are both 0\n", @@ -1932,7 +2010,7 @@ irqreturn_t msm_isp_process_irq(int irq_num, void *data) } if (msm_isp_process_overflow_irq(vfe_dev, - &irq_status0, &irq_status1)) { + &irq_status0, &irq_status1, 0)) { /* if overflow initiated no need to handle the interrupts */ pr_err("overflow processed\n"); return IRQ_HANDLED; @@ -1953,7 +2031,7 @@ irqreturn_t msm_isp_process_irq(int irq_num, void *data) ISP_DBG("%s: error_mask0/1 & error_count are set!\n", __func__); return IRQ_HANDLED; } - + msm_isp_prepare_irq_debug_info(vfe_dev, irq_status0, irq_status1); msm_isp_enqueue_tasklet_cmd(vfe_dev, irq_status0, irq_status1); return IRQ_HANDLED; @@ -1991,6 +2069,8 @@ void msm_isp_do_tasklet(unsigned long data) irq_status1 = queue_cmd->vfeInterruptStatus1; ts = queue_cmd->ts; spin_unlock_irqrestore(&vfe_dev->tasklet_lock, flags); + msm_isp_prepare_tasklet_debug_info(vfe_dev, + irq_status0, irq_status1, ts); ISP_DBG("%s: vfe_id %d status0: 0x%x status1: 0x%x\n", __func__, vfe_dev->pdev->id, irq_status0, irq_status1); irq_ops->process_reset_irq(vfe_dev, @@ -2242,3 +2322,53 @@ void msm_isp_flush_tasklet(struct vfe_device *vfe_dev) return; } +void msm_isp_irq_debug_dump(struct vfe_device *vfe_dev) +{ + + uint8_t i, dump_index; + unsigned long flags; + + spin_lock_irqsave(&vfe_dev->common_data->vfe_irq_dump. + common_dev_irq_dump_lock, flags); + dump_index = vfe_dev->common_data->vfe_irq_dump. + current_irq_index; + for (i = 0; i < MAX_VFE_IRQ_DEBUG_DUMP_SIZE; i++) { + trace_msm_cam_ping_pong_debug_dump( + vfe_dev->common_data->vfe_irq_dump. + irq_debug[dump_index % MAX_VFE_IRQ_DEBUG_DUMP_SIZE]); + dump_index++; + } + spin_unlock_irqrestore(&vfe_dev->common_data->vfe_irq_dump. + common_dev_irq_dump_lock, flags); +} + + +void msm_isp_tasklet_debug_dump(struct vfe_device *vfe_dev) +{ + + uint8_t i, dump_index; + unsigned long flags; + + spin_lock_irqsave(&vfe_dev->common_data->vfe_irq_dump. + common_dev_tasklet_dump_lock, flags); + dump_index = vfe_dev->common_data->vfe_irq_dump. + current_tasklet_index; + for (i = 0; i < MAX_VFE_IRQ_DEBUG_DUMP_SIZE; i++) { + trace_msm_cam_tasklet_debug_dump( + vfe_dev->common_data->vfe_irq_dump. + tasklet_debug[ + dump_index % MAX_VFE_IRQ_DEBUG_DUMP_SIZE]); + dump_index++; + } + spin_unlock_irqrestore(&vfe_dev->common_data->vfe_irq_dump. + common_dev_tasklet_dump_lock, flags); +} + +void msm_isp_dump_ping_pong_mismatch(struct vfe_device *vfe_dev) +{ + + trace_msm_cam_string(" ***** msm_isp_dump_irq_debug ****"); + msm_isp_irq_debug_dump(vfe_dev); + trace_msm_cam_string(" ***** msm_isp_dump_taskelet_debug ****"); + msm_isp_tasklet_debug_dump(vfe_dev); +} diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h index f4280581a730..d075bd1721ac 100644 --- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h +++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h @@ -72,4 +72,9 @@ void msm_isp_print_fourcc_error(const char *origin, uint32_t fourcc_format); void msm_isp_flush_tasklet(struct vfe_device *vfe_dev); void msm_isp_get_timestamp(struct msm_isp_timestamp *time_stamp, struct vfe_device *vfe_dev); +void msm_isp_dump_ping_pong_mismatch(struct vfe_device *vfe_dev); +int msm_isp_process_overflow_irq( + struct vfe_device *vfe_dev, + uint32_t *irq_status0, uint32_t *irq_status1, + uint8_t force_overflow); #endif /* __MSM_ISP_UTIL_H__ */ diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c index 4527d6699b88..1cf2c54aa8b8 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c @@ -1372,6 +1372,7 @@ static int cpp_open_node(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) mutex_unlock(&cpp_dev->mutex); return rc; } + cpp_dev->state = CPP_STATE_IDLE; CPP_DBG("Invoking msm_ion_client_create()\n"); @@ -2479,7 +2480,7 @@ static int msm_cpp_cfg_frame(struct cpp_device *cpp_dev, struct msm_buf_mngr_info buff_mgr_info, dup_buff_mgr_info; int32_t in_fd; int32_t num_output_bufs = 1; - int32_t stripe_base = 0; + uint32_t stripe_base = 0; uint32_t stripe_size; uint8_t tnr_enabled; enum msm_camera_buf_mngr_buf_type buf_type = @@ -2514,6 +2515,13 @@ static int msm_cpp_cfg_frame(struct cpp_device *cpp_dev, return -EINVAL; } + if (stripe_base == UINT_MAX || new_frame->num_strips > + (UINT_MAX - 1 - stripe_base) / stripe_size) { + pr_err("Invalid frame message,num_strips %d is large\n", + new_frame->num_strips); + return -EINVAL; + } + if ((stripe_base + new_frame->num_strips * stripe_size + 1) != new_frame->msg_len) { pr_err("Invalid frame message,len=%d,expected=%d\n", @@ -4177,27 +4185,22 @@ static int msm_cpp_update_gdscr_status(struct cpp_device *cpp_dev, bool status) { int rc = 0; - int value = 0; - + uint32_t msm_cpp_reg_idx; if (!cpp_dev) { pr_err("%s: cpp device invalid\n", __func__); rc = -EINVAL; goto end; } - - if (cpp_dev->camss_cpp_base) { - value = msm_camera_io_r(cpp_dev->camss_cpp_base); - pr_debug("value from camss cpp %x, status %d\n", value, status); - if (status) { - value &= CPP_GDSCR_SW_COLLAPSE_ENABLE; - value |= CPP_GDSCR_HW_CONTROL_ENABLE; - } else { - value |= CPP_GDSCR_HW_CONTROL_DISABLE; - value &= CPP_GDSCR_SW_COLLAPSE_DISABLE; - } - pr_debug("value %x after camss cpp mask\n", value); - msm_camera_io_w(value, cpp_dev->camss_cpp_base); + msm_cpp_reg_idx = msm_cpp_get_regulator_index(cpp_dev, "vdd"); + if (msm_cpp_reg_idx < 0) { + pr_err(" Fail to regulator index\n"); + return -EINVAL; } + rc = msm_camera_regulator_set_mode(cpp_dev->cpp_vdd + + msm_cpp_reg_idx, 1, status); + if (rc < 0) + pr_err("update cpp gdscr status failed\n"); + end: return rc; } @@ -4306,14 +4309,6 @@ static int cpp_probe(struct platform_device *pdev) memset(&cpp_vbif, 0, sizeof(struct msm_cpp_vbif_data)); cpp_dev->vbif_data = &cpp_vbif; - cpp_dev->camss_cpp_base = - msm_camera_get_reg_base(pdev, "camss_cpp", true); - if (!cpp_dev->camss_cpp_base) { - rc = -ENOMEM; - pr_err("failed to get camss_cpp_base\n"); - goto camss_cpp_base_failed; - } - cpp_dev->base = msm_camera_get_reg_base(pdev, "cpp", true); if (!cpp_dev->base) { @@ -4485,7 +4480,7 @@ vbif_base_failed: cpp_base_failed: msm_camera_put_reg_base(pdev, cpp_dev->camss_cpp_base, "camss_cpp", true); -camss_cpp_base_failed: + kfree(cpp_dev); return rc; } diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h index 470c0cf1131b..e69b9d633a1f 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h @@ -289,6 +289,8 @@ struct cpp_device { int msm_cpp_set_micro_clk(struct cpp_device *cpp_dev); int msm_update_freq_tbl(struct cpp_device *cpp_dev); int msm_cpp_get_clock_index(struct cpp_device *cpp_dev, const char *clk_name); +int msm_cpp_get_regulator_index(struct cpp_device *cpp_dev, + const char *regulator_name); long msm_cpp_set_core_clk(struct cpp_device *cpp_dev, long rate, int idx); void msm_cpp_fetch_dt_params(struct cpp_device *cpp_dev); int msm_cpp_read_payload_params_from_dt(struct cpp_device *cpp_dev); diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c index ddd32fc5c339..f016c348f144 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c @@ -71,6 +71,18 @@ int msm_cpp_get_clock_index(struct cpp_device *cpp_dev, const char *clk_name) return -EINVAL; } +int msm_cpp_get_regulator_index(struct cpp_device *cpp_dev, + const char *regulator_name) +{ + uint32_t i = 0; + + for (i = 0; i < cpp_dev->num_reg; i++) { + if (!strcmp(regulator_name, cpp_dev->cpp_vdd[i].name)) + return i; + } + return -EINVAL; +} + static int cpp_get_clk_freq_tbl_dt(struct cpp_device *cpp_dev) { uint32_t i, count, min_clk_rate; diff --git a/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.c b/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.c index f2f1dca81f18..d7fb2449582c 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.c +++ b/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2015 The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2016 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1054,10 +1054,16 @@ static int vpe_reset(struct vpe_device *vpe_dev) return rc; } -static void vpe_update_scale_coef(struct vpe_device *vpe_dev, uint32_t *p) +static int vpe_update_scale_coef(struct vpe_device *vpe_dev, uint32_t *p) { uint32_t i, offset; offset = *p; + + if (offset > VPE_SCALE_COEFF_MAX_N-VPE_SCALE_COEFF_NUM) { + pr_err("%s: invalid offset %d passed in", __func__, offset); + return -EINVAL; + } + for (i = offset; i < (VPE_SCALE_COEFF_NUM + offset); i++) { VPE_DBG("Setting scale table %d\n", i); msm_camera_io_w(*(++p), @@ -1065,6 +1071,8 @@ static void vpe_update_scale_coef(struct vpe_device *vpe_dev, uint32_t *p) msm_camera_io_w(*(++p), vpe_dev->base + VPE_SCALE_COEFF_MSBn(i)); } + + return 0; } static void vpe_input_plane_config(struct vpe_device *vpe_dev, uint32_t *p) @@ -1102,13 +1110,16 @@ static void vpe_operation_config(struct vpe_device *vpe_dev, uint32_t *p) */ static void msm_vpe_transaction_setup(struct vpe_device *vpe_dev, void *data) { - int i; + int i, rc = 0; void *iter = data; vpe_mem_dump("vpe_transaction", data, VPE_TRANSACTION_SETUP_CONFIG_LEN); for (i = 0; i < VPE_NUM_SCALER_TABLES; ++i) { - vpe_update_scale_coef(vpe_dev, (uint32_t *)iter); + rc = vpe_update_scale_coef(vpe_dev, (uint32_t *)iter); + if (rc != 0) + return; + iter += VPE_SCALER_CONFIG_LEN; } vpe_input_plane_config(vpe_dev, (uint32_t *)iter); diff --git a/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.h b/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.h index f1869a2b9776..0c55ff70309e 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.h +++ b/drivers/media/platform/msm/camera_v2/pproc/vpe/msm_vpe.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2014, 2016 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -70,6 +70,7 @@ #define VPE_SCALE_COEFF_LSBn(n) (0x50400 + 8 * (n)) #define VPE_SCALE_COEFF_MSBn(n) (0x50404 + 8 * (n)) #define VPE_SCALE_COEFF_NUM 32 +#define VPE_SCALE_COEFF_MAX_N 127 /*********** end of register offset ********************/ diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_dev.c b/drivers/media/platform/msm/sde/rotator/sde_rotator_dev.c index 4008bae5ffee..347c0bef163f 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_dev.c +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_dev.c @@ -416,23 +416,10 @@ static int sde_rotator_start_streaming(struct vb2_queue *q, unsigned int count) { struct sde_rotator_ctx *ctx = vb2_get_drv_priv(q); struct sde_rotator_device *rot_dev = ctx->rot_dev; - struct sde_rotation_config config; - int ret; SDEDEV_DBG(rot_dev->dev, "start streaming s:%d t:%d\n", ctx->session_id, q->type); - sde_rot_mgr_lock(rot_dev->mgr); - sde_rotator_get_config_from_ctx(ctx, &config); - ret = sde_rotator_session_config(rot_dev->mgr, ctx->private, &config); - sde_rot_mgr_unlock(rot_dev->mgr); - if (ret < 0) { - SDEDEV_ERR(rot_dev->dev, - "fail config in stream on s:%d t:%d r:%d\n", - ctx->session_id, q->type, ret); - return -EINVAL; - } - if (!IS_ERR_OR_NULL(ctx->request) || atomic_read(&ctx->command_pending)) SDEDEV_ERR(rot_dev->dev, @@ -1501,11 +1488,39 @@ static int sde_rotator_streamon(struct file *file, void *fh, enum v4l2_buf_type buf_type) { struct sde_rotator_ctx *ctx = sde_rotator_ctx_from_fh(fh); + struct sde_rotator_device *rot_dev = ctx->rot_dev; + struct sde_rotation_config config; + struct vb2_queue *vq; int ret; SDEDEV_DBG(ctx->rot_dev->dev, "stream on s:%d t:%d\n", ctx->session_id, buf_type); + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + buf_type == V4L2_BUF_TYPE_VIDEO_OUTPUT ? + V4L2_BUF_TYPE_VIDEO_CAPTURE : + V4L2_BUF_TYPE_VIDEO_OUTPUT); + + if (!vq) { + SDEDEV_ERR(ctx->rot_dev->dev, "fail to get vq on s:%d t:%d\n", + ctx->session_id, buf_type); + return -EINVAL; + } + + if (vb2_is_streaming(vq)) { + sde_rot_mgr_lock(rot_dev->mgr); + sde_rotator_get_config_from_ctx(ctx, &config); + ret = sde_rotator_session_config(rot_dev->mgr, ctx->private, + &config); + sde_rot_mgr_unlock(rot_dev->mgr); + if (ret < 0) { + SDEDEV_ERR(rot_dev->dev, + "fail config in stream on s:%d t:%d r:%d\n", + ctx->session_id, buf_type, ret); + return ret; + } + } + ret = v4l2_m2m_streamon(file, ctx->fh.m2m_ctx, buf_type); if (ret < 0) SDEDEV_ERR(ctx->rot_dev->dev, "fail stream on s:%d t:%d\n", diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c index 9970c4152ef9..30d1bae48e7d 100644 --- a/drivers/media/platform/msm/vidc/venus_hfi.c +++ b/drivers/media/platform/msm/vidc/venus_hfi.c @@ -4418,6 +4418,7 @@ static void __unload_fw(struct venus_hfi_device *device) if (device->state != VENUS_STATE_DEINIT) flush_workqueue(device->venus_pm_workq); + __vote_buses(device, NULL, 0); subsystem_put(device->resources.fw.cookie); __interface_queues_release(device); __venus_power_off(device, false); diff --git a/drivers/mfd/wcd9xxx-irq.c b/drivers/mfd/wcd9xxx-irq.c index b6a476cd882d..2bc8bdff54f1 100644 --- a/drivers/mfd/wcd9xxx-irq.c +++ b/drivers/mfd/wcd9xxx-irq.c @@ -698,20 +698,27 @@ static int wcd9xxx_map_irq(struct wcd9xxx_core_resource *wcd9xxx_res, int irq) static int wcd9xxx_irq_probe(struct platform_device *pdev) { - int irq; + int irq, dir_apps_irq = -EINVAL; struct wcd9xxx_irq_drv_data *data; struct device_node *node = pdev->dev.of_node; int ret = -EINVAL; irq = of_get_named_gpio(node, "qcom,gpio-connect", 0); - if (!gpio_is_valid(irq)) { + if (!gpio_is_valid(irq)) + dir_apps_irq = platform_get_irq_byname(pdev, "wcd_irq"); + + if (!gpio_is_valid(irq) && dir_apps_irq < 0) { dev_err(&pdev->dev, "TLMM connect gpio not found\n"); return -EPROBE_DEFER; } else { - irq = gpio_to_irq(irq); - if (irq < 0) { - dev_err(&pdev->dev, "Unable to configure irq\n"); - return irq; + if (dir_apps_irq > 0) { + irq = dir_apps_irq; + } else { + irq = gpio_to_irq(irq); + if (irq < 0) { + dev_err(&pdev->dev, "Unable to configure irq\n"); + return irq; + } } dev_dbg(&pdev->dev, "%s: virq = %d\n", __func__, irq); data = wcd9xxx_irq_add_domain(node, node->parent); diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c index 6b3d84a2c145..20949487f859 100644 --- a/drivers/misc/qseecom.c +++ b/drivers/misc/qseecom.c @@ -7660,11 +7660,11 @@ static void __qseecom_deinit_clk(enum qseecom_ce_hw_instance ce) } if (qclk->ce_core_clk != NULL) { clk_put(qclk->ce_core_clk); - qclk->ce_clk = NULL; + qclk->ce_core_clk = NULL; } if (qclk->ce_bus_clk != NULL) { clk_put(qclk->ce_bus_clk); - qclk->ce_clk = NULL; + qclk->ce_bus_clk = NULL; } if (qclk->ce_core_src_clk != NULL) { clk_put(qclk->ce_core_src_clk); diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index a3f650f5ee9f..7aa01372412d 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1192,10 +1192,6 @@ static int mmc_select_hs400(struct mmc_card *card) if (host->caps & MMC_CAP_WAIT_WHILE_BUSY) send_status = false; - /* Reduce frequency to HS frequency */ - max_dtr = card->ext_csd.hs_max_dtr; - mmc_set_clock(host, max_dtr); - /* Switch card to HS mode */ val = EXT_CSD_TIMING_HS; err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, @@ -1211,6 +1207,10 @@ static int mmc_select_hs400(struct mmc_card *card) /* Set host controller to HS timing */ mmc_set_timing(card->host, MMC_TIMING_MMC_HS); + /* Reduce frequency to HS frequency */ + max_dtr = card->ext_csd.hs_max_dtr; + mmc_set_clock(host, max_dtr); + if (!send_status) { err = mmc_switch_status(card); if (err) diff --git a/drivers/net/ppp/ppp_generic.c b/drivers/net/ppp/ppp_generic.c index e5bb870b5461..fa76ca128e1b 100644 --- a/drivers/net/ppp/ppp_generic.c +++ b/drivers/net/ppp/ppp_generic.c @@ -2390,6 +2390,8 @@ ppp_unregister_channel(struct ppp_channel *chan) spin_lock_bh(&pn->all_channels_lock); list_del(&pch->list); spin_unlock_bh(&pn->all_channels_lock); + put_net(pch->chan_net); + pch->chan_net = NULL; pch->file.dead = 1; wake_up_interruptible(&pch->file.rwait); diff --git a/drivers/power/qcom-charger/fg-core.h b/drivers/power/qcom-charger/fg-core.h index 6f8266a3161c..07bde30524ac 100644 --- a/drivers/power/qcom-charger/fg-core.h +++ b/drivers/power/qcom-charger/fg-core.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -62,6 +62,7 @@ CHARS_PER_ITEM) + 1) \ #define FG_SRAM_ADDRESS_MAX 255 +#define FG_SRAM_LEN 504 #define PROFILE_LEN 224 #define PROFILE_COMP_LEN 148 #define BUCKET_COUNT 8 @@ -160,6 +161,8 @@ enum fg_sram_param_id { FG_SRAM_RECHARGE_VBATT_THR, FG_SRAM_KI_COEFF_MED_DISCHG, FG_SRAM_KI_COEFF_HI_DISCHG, + FG_SRAM_ESR_TIGHT_FILTER, + FG_SRAM_ESR_BROAD_FILTER, FG_SRAM_MAX, }; @@ -224,6 +227,11 @@ struct fg_dt_props { int cl_min_cap_limit; int jeita_hyst_temp; int batt_temp_delta; + int esr_flt_switch_temp; + int esr_tight_flt_upct; + int esr_broad_flt_upct; + int esr_tight_lt_flt_upct; + int esr_broad_lt_flt_upct; int jeita_thresholds[NUM_JEITA_LEVELS]; int ki_coeff_soc[KI_COEFF_SOC_LEVELS]; int ki_coeff_med_dischg[KI_COEFF_SOC_LEVELS]; @@ -336,12 +344,14 @@ struct fg_chip { bool ki_coeff_dischg_en; bool esr_fcc_ctrl_en; bool soc_reporting_ready; + bool esr_flt_cold_temp_en; struct completion soc_update; struct completion soc_ready; struct delayed_work profile_load_work; struct work_struct status_change_work; struct work_struct cycle_count_work; struct delayed_work batt_avg_work; + struct delayed_work sram_dump_work; struct fg_circ_buf ibatt_circ_buf; struct fg_circ_buf vbatt_circ_buf; }; @@ -392,6 +402,7 @@ extern int fg_clear_ima_errors_if_any(struct fg_chip *chip, bool check_hw_sts); extern int fg_clear_dma_errors_if_any(struct fg_chip *chip); extern int fg_debugfs_create(struct fg_chip *chip); extern void fill_string(char *str, size_t str_len, u8 *buf, int buf_len); +extern void dump_sram(u8 *buf, int addr, int len); extern int64_t twos_compliment_extend(int64_t val, int s_bit_pos); extern s64 fg_float_decode(u16 val); extern bool is_input_present(struct fg_chip *chip); diff --git a/drivers/power/qcom-charger/fg-util.c b/drivers/power/qcom-charger/fg-util.c index 405d875ea7df..41d2af0fbdc6 100644 --- a/drivers/power/qcom-charger/fg-util.c +++ b/drivers/power/qcom-charger/fg-util.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -10,8 +10,6 @@ * GNU General Public License for more details. */ -#define pr_fmt(fmt) "FG: %s: " fmt, __func__ - #include "fg-core.h" void fg_circ_buf_add(struct fg_circ_buf *buf, int val) @@ -174,6 +172,24 @@ void fill_string(char *str, size_t str_len, u8 *buf, int buf_len) } } +void dump_sram(u8 *buf, int addr, int len) +{ + int i; + char str[16]; + + /* + * Length passed should be in multiple of 4 as each FG SRAM word + * holds 4 bytes. To keep this simple, even if a length which is + * not a multiple of 4 bytes or less than 4 bytes is passed, SRAM + * registers dumped will be always in multiple of 4 bytes. + */ + for (i = 0; i < len; i += 4) { + str[0] = '\0'; + fill_string(str, sizeof(str), buf + i, 4); + pr_info("%03d %s\n", addr + (i / 4), str); + } +} + static inline bool fg_sram_address_valid(u16 address, int len) { if (address > FG_SRAM_ADDRESS_MAX) diff --git a/drivers/power/qcom-charger/pmic-voter.c b/drivers/power/qcom-charger/pmic-voter.c index 8072b63f53fe..e1a92fb23912 100644 --- a/drivers/power/qcom-charger/pmic-voter.c +++ b/drivers/power/qcom-charger/pmic-voter.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -21,6 +21,7 @@ #include "pmic-voter.h" #define NUM_MAX_CLIENTS 8 +#define DEBUG_FORCE_CLIENT "DEBUG_FORCE_CLIENT" static DEFINE_SPINLOCK(votable_list_slock); static LIST_HEAD(votable_list); @@ -48,7 +49,12 @@ struct votable { const char *effective_client); char *client_strs[NUM_MAX_CLIENTS]; bool voted_on; - struct dentry *ent; + struct dentry *root; + struct dentry *status_ent; + u32 force_val; + struct dentry *force_val_ent; + bool force_active; + struct dentry *force_active_ent; }; /** @@ -236,6 +242,9 @@ int get_client_vote(struct votable *votable, const char *client_str) */ int get_effective_result_locked(struct votable *votable) { + if (votable->force_active) + return votable->force_val; + return votable->effective_result; } @@ -249,8 +258,29 @@ int get_effective_result(struct votable *votable) return value; } +/** + * get_effective_client() - + * get_effective_client_locked() - + * The unlocked and locked variants of getting the effective client + * amongst all the enabled voters. + * + * @votable: the votable object + * + * Returns: + * The effective client. + * For MIN and MAX votable, returns NULL when the votable + * object has been created but no clients have casted their votes or + * the last enabled client disables its vote. + * For SET_ANY votable it returns NULL too when no clients have casted + * their votes. But for SET_ANY since there is no concept of abstaining + * from election, the only client that casts a vote or the client that + * caused the result to change is returned. + */ const char *get_effective_client_locked(struct votable *votable) { + if (votable->force_active) + return DEBUG_FORCE_CLIENT; + return get_client_str(votable, votable->effective_client_id); } @@ -313,7 +343,7 @@ int vote(struct votable *votable, const char *client_str, bool enabled, int val) if ((votable->votes[client_id].enabled == enabled) && (votable->votes[client_id].value == val)) { - pr_debug("%s: %s,%d same vote %s of %d\n", + pr_debug("%s: %s,%d same vote %s of val=%d\n", votable->name, client_str, client_id, enabled ? "on" : "off", @@ -325,13 +355,13 @@ int vote(struct votable *votable, const char *client_str, bool enabled, int val) votable->votes[client_id].value = val; if (similar_vote && votable->voted_on) { - pr_debug("%s: %s,%d Similar vote %s of %d\n", + pr_debug("%s: %s,%d Ignoring similar vote %s of val=%d\n", votable->name, client_str, client_id, enabled ? "on" : "off", val); goto out; } - pr_debug("%s: %s,%d voting %s of %d\n", + pr_debug("%s: %s,%d voting %s of val=%d\n", votable->name, client_str, client_id, enabled ? "on" : "off", val); switch (votable->type) { @@ -361,7 +391,7 @@ int vote(struct votable *votable, const char *client_str, bool enabled, int val) votable->name, effective_result, get_client_str(votable, effective_id), effective_id); - if (votable->callback) + if (votable->callback && !votable->force_active) rc = votable->callback(votable, votable->data, effective_result, get_client_str(votable, effective_id)); @@ -412,6 +442,42 @@ out: return NULL; } +static int force_active_get(void *data, u64 *val) +{ + struct votable *votable = data; + + *val = votable->force_active; + + return 0; +} + +static int force_active_set(void *data, u64 val) +{ + struct votable *votable = data; + int rc = 0; + + lock_votable(votable); + votable->force_active = !!val; + + if (!votable->callback) + goto out; + + if (votable->force_active) { + rc = votable->callback(votable, votable->data, + votable->force_val, + DEBUG_FORCE_CLIENT); + } else { + rc = votable->callback(votable, votable->data, + votable->effective_result, + get_client_str(votable, votable->effective_client_id)); + } +out: + unlock_votable(votable); + return rc; +} +DEFINE_SIMPLE_ATTRIBUTE(votable_force_ops, force_active_get, force_active_set, + "%lld\n"); + static int show_votable_clients(struct seq_file *m, void *data) { struct votable *votable = m->private; @@ -421,8 +487,8 @@ static int show_votable_clients(struct seq_file *m, void *data) lock_votable(votable); - seq_printf(m, "%s:\n", votable->name); - seq_puts(m, "Clients:\n"); + seq_printf(m, "Votable %s:\n", votable->name); + seq_puts(m, "clients:\n"); for (i = 0; i < votable->num_clients; i++) { if (votable->client_strs[i]) { seq_printf(m, "%-15s:\t\ten=%d\t\tv=%d\n", @@ -444,7 +510,7 @@ static int show_votable_clients(struct seq_file *m, void *data) break; } - seq_printf(m, "Type: %s\n", type_str); + seq_printf(m, "type: %s\n", type_str); seq_puts(m, "Effective:\n"); effective_client_str = get_effective_client_locked(votable); seq_printf(m, "%-15s:\t\tv=%d\n", @@ -455,16 +521,16 @@ static int show_votable_clients(struct seq_file *m, void *data) return 0; } -static int votable_debugfs_open(struct inode *inode, struct file *file) +static int votable_status_open(struct inode *inode, struct file *file) { struct votable *votable = inode->i_private; return single_open(file, show_votable_clients, votable); } -static const struct file_operations votable_debugfs_ops = { +static const struct file_operations votable_status_ops = { .owner = THIS_MODULE, - .open = votable_debugfs_open, + .open = votable_status_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, @@ -527,11 +593,45 @@ struct votable *create_votable(const char *name, list_add(&votable->list, &votable_list); spin_unlock_irqrestore(&votable_list_slock, flags); - votable->ent = debugfs_create_file(name, S_IFREG | S_IRUGO, - debug_root, votable, - &votable_debugfs_ops); - if (!votable->ent) { - pr_err("Couldn't create %s debug file\n", name); + votable->root = debugfs_create_dir(name, debug_root); + if (!votable->root) { + pr_err("Couldn't create debug dir %s\n", name); + kfree(votable->name); + kfree(votable); + return ERR_PTR(-ENOMEM); + } + + votable->status_ent = debugfs_create_file("status", S_IFREG | S_IRUGO, + votable->root, votable, + &votable_status_ops); + if (!votable->status_ent) { + pr_err("Couldn't create status dbg file for %s\n", name); + debugfs_remove_recursive(votable->root); + kfree(votable->name); + kfree(votable); + return ERR_PTR(-EEXIST); + } + + votable->force_val_ent = debugfs_create_u32("force_val", + S_IFREG | S_IWUSR | S_IRUGO, + votable->root, + &(votable->force_val)); + + if (!votable->force_val_ent) { + pr_err("Couldn't create force_val dbg file for %s\n", name); + debugfs_remove_recursive(votable->root); + kfree(votable->name); + kfree(votable); + return ERR_PTR(-EEXIST); + } + + votable->force_active_ent = debugfs_create_file("force_active", + S_IFREG | S_IRUGO, + votable->root, votable, + &votable_force_ops); + if (!votable->force_active_ent) { + pr_err("Couldn't create force_active dbg file for %s\n", name); + debugfs_remove_recursive(votable->root); kfree(votable->name); kfree(votable); return ERR_PTR(-EEXIST); @@ -552,7 +652,8 @@ void destroy_votable(struct votable *votable) list_del(&votable->list); spin_unlock_irqrestore(&votable_list_slock, flags); - debugfs_remove(votable->ent); + debugfs_remove_recursive(votable->root); + for (i = 0; i < votable->num_clients && votable->client_strs[i]; i++) kfree(votable->client_strs[i]); diff --git a/drivers/power/qcom-charger/qpnp-fg-gen3.c b/drivers/power/qcom-charger/qpnp-fg-gen3.c index edd9b9ff28cf..8523efa1a4ab 100644 --- a/drivers/power/qcom-charger/qpnp-fg-gen3.c +++ b/drivers/power/qcom-charger/qpnp-fg-gen3.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -12,6 +12,7 @@ #define pr_fmt(fmt) "FG: %s: " fmt, __func__ +#include <linux/ktime.h> #include <linux/of.h> #include <linux/of_irq.h> #include <linux/of_platform.h> @@ -36,6 +37,11 @@ #define SYS_TERM_CURR_OFFSET 0 #define VBATT_FULL_WORD 7 #define VBATT_FULL_OFFSET 0 +#define ESR_FILTER_WORD 8 +#define ESR_UPD_TIGHT_OFFSET 0 +#define ESR_UPD_BROAD_OFFSET 1 +#define ESR_UPD_TIGHT_LOW_TEMP_OFFSET 2 +#define ESR_UPD_BROAD_LOW_TEMP_OFFSET 3 #define KI_COEFF_MED_DISCHG_WORD 9 #define KI_COEFF_MED_DISCHG_OFFSET 3 #define KI_COEFF_HI_DISCHG_WORD 10 @@ -202,6 +208,10 @@ static struct fg_sram_param pmi8998_v1_sram_params[] = { PARAM(KI_COEFF_HI_DISCHG, KI_COEFF_HI_DISCHG_WORD, KI_COEFF_HI_DISCHG_OFFSET, 1, 1000, 244141, 0, fg_encode_default, NULL), + PARAM(ESR_TIGHT_FILTER, ESR_FILTER_WORD, ESR_UPD_TIGHT_OFFSET, + 1, 512, 1000000, 0, fg_encode_default, NULL), + PARAM(ESR_BROAD_FILTER, ESR_FILTER_WORD, ESR_UPD_BROAD_OFFSET, + 1, 512, 1000000, 0, fg_encode_default, NULL), }; static struct fg_sram_param pmi8998_v2_sram_params[] = { @@ -262,6 +272,10 @@ static struct fg_sram_param pmi8998_v2_sram_params[] = { PARAM(KI_COEFF_HI_DISCHG, KI_COEFF_HI_DISCHG_v2_WORD, KI_COEFF_HI_DISCHG_v2_OFFSET, 1, 1000, 244141, 0, fg_encode_default, NULL), + PARAM(ESR_TIGHT_FILTER, ESR_FILTER_WORD, ESR_UPD_TIGHT_OFFSET, + 1, 512, 1000000, 0, fg_encode_default, NULL), + PARAM(ESR_BROAD_FILTER, ESR_FILTER_WORD, ESR_UPD_BROAD_OFFSET, + 1, 512, 1000000, 0, fg_encode_default, NULL), }; static struct fg_alg_flag pmi8998_v1_alg_flags[] = { @@ -330,17 +344,18 @@ module_param_named( debug_mask, fg_gen3_debug_mask, int, S_IRUSR | S_IWUSR ); -static int fg_sram_update_period_ms = 30000; +static bool fg_profile_dump; module_param_named( - sram_update_period_ms, fg_sram_update_period_ms, int, S_IRUSR | S_IWUSR + profile_dump, fg_profile_dump, bool, S_IRUSR | S_IWUSR ); -static bool fg_sram_dump; +static int fg_sram_dump_period_ms = 20000; module_param_named( - sram_dump, fg_sram_dump, bool, S_IRUSR | S_IWUSR + sram_dump_period_ms, fg_sram_dump_period_ms, int, S_IRUSR | S_IWUSR ); static int fg_restart; +static bool fg_sram_dump; /* All getters HERE */ @@ -797,7 +812,7 @@ static const char *fg_get_battery_type(struct fg_chip *chip) if (chip->bp.batt_type_str) { if (chip->profile_loaded) return chip->bp.batt_type_str; - else + else if (chip->profile_available) return LOADING_BATT_TYPE; } @@ -1548,6 +1563,65 @@ static int fg_adjust_recharge_soc(struct fg_chip *chip) return 0; } +static int fg_esr_filter_config(struct fg_chip *chip, int batt_temp) +{ + u8 esr_tight_lt_flt, esr_broad_lt_flt; + bool cold_temp = false; + int rc; + + /* + * If the battery temperature is lower than -20 C, then skip modifying + * ESR filter. + */ + if (batt_temp < -210) + return 0; + + /* + * If battery temperature is lesser than 10 C (default), then apply the + * normal ESR tight and broad filter values to ESR low temperature tight + * and broad filters. If battery temperature is higher than 10 C, then + * apply back the low temperature ESR filter coefficients to ESR low + * temperature tight and broad filters. + */ + if (batt_temp > chip->dt.esr_flt_switch_temp + && chip->esr_flt_cold_temp_en) { + fg_encode(chip->sp, FG_SRAM_ESR_TIGHT_FILTER, + chip->dt.esr_tight_lt_flt_upct, &esr_tight_lt_flt); + fg_encode(chip->sp, FG_SRAM_ESR_BROAD_FILTER, + chip->dt.esr_broad_lt_flt_upct, &esr_broad_lt_flt); + } else if (batt_temp <= chip->dt.esr_flt_switch_temp + && !chip->esr_flt_cold_temp_en) { + fg_encode(chip->sp, FG_SRAM_ESR_TIGHT_FILTER, + chip->dt.esr_tight_flt_upct, &esr_tight_lt_flt); + fg_encode(chip->sp, FG_SRAM_ESR_BROAD_FILTER, + chip->dt.esr_broad_flt_upct, &esr_broad_lt_flt); + cold_temp = true; + } else { + return 0; + } + + rc = fg_sram_write(chip, ESR_FILTER_WORD, + ESR_UPD_TIGHT_LOW_TEMP_OFFSET, &esr_tight_lt_flt, 1, + FG_IMA_DEFAULT); + if (rc < 0) { + pr_err("Error in writing ESR LT tight filter, rc=%d\n", rc); + return rc; + } + + rc = fg_sram_write(chip, ESR_FILTER_WORD, + ESR_UPD_BROAD_LOW_TEMP_OFFSET, &esr_broad_lt_flt, 1, + FG_IMA_DEFAULT); + if (rc < 0) { + pr_err("Error in writing ESR LT broad filter, rc=%d\n", rc); + return rc; + } + + chip->esr_flt_cold_temp_en = cold_temp; + fg_dbg(chip, FG_STATUS, "applied %s ESR filter values\n", + cold_temp ? "cold" : "normal"); + return 0; +} + static int fg_esr_fcc_config(struct fg_chip *chip) { union power_supply_propval prop = {0, }; @@ -1615,6 +1689,18 @@ static int fg_esr_fcc_config(struct fg_chip *chip) return 0; } +static int fg_batt_missing_config(struct fg_chip *chip, bool enable) +{ + int rc; + + rc = fg_masked_write(chip, BATT_INFO_BATT_MISS_CFG(chip), + BM_FROM_BATT_ID_BIT, enable ? BM_FROM_BATT_ID_BIT : 0); + if (rc < 0) + pr_err("Error in writing to %04x, rc=%d\n", + BATT_INFO_BATT_MISS_CFG(chip), rc); + return rc; +} + static void fg_batt_avg_update(struct fg_chip *chip) { if (chip->charge_status == chip->prev_charge_status) @@ -1838,18 +1924,6 @@ static int fg_get_cycle_count(struct fg_chip *chip) return count; } -static void dump_sram(u8 *buf, int len) -{ - int i; - char str[16]; - - for (i = 0; i < len; i += 4) { - str[0] = '\0'; - fill_string(str, sizeof(str), buf + i, 4); - pr_info("%03d %s\n", PROFILE_LOAD_WORD + (i / 4), str); - } -} - #define PROFILE_LOAD_BIT BIT(0) #define BOOTLOADER_LOAD_BIT BIT(1) #define BOOTLOADER_RESTART_BIT BIT(2) @@ -1885,11 +1959,13 @@ static bool is_profile_load_required(struct fg_chip *chip) if (!chip->dt.force_load_profile) { pr_warn("Profiles doesn't match, skipping loading it since force_load_profile is disabled\n"); - if (fg_sram_dump) { + if (fg_profile_dump) { pr_info("FG: loaded profile:\n"); - dump_sram(buf, PROFILE_COMP_LEN); + dump_sram(buf, PROFILE_LOAD_WORD, + PROFILE_COMP_LEN); pr_info("FG: available profile:\n"); - dump_sram(chip->batt_profile, PROFILE_LEN); + dump_sram(chip->batt_profile, PROFILE_LOAD_WORD, + PROFILE_LEN); } return false; } @@ -1897,14 +1973,26 @@ static bool is_profile_load_required(struct fg_chip *chip) fg_dbg(chip, FG_STATUS, "Profiles are different, loading the correct one\n"); } else { fg_dbg(chip, FG_STATUS, "Profile integrity bit is not set\n"); - if (fg_sram_dump) { + if (fg_profile_dump) { pr_info("FG: profile to be loaded:\n"); - dump_sram(chip->batt_profile, PROFILE_LEN); + dump_sram(chip->batt_profile, PROFILE_LOAD_WORD, + PROFILE_LEN); } } return true; } +static void clear_battery_profile(struct fg_chip *chip) +{ + u8 val = 0; + int rc; + + rc = fg_sram_write(chip, PROFILE_INTEGRITY_WORD, + PROFILE_INTEGRITY_OFFSET, &val, 1, FG_IMA_DEFAULT); + if (rc < 0) + pr_err("failed to write profile integrity rc=%d\n", rc); +} + #define SOC_READY_WAIT_MS 2000 static int __fg_restart(struct fg_chip *chip) { @@ -2056,6 +2144,71 @@ out: vote(chip->awake_votable, PROFILE_LOAD, false, 0); } +static void sram_dump_work(struct work_struct *work) +{ + struct fg_chip *chip = container_of(work, struct fg_chip, + sram_dump_work.work); + u8 buf[FG_SRAM_LEN]; + int rc; + s64 timestamp_ms; + + rc = fg_sram_read(chip, 0, 0, buf, FG_SRAM_LEN, FG_IMA_DEFAULT); + if (rc < 0) { + pr_err("Error in reading FG SRAM, rc:%d\n", rc); + goto resched; + } + + timestamp_ms = ktime_to_ms(ktime_get_boottime()); + fg_dbg(chip, FG_STATUS, "SRAM Dump Started at %lld.%lld\n", + timestamp_ms / 1000, timestamp_ms % 1000); + dump_sram(buf, 0, FG_SRAM_LEN); + timestamp_ms = ktime_to_ms(ktime_get_boottime()); + fg_dbg(chip, FG_STATUS, "SRAM Dump done at %lld.%lld\n", + timestamp_ms / 1000, timestamp_ms % 1000); +resched: + schedule_delayed_work(&chip->sram_dump_work, + msecs_to_jiffies(fg_sram_dump_period_ms)); +} + +static int fg_sram_dump_sysfs(const char *val, const struct kernel_param *kp) +{ + int rc; + struct power_supply *bms_psy; + struct fg_chip *chip; + bool old_val = fg_sram_dump; + + rc = param_set_bool(val, kp); + if (rc) { + pr_err("Unable to set fg_sram_dump: %d\n", rc); + return rc; + } + + if (fg_sram_dump == old_val) + return 0; + + bms_psy = power_supply_get_by_name("bms"); + if (!bms_psy) { + pr_err("bms psy not found\n"); + return -ENODEV; + } + + chip = power_supply_get_drvdata(bms_psy); + if (fg_sram_dump) + schedule_delayed_work(&chip->sram_dump_work, + msecs_to_jiffies(fg_sram_dump_period_ms)); + else + cancel_delayed_work_sync(&chip->sram_dump_work); + + return 0; +} + +static struct kernel_param_ops fg_sram_dump_ops = { + .set = fg_sram_dump_sysfs, + .get = param_get_bool, +}; + +module_param_cb(sram_dump_en, &fg_sram_dump_ops, &fg_sram_dump, 0644); + static int fg_restart_sysfs(const char *val, const struct kernel_param *kp) { int rc; @@ -2148,7 +2301,14 @@ static int fg_get_time_to_full(struct fg_chip *chip, int *val) return -ENODATA; } - if (chip->charge_status == POWER_SUPPLY_STATUS_FULL) { + rc = fg_get_prop_capacity(chip, &msoc); + if (rc < 0) { + pr_err("failed to get msoc rc=%d\n", rc); + return rc; + } + fg_dbg(chip, FG_TTF, "msoc=%d\n", msoc); + + if (msoc >= 100) { *val = 0; return 0; } @@ -2211,13 +2371,6 @@ static int fg_get_time_to_full(struct fg_chip *chip, int *val) act_cap_uah *= MILLI_UNIT; fg_dbg(chip, FG_TTF, "actual_capacity_uah=%d\n", act_cap_uah); - rc = fg_get_prop_capacity(chip, &msoc); - if (rc < 0) { - pr_err("failed to get msoc rc=%d\n", rc); - return rc; - } - fg_dbg(chip, FG_TTF, "msoc=%d\n", msoc); - rc = fg_get_sram_prop(chip, FG_SRAM_FULL_SOC, &full_soc); if (rc < 0) { pr_err("failed to get full soc rc=%d\n", rc); @@ -2257,7 +2410,7 @@ skip_cc_estimate: fg_dbg(chip, FG_TTF, "t_predicted_cc=%lld\n", t_predicted_cc); /* CV estimate starts here */ - if (chip->charge_type == POWER_SUPPLY_CHARGE_TYPE_TAPER) + if (chip->charge_type >= POWER_SUPPLY_CHARGE_TYPE_TAPER) ln_val = ibatt_avg / abs(chip->dt.sys_term_curr_ma); else ln_val = i_cc2cv / abs(chip->dt.sys_term_curr_ma); @@ -2355,7 +2508,7 @@ static int fg_psy_get_property(struct power_supply *psy, pval->intval = chip->cl.nom_cap_uah; break; case POWER_SUPPLY_PROP_RESISTANCE_ID: - rc = fg_get_batt_id(chip, &pval->intval); + pval->intval = chip->batt_id_ohms; break; case POWER_SUPPLY_PROP_BATTERY_TYPE: pval->strval = fg_get_battery_type(chip); @@ -2709,6 +2862,26 @@ static int fg_hw_init(struct fg_chip *chip) } } + fg_encode(chip->sp, FG_SRAM_ESR_TIGHT_FILTER, + chip->dt.esr_tight_flt_upct, buf); + rc = fg_sram_write(chip, chip->sp[FG_SRAM_ESR_TIGHT_FILTER].addr_word, + chip->sp[FG_SRAM_ESR_TIGHT_FILTER].addr_byte, buf, + chip->sp[FG_SRAM_ESR_TIGHT_FILTER].len, FG_IMA_DEFAULT); + if (rc < 0) { + pr_err("Error in writing ESR tight filter, rc=%d\n", rc); + return rc; + } + + fg_encode(chip->sp, FG_SRAM_ESR_BROAD_FILTER, + chip->dt.esr_broad_flt_upct, buf); + rc = fg_sram_write(chip, chip->sp[FG_SRAM_ESR_BROAD_FILTER].addr_word, + chip->sp[FG_SRAM_ESR_BROAD_FILTER].addr_byte, buf, + chip->sp[FG_SRAM_ESR_BROAD_FILTER].len, FG_IMA_DEFAULT); + if (rc < 0) { + pr_err("Error in writing ESR broad filter, rc=%d\n", rc); + return rc; + } + return 0; } @@ -2764,7 +2937,6 @@ static irqreturn_t fg_batt_missing_irq_handler(int irq, void *data) u8 status; int rc; - fg_dbg(chip, FG_IRQ, "irq %d triggered\n", irq); rc = fg_read(chip, BATT_INFO_INT_RT_STS(chip), &status, 1); if (rc < 0) { pr_err("failed to read addr=0x%04x, rc=%d\n", @@ -2772,23 +2944,39 @@ static irqreturn_t fg_batt_missing_irq_handler(int irq, void *data) return IRQ_HANDLED; } + fg_dbg(chip, FG_IRQ, "irq %d triggered sts:%d\n", irq, status); chip->battery_missing = (status & BT_MISS_BIT); if (chip->battery_missing) { chip->profile_available = false; chip->profile_loaded = false; - clear_cycle_counter(chip); chip->soc_reporting_ready = false; - } else { - rc = fg_get_batt_profile(chip); - if (rc < 0) { - chip->soc_reporting_ready = true; - pr_err("Error in getting battery profile, rc:%d\n", rc); - return IRQ_HANDLED; - } - schedule_delayed_work(&chip->profile_load_work, 0); + return IRQ_HANDLED; + } + + rc = fg_batt_missing_config(chip, false); + if (rc < 0) { + pr_err("Error in disabling BMD, rc=%d\n", rc); + return IRQ_HANDLED; } + rc = fg_get_batt_profile(chip); + if (rc < 0) { + chip->soc_reporting_ready = true; + pr_err("Error in getting battery profile, rc:%d\n", rc); + goto enable_bmd; + } + + clear_battery_profile(chip); + schedule_delayed_work(&chip->profile_load_work, 0); + +enable_bmd: + /* Wait for 200ms before enabling BMD again */ + msleep(200); + rc = fg_batt_missing_config(chip, true); + if (rc < 0) + pr_err("Error in enabling BMD, rc=%d\n", rc); + return IRQ_HANDLED; } @@ -2805,6 +2993,10 @@ static irqreturn_t fg_delta_batt_temp_irq_handler(int irq, void *data) return IRQ_HANDLED; } + rc = fg_esr_filter_config(chip, batt_temp); + if (rc < 0) + pr_err("Error in configuring ESR filter rc:%d\n", rc); + if (!is_charger_available(chip)) { chip->last_batt_temp = batt_temp; return IRQ_HANDLED; @@ -3111,6 +3303,11 @@ static int fg_parse_ki_coefficients(struct fg_chip *chip) #define DEFAULT_CL_MAX_LIM_DECIPERC 0 #define BTEMP_DELTA_LOW 2 #define BTEMP_DELTA_HIGH 10 +#define DEFAULT_ESR_FLT_TEMP_DECIDEGC 100 +#define DEFAULT_ESR_TIGHT_FLT_UPCT 3907 +#define DEFAULT_ESR_BROAD_FLT_UPCT 99610 +#define DEFAULT_ESR_TIGHT_LT_FLT_UPCT 48829 +#define DEFAULT_ESR_BROAD_LT_FLT_UPCT 148438 static int fg_parse_dt(struct fg_chip *chip) { struct device_node *child, *revid_node, *node = chip->dev->of_node; @@ -3387,6 +3584,40 @@ static int fg_parse_dt(struct fg_chip *chip) else chip->dt.rconn_mohms = temp; + rc = of_property_read_u32(node, "qcom,fg-esr-filter-switch-temp", + &temp); + if (rc < 0) + chip->dt.esr_flt_switch_temp = DEFAULT_ESR_FLT_TEMP_DECIDEGC; + else + chip->dt.esr_flt_switch_temp = temp; + + rc = of_property_read_u32(node, "qcom,fg-esr-tight-filter-micro-pct", + &temp); + if (rc < 0) + chip->dt.esr_tight_flt_upct = DEFAULT_ESR_TIGHT_FLT_UPCT; + else + chip->dt.esr_tight_flt_upct = temp; + + rc = of_property_read_u32(node, "qcom,fg-esr-broad-filter-micro-pct", + &temp); + if (rc < 0) + chip->dt.esr_broad_flt_upct = DEFAULT_ESR_BROAD_FLT_UPCT; + else + chip->dt.esr_broad_flt_upct = temp; + + rc = of_property_read_u32(node, "qcom,fg-esr-tight-lt-filter-micro-pct", + &temp); + if (rc < 0) + chip->dt.esr_tight_lt_flt_upct = DEFAULT_ESR_TIGHT_LT_FLT_UPCT; + else + chip->dt.esr_tight_lt_flt_upct = temp; + + rc = of_property_read_u32(node, "qcom,fg-esr-broad-lt-filter-micro-pct", + &temp); + if (rc < 0) + chip->dt.esr_broad_lt_flt_upct = DEFAULT_ESR_BROAD_LT_FLT_UPCT; + else + chip->dt.esr_broad_lt_flt_upct = temp; return 0; } @@ -3449,6 +3680,7 @@ static int fg_gen3_probe(struct platform_device *pdev) INIT_WORK(&chip->status_change_work, status_change_work); INIT_WORK(&chip->cycle_count_work, cycle_count_work); INIT_DELAYED_WORK(&chip->batt_avg_work, batt_avg_work); + INIT_DELAYED_WORK(&chip->sram_dump_work, sram_dump_work); rc = fg_memif_init(chip); if (rc < 0) { @@ -3511,9 +3743,13 @@ static int fg_gen3_probe(struct platform_device *pdev) if (!rc) rc = fg_get_battery_temp(chip, &batt_temp); - if (!rc) + if (!rc) { pr_info("battery SOC:%d voltage: %duV temp: %d id: %dKOhms\n", msoc, volt_uv, batt_temp, chip->batt_id_ohms / 1000); + rc = fg_esr_filter_config(chip, batt_temp); + if (rc < 0) + pr_err("Error in configuring ESR filter rc:%d\n", rc); + } device_init_wakeup(chip->dev, true); if (chip->profile_available) @@ -3542,6 +3778,8 @@ static int fg_gen3_suspend(struct device *dev) } cancel_delayed_work_sync(&chip->batt_avg_work); + if (fg_sram_dump) + cancel_delayed_work_sync(&chip->sram_dump_work); return 0; } @@ -3563,6 +3801,9 @@ static int fg_gen3_resume(struct device *dev) fg_circ_buf_clr(&chip->ibatt_circ_buf); fg_circ_buf_clr(&chip->vbatt_circ_buf); schedule_delayed_work(&chip->batt_avg_work, 0); + if (fg_sram_dump) + schedule_delayed_work(&chip->sram_dump_work, + msecs_to_jiffies(fg_sram_dump_period_ms)); return 0; } diff --git a/drivers/power/qcom-charger/qpnp-smb2.c b/drivers/power/qcom-charger/qpnp-smb2.c index 463cbb7cb8ba..a07325102631 100644 --- a/drivers/power/qcom-charger/qpnp-smb2.c +++ b/drivers/power/qcom-charger/qpnp-smb2.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1144,13 +1144,6 @@ static int smb2_configure_typec(struct smb_charger *chg) return rc; } - rc = smblib_validate_initial_typec_legacy_status(chg); - if (rc < 0) { - dev_err(chg->dev, "Couldn't validate typec legacy status rc=%d\n", - rc); - return rc; - } - return rc; } @@ -1891,6 +1884,12 @@ static int smb2_probe(struct platform_device *pdev) goto cleanup; } + rc = smb2_init_hw(chip); + if (rc < 0) { + pr_err("Couldn't initialize hardware rc=%d\n", rc); + goto cleanup; + } + rc = smb2_init_dc_psy(chip); if (rc < 0) { pr_err("Couldn't initialize dc psy rc=%d\n", rc); @@ -1923,12 +1922,6 @@ static int smb2_probe(struct platform_device *pdev) goto cleanup; } - rc = smb2_init_hw(chip); - if (rc < 0) { - pr_err("Couldn't initialize hardware rc=%d\n", rc); - goto cleanup; - } - rc = smb2_determine_initial_status(chip); if (rc < 0) { pr_err("Couldn't determine initial status rc=%d\n", diff --git a/drivers/power/qcom-charger/smb-lib.c b/drivers/power/qcom-charger/smb-lib.c index 86140386f0e3..6d010a11d034 100644 --- a/drivers/power/qcom-charger/smb-lib.c +++ b/drivers/power/qcom-charger/smb-lib.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -16,7 +16,7 @@ #include <linux/iio/consumer.h> #include <linux/power_supply.h> #include <linux/regulator/driver.h> -#include <linux/qpnp/power-on.h> +#include <linux/input/qpnp-power-on.h> #include <linux/irq.h> #include "smb-lib.h" #include "smb-reg.h" @@ -627,6 +627,21 @@ static void smblib_uusb_removal(struct smb_charger *chg) smblib_err(chg, "Couldn't un-vote for USB ICL rc=%d\n", rc); } +static bool smblib_sysok_reason_usbin(struct smb_charger *chg) +{ + int rc; + u8 stat; + + rc = smblib_read(chg, SYSOK_REASON_STATUS_REG, &stat); + if (rc < 0) { + smblib_err(chg, "Couldn't get SYSOK_REASON_STATUS rc=%d\n", rc); + /* assuming 'not usbin' in case of read failure */ + return false; + } + + return stat & SYSOK_REASON_USBIN_BIT; +} + /********************* * VOTABLE CALLBACKS * *********************/ @@ -2852,6 +2867,8 @@ static void smblib_handle_typec_removal(struct smb_charger *chg) typec_source_removal(chg); typec_sink_removal(chg); + chg->usb_ever_removed = true; + smblib_update_usb_type(chg); } @@ -2860,6 +2877,7 @@ static void smblib_handle_typec_insertion(struct smb_charger *chg, { int rp; bool vbus_cc_short = false; + bool valid_legacy_cable; vote(chg->pd_disallowed_votable_indirect, CC_DETACHED_VOTER, false, 0); @@ -2871,10 +2889,12 @@ static void smblib_handle_typec_insertion(struct smb_charger *chg, typec_sink_removal(chg); } + valid_legacy_cable = legacy_cable && + (chg->usb_ever_removed || !smblib_sysok_reason_usbin(chg)); vote(chg->pd_disallowed_votable_indirect, LEGACY_CABLE_VOTER, - legacy_cable, 0); + valid_legacy_cable, 0); - if (legacy_cable) { + if (valid_legacy_cable) { rp = smblib_get_prop_ufp_mode(chg); if (rp == POWER_SUPPLY_TYPEC_SOURCE_HIGH || rp == POWER_SUPPLY_TYPEC_NON_COMPLIANT) { @@ -3476,40 +3496,3 @@ int smblib_deinit(struct smb_charger *chg) return 0; } - -int smblib_validate_initial_typec_legacy_status(struct smb_charger *chg) -{ - int rc; - u8 stat; - - - if (qpnp_pon_is_warm_reset()) - return 0; - - rc = smblib_read(chg, TYPE_C_STATUS_5_REG, &stat); - if (rc < 0) { - smblib_err(chg, "Couldn't read TYPE_C_STATUS_5 rc=%d\n", rc); - return rc; - } - - if ((stat & TYPEC_LEGACY_CABLE_STATUS_BIT) == 0) - return 0; - - rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG, - TYPEC_DISABLE_CMD_BIT, TYPEC_DISABLE_CMD_BIT); - if (rc < 0) { - smblib_err(chg, "Couldn't disable typec rc=%d\n", rc); - return rc; - } - - usleep_range(150000, 151000); - - rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG, - TYPEC_DISABLE_CMD_BIT, 0); - if (rc < 0) { - smblib_err(chg, "Couldn't enable typec rc=%d\n", rc); - return rc; - } - - return 0; -} diff --git a/drivers/power/qcom-charger/smb-lib.h b/drivers/power/qcom-charger/smb-lib.h index f6335aae2637..b65c0211405a 100644 --- a/drivers/power/qcom-charger/smb-lib.h +++ b/drivers/power/qcom-charger/smb-lib.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -233,6 +233,7 @@ struct smb_charger { /* extcon for VBUS / ID notification to USB for uUSB */ struct extcon_dev *extcon; + bool usb_ever_removed; }; int smblib_read(struct smb_charger *chg, u16 addr, u8 *val); @@ -377,8 +378,6 @@ int smblib_get_prop_slave_current_now(struct smb_charger *chg, int smblib_set_prop_ship_mode(struct smb_charger *chg, const union power_supply_propval *val); -int smblib_validate_initial_typec_legacy_status(struct smb_charger *chg); - int smblib_init(struct smb_charger *chg); int smblib_deinit(struct smb_charger *chg); #endif /* __SMB2_CHARGER_H */ diff --git a/drivers/power/qcom-charger/smb-reg.h b/drivers/power/qcom-charger/smb-reg.h index a30efbe3651e..a9606ab1944b 100644 --- a/drivers/power/qcom-charger/smb-reg.h +++ b/drivers/power/qcom-charger/smb-reg.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2016 The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -860,6 +860,10 @@ enum { #define WDOG_STATUS_1_BIT BIT(1) #define BARK_BITE_STATUS_BIT BIT(0) +#define SYSOK_REASON_STATUS_REG (MISC_BASE + 0x0D) +#define SYSOK_REASON_DCIN_BIT BIT(1) +#define SYSOK_REASON_USBIN_BIT BIT(0) + /* MISC Interrupt Bits */ #define SWITCHER_POWER_OK_RT_STS_BIT BIT(7) #define TEMPERATURE_CHANGE_RT_STS_BIT BIT(6) diff --git a/drivers/power/reset/msm-poweroff.c b/drivers/power/reset/msm-poweroff.c index 267df592ba8a..cd02ed5bd46a 100644 --- a/drivers/power/reset/msm-poweroff.c +++ b/drivers/power/reset/msm-poweroff.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -23,7 +23,7 @@ #include <linux/reboot.h> #include <linux/pm.h> #include <linux/delay.h> -#include <linux/qpnp/power-on.h> +#include <linux/input/qpnp-power-on.h> #include <linux/of_address.h> #include <asm/cacheflush.h> diff --git a/drivers/soc/qcom/spcom.c b/drivers/soc/qcom/spcom.c index e8ea99827403..9b71083e4f27 100644 --- a/drivers/soc/qcom/spcom.c +++ b/drivers/soc/qcom/spcom.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -274,6 +274,8 @@ static int spcom_open(struct spcom_channel *ch, unsigned int timeout_msec); static int spcom_close(struct spcom_channel *ch); static void spcom_notify_rx_abort(void *handle, const void *priv, const void *pkt_priv); +static struct spcom_channel *spcom_find_channel_by_name(const char *name); +static int spcom_unlock_ion_buf(struct spcom_channel *ch, int fd); /** * spcom_is_ready() - driver is initialized and ready. @@ -347,6 +349,9 @@ static int spcom_create_predefined_channels_chardev(void) static void spcom_link_state_notif_cb(struct glink_link_state_cb_info *cb_info, void *priv) { + struct spcom_channel *ch = NULL; + const char *ch_name = "sp_kernel"; + spcom_dev->link_state = cb_info->link_state; pr_debug("spcom_link_state_notif_cb called. transport = %s edge = %s\n", @@ -359,6 +364,17 @@ static void spcom_link_state_notif_cb(struct glink_link_state_cb_info *cb_info, break; case GLINK_LINK_STATE_DOWN: pr_err("GLINK_LINK_STATE_DOWN.\n"); + + /* + * Free all the SKP ION buffers that were locked + * for SPSS app swapping, when remote subsystem reset. + */ + pr_debug("Free all SKP ION buffers on SSR.\n"); + ch = spcom_find_channel_by_name(ch_name); + if (!ch) + pr_err("failed to find channel [%s].\n", ch_name); + else + spcom_unlock_ion_buf(ch, SPCOM_ION_FD_UNLOCK_ALL); break; default: pr_err("unknown link_state [%d].\n", cb_info->link_state); @@ -1643,24 +1659,18 @@ static int spcom_handle_lock_ion_buf_command(struct spcom_channel *ch, } /** - * spcom_handle_unlock_ion_buf_command() - Unlock an ION buffer. + * spcom_unlock_ion_buf() - Unlock an ION buffer. * * Unlock an ION buffer, let it be free, when it is no longer being used by * the remote subsystem. */ -static int spcom_handle_unlock_ion_buf_command(struct spcom_channel *ch, - void *cmd_buf, int size) +static int spcom_unlock_ion_buf(struct spcom_channel *ch, int fd) { - struct spcom_user_command *cmd = cmd_buf; - int fd = cmd->arg; struct ion_client *ion_client = spcom_dev->ion_client; int i; + bool found = false; - if (size != sizeof(*cmd)) { - pr_err("cmd size [%d] , expected [%d].\n", - (int) size, (int) sizeof(*cmd)); - return -EINVAL; - } + pr_debug("Unlock ion buf ch [%s] fd [%d].\n", ch->name, fd); /* Check ION client */ if (ion_client == NULL) { @@ -1669,6 +1679,8 @@ static int spcom_handle_unlock_ion_buf_command(struct spcom_channel *ch, } if (fd == (int) SPCOM_ION_FD_UNLOCK_ALL) { + pr_debug("unlocked ALL ion buf ch [%s].\n", ch->name); + found = true; /* unlock all ION buf */ for (i = 0 ; i < ARRAY_SIZE(ch->ion_handle_table) ; i++) { if (ch->ion_handle_table[i] != NULL) { @@ -1686,15 +1698,45 @@ static int spcom_handle_unlock_ion_buf_command(struct spcom_channel *ch, ch->ion_handle_table[i] = NULL; ch->ion_fd_table[i] = -1; pr_debug("unlocked ion buf#[%d].\n", i); + found = true; break; } } } + if (!found) { + pr_err("ch [%s] fd [%d] was not found.\n", ch->name, fd); + return -ENODEV; + } + return 0; } /** + * spcom_handle_unlock_ion_buf_command() - Unlock an ION buffer. + * + * Unlock an ION buffer, let it be free, when it is no longer being used by + * the remote subsystem. + */ +static int spcom_handle_unlock_ion_buf_command(struct spcom_channel *ch, + void *cmd_buf, int size) +{ + int ret; + struct spcom_user_command *cmd = cmd_buf; + int fd = cmd->arg; + + if (size != sizeof(*cmd)) { + pr_err("cmd size [%d] , expected [%d].\n", + (int) size, (int) sizeof(*cmd)); + return -EINVAL; + } + + ret = spcom_unlock_ion_buf(ch, fd); + + return ret; +} + +/** * spcom_handle_fake_ssr_command() - Handle fake ssr command from user space. */ static int spcom_handle_fake_ssr_command(struct spcom_channel *ch, int arg) diff --git a/drivers/thermal/msm-tsens.c b/drivers/thermal/msm-tsens.c index 8afda2352001..4585313772ff 100644 --- a/drivers/thermal/msm-tsens.c +++ b/drivers/thermal/msm-tsens.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -140,215 +140,7 @@ #define TSENS_CTRL_ADDR(n) (n) #define TSENS_EN BIT(0) -#define TSENS_SW_RST BIT(1) -#define TSENS_ADC_CLK_SEL BIT(2) -#define TSENS_SENSOR0_SHIFT 3 -#define TSENS_62_5_MS_MEAS_PERIOD 1 -#define TSENS_312_5_MS_MEAS_PERIOD 2 -#define TSENS_MEAS_PERIOD_SHIFT 18 - -#define TSENS_GLOBAL_CONFIG(n) ((n) + 0x34) -#define TSENS_S0_MAIN_CONFIG(n) ((n) + 0x38) -#define TSENS_SN_REMOTE_CONFIG(n) ((n) + 0x3c) - -#define TSENS_EEPROM(n) ((n) + 0xd0) -#define TSENS_EEPROM_REDUNDANCY_SEL(n) ((n) + 0x444) -#define TSENS_EEPROM_BACKUP_REGION(n) ((n) + 0x440) - -#define TSENS_MAIN_CALIB_ADDR_RANGE 6 -#define TSENS_BACKUP_CALIB_ADDR_RANGE 4 - -#define TSENS_EEPROM_8X26_1(n) ((n) + 0x1c0) -#define TSENS_EEPROM_8X26_2(n) ((n) + 0x444) -#define TSENS_8X26_MAIN_CALIB_ADDR_RANGE 4 - -#define TSENS_EEPROM_8X10_1(n) ((n) + 0x1a4) -#define TSENS_EEPROM_8X10_1_OFFSET 8 -#define TSENS_EEPROM_8X10_2(n) ((n) + 0x1a8) -#define TSENS_EEPROM_8X10_SPARE_1(n) ((n) + 0xd8) -#define TSENS_EEPROM_8X10_SPARE_2(n) ((n) + 0xdc) - -#define TSENS_9900_EEPROM(n) ((n) + 0xd0) -#define TSENS_9900_EEPROM_REDUNDANCY_SEL(n) ((n) + 0x1c4) -#define TSENS_9900_EEPROM_BACKUP_REGION(n) ((n) + 0x450) -#define TSENS_9900_CALIB_ADDR_RANGE 4 - -#define TSENS_8939_EEPROM(n) ((n) + 0xa0) - -#define TSENS_8994_EEPROM(n) ((n) + 0xd0) -#define TSENS_8994_EEPROM_REDUN_SEL(n) ((n) + 0x464) -#define TSENS_REDUN_REGION1_EEPROM(n) ((n) + 0x1c0) -#define TSENS_REDUN_REGION2_EEPROM(n) ((n) + 0x1c4) -#define TSENS_REDUN_REGION3_EEPROM(n) ((n) + 0x1cc) -#define TSENS_REDUN_REGION4_EEPROM(n) ((n) + 0x440) -#define TSENS_REDUN_REGION5_EEPROM(n) ((n) + 0x444) - -/* TSENS calibration Mask data */ -#define TSENS_BASE1_MASK 0xff -#define TSENS0_POINT1_MASK 0x3f00 -#define TSENS1_POINT1_MASK 0xfc000 -#define TSENS2_POINT1_MASK 0x3f00000 -#define TSENS3_POINT1_MASK 0xfc000000 -#define TSENS4_POINT1_MASK 0x3f -#define TSENS5_POINT1_MASK 0xfc0 -#define TSENS6_POINT1_MASK 0x3f000 -#define TSENS7_POINT1_MASK 0xfc0000 -#define TSENS8_POINT1_MASK 0x3f000000 -#define TSENS8_POINT1_MASK_BACKUP 0x3f -#define TSENS9_POINT1_MASK 0x3f -#define TSENS9_POINT1_MASK_BACKUP 0xfc0 -#define TSENS10_POINT1_MASK 0xfc0 -#define TSENS10_POINT1_MASK_BACKUP 0x3f000 -#define TSENS_CAL_SEL_0_1 0xc0000000 -#define TSENS_CAL_SEL_2 0x40000000 -#define TSENS_CAL_SEL_SHIFT 30 -#define TSENS_CAL_SEL_SHIFT_2 28 -#define TSENS_ONE_POINT_CALIB 0x1 -#define TSENS_ONE_POINT_CALIB_OPTION_2 0x2 -#define TSENS_TWO_POINT_CALIB 0x3 - -#define TSENS0_POINT1_SHIFT 8 -#define TSENS1_POINT1_SHIFT 14 -#define TSENS2_POINT1_SHIFT 20 -#define TSENS3_POINT1_SHIFT 26 -#define TSENS5_POINT1_SHIFT 6 -#define TSENS6_POINT1_SHIFT 12 -#define TSENS7_POINT1_SHIFT 18 -#define TSENS8_POINT1_SHIFT 24 -#define TSENS9_POINT1_BACKUP_SHIFT 6 -#define TSENS10_POINT1_SHIFT 6 -#define TSENS10_POINT1_BACKUP_SHIFT 12 - -#define TSENS_POINT2_BASE_SHIFT 12 -#define TSENS_POINT2_BASE_BACKUP_SHIFT 18 -#define TSENS0_POINT2_SHIFT 20 -#define TSENS0_POINT2_BACKUP_SHIFT 26 -#define TSENS1_POINT2_SHIFT 26 -#define TSENS2_POINT2_BACKUP_SHIFT 6 -#define TSENS3_POINT2_SHIFT 6 -#define TSENS3_POINT2_BACKUP_SHIFT 12 -#define TSENS4_POINT2_SHIFT 12 -#define TSENS4_POINT2_BACKUP_SHIFT 18 -#define TSENS5_POINT2_SHIFT 18 -#define TSENS5_POINT2_BACKUP_SHIFT 24 -#define TSENS6_POINT2_SHIFT 24 -#define TSENS7_POINT2_BACKUP_SHIFT 6 -#define TSENS8_POINT2_SHIFT 6 -#define TSENS8_POINT2_BACKUP_SHIFT 12 -#define TSENS9_POINT2_SHIFT 12 -#define TSENS9_POINT2_BACKUP_SHIFT 18 -#define TSENS10_POINT2_SHIFT 18 -#define TSENS10_POINT2_BACKUP_SHIFT 24 - -#define TSENS_BASE2_MASK 0xff000 -#define TSENS_BASE2_BACKUP_MASK 0xfc0000 -#define TSENS0_POINT2_MASK 0x3f00000 -#define TSENS0_POINT2_BACKUP_MASK 0xfc000000 -#define TSENS1_POINT2_MASK 0xfc000000 -#define TSENS1_POINT2_BACKUP_MASK 0x3f -#define TSENS2_POINT2_MASK 0x3f -#define TSENS2_POINT2_BACKUP_MASK 0xfc0 -#define TSENS3_POINT2_MASK 0xfc0 -#define TSENS3_POINT2_BACKUP_MASK 0x3f000 -#define TSENS4_POINT2_MASK 0x3f000 -#define TSENS4_POINT2_BACKUP_MASK 0xfc0000 -#define TSENS5_POINT2_MASK 0xfc0000 -#define TSENS5_POINT2_BACKUP_MASK 0x3f000000 -#define TSENS6_POINT2_MASK 0x3f000000 -#define TSENS6_POINT2_BACKUP_MASK 0x3f -#define TSENS7_POINT2_MASK 0x3f -#define TSENS7_POINT2_BACKUP_MASK 0xfc0 -#define TSENS8_POINT2_MASK 0xfc0 -#define TSENS8_POINT2_BACKUP_MASK 0x3f000 -#define TSENS9_POINT2_MASK 0x3f000 -#define TSENS9_POINT2_BACKUP_MASK 0xfc0000 -#define TSENS10_POINT2_MASK 0xfc0000 -#define TSENS10_POINT2_BACKUP_MASK 0x3f000000 - -#define TSENS_8X26_BASE0_MASK 0x1fe000 -#define TSENS0_8X26_POINT1_MASK 0x7e00000 -#define TSENS1_8X26_POINT1_MASK 0x3f -#define TSENS2_8X26_POINT1_MASK 0xfc0 -#define TSENS3_8X26_POINT1_MASK 0x3f000 -#define TSENS4_8X26_POINT1_MASK 0xfc0000 -#define TSENS5_8X26_POINT1_MASK 0x3f000000 -#define TSENS6_8X26_POINT1_MASK 0x3f00000 -#define TSENS_8X26_TSENS_CAL_SEL 0xe0000000 -#define TSENS_8X26_BASE1_MASK 0xff -#define TSENS0_8X26_POINT2_MASK 0x3f00 -#define TSENS1_8X26_POINT2_MASK 0xfc000 -#define TSENS2_8X26_POINT2_MASK 0x3f00000 -#define TSENS3_8X26_POINT2_MASK 0xfc000000 -#define TSENS4_8X26_POINT2_MASK 0x3f00000 -#define TSENS5_8X26_POINT2_MASK 0xfc000000 -#define TSENS6_8X26_POINT2_MASK 0x7e0000 - -#define TSENS_8X26_CAL_SEL_SHIFT 29 -#define TSENS_8X26_BASE0_SHIFT 13 -#define TSENS0_8X26_POINT1_SHIFT 21 -#define TSENS2_8X26_POINT1_SHIFT 6 -#define TSENS3_8X26_POINT1_SHIFT 12 -#define TSENS4_8X26_POINT1_SHIFT 18 -#define TSENS5_8X26_POINT1_SHIFT 24 -#define TSENS6_8X26_POINT1_SHIFT 20 - -#define TSENS0_8X26_POINT2_SHIFT 8 -#define TSENS1_8X26_POINT2_SHIFT 14 -#define TSENS2_8X26_POINT2_SHIFT 20 -#define TSENS3_8X26_POINT2_SHIFT 26 -#define TSENS4_8X26_POINT2_SHIFT 20 -#define TSENS5_8X26_POINT2_SHIFT 26 -#define TSENS6_8X26_POINT2_SHIFT 17 - -#define TSENS_8X10_CAL_SEL_SHIFT 28 -#define TSENS_8X10_BASE1_SHIFT 8 -#define TSENS0_8X10_POINT1_SHIFT 16 -#define TSENS0_8X10_POINT2_SHIFT 22 -#define TSENS1_8X10_POINT2_SHIFT 6 -#define TSENS_8X10_BASE0_MASK 0xff -#define TSENS_8X10_BASE1_MASK 0xff00 -#define TSENS0_8X10_POINT1_MASK 0x3f0000 -#define TSENS0_8X10_POINT2_MASK 0xfc00000 -#define TSENS_8X10_TSENS_CAL_SEL 0x70000000 -#define TSENS1_8X10_POINT1_MASK 0x3f -#define TSENS1_8X10_POINT2_MASK 0xfc0 -#define TSENS_8X10_REDUN_SEL_MASK 0x6000000 -#define TSENS_8X10_REDUN_SEL_SHIFT 25 - -#define TSENS0_9900_POINT1_SHIFT 19 -#define TSENS2_9900_POINT1_SHIFT 12 -#define TSENS3_9900_POINT1_SHIFT 24 -#define TSENS4_9900_POINT1_SHIFT 6 -#define TSENS5_9900_POINT1_SHIFT 18 -#define TSENS_9900_BASE1_MASK 0xff -#define TSENS0_9900_POINT1_MASK 0x1f80000 -#define TSENS1_9900_POINT1_MASK 0x3f -#define TSENS2_9900_POINT1_MASK 0x3f000 -#define TSENS3_9900_POINT1_MASK 0x3f000000 -#define TSENS4_9900_POINT1_MASK 0xfc0 -#define TSENS5_9900_POINT1_MASK 0xfc0000 -#define TSENS6_9900_POINT1_MASK 0x3f - -#define TSENS_9900_BASE2_SHIFT 8 -#define TSENS0_9900_POINT2_SHIFT 25 -#define TSENS1_9900_POINT2_SHIFT 6 -#define TSENS2_9900_POINT2_SHIFT 18 -#define TSENS4_9900_POINT2_SHIFT 12 -#define TSENS5_9900_POINT2_SHIFT 24 -#define TSENS6_9900_POINT2_SHIFT 6 -#define TSENS_9900_BASE2_MASK 0xff00 -#define TSENS0_9900_POINT2_MASK 0x7e000000 -#define TSENS1_9900_POINT2_MASK 0xfc0 -#define TSENS2_9900_POINT2_MASK 0xfc0000 -#define TSENS3_9900_POINT2_MASK 0x3f -#define TSENS4_9900_POINT2_MASK 0x3f000 -#define TSENS5_9900_POINT2_MASK 0x3f000000 -#define TSENS6_9900_POINT2_MASK 0xfc0 - -#define TSENS_9900_CAL_SEL_SHIFT 16 -#define TSENS_9900_TSENS_CAL_SEL 0x00070000 - -#define TSENS_BIT_APPEND 0x3 + #define TSENS_CAL_DEGC_POINT1 30 #define TSENS_CAL_DEGC_POINT2 120 #define TSENS_SLOPE_FACTOR 1000 @@ -359,354 +151,11 @@ #define TSENS_THRESHOLD_MAX_CODE 0x3ff #define TSENS_THRESHOLD_MIN_CODE 0x0 -#define TSENS_GLOBAL_INIT_DATA 0x302f16c -#define TSENS_S0_MAIN_CFG_INIT_DATA 0x1c3 -#define TSENS_SN_REMOTE_CFG_DATA 0x11c3 - -#define TSENS_QFPROM_BACKUP_SEL 0x3 -#define TSENS_QFPROM_BACKUP_REDUN_SEL 0xe0000000 -#define TSENS_QFPROM_BACKUP_REDUN_SHIFT 29 - -#define TSENS_QFPROM_BACKUP_9900_REDUN_SEL 0x07000000 -#define TSENS_QFPROM_BACKUP_9900_REDUN_SHIFT 24 - -#define TSENS_TORINO_BASE0 0x3ff -#define TSENS_TORINO_BASE1 0xffc00 -#define TSENS_TORINO_POINT0 0xf00000 -#define TSENS_TORINO_POINT1 0xf0000000 -#define TSENS_TORINO_POINT2 0xf0 -#define TSENS_TORINO_POINT3 0xf000 -#define TSENS_TORINO_POINT4 0xf00000 -#define TSENS_TORINO_CALIB_PT 0x70000000 - -#define TSENS_TORINO_BASE1_SHIFT 10 -#define TSENS_TORINO_POINT0_SHIFT 20 -#define TSENS_TORINO_POINT1_SHIFT 28 -#define TSENS_TORINO_POINT2_SHIFT 4 -#define TSENS_TORINO_POINT3_SHIFT 12 -#define TSENS_TORINO_POINT4_SHIFT 20 -#define TSENS_TORINO_CALIB_SHIFT 28 - #define TSENS_TYPE0 0 #define TSENS_TYPE2 2 #define TSENS_TYPE3 3 #define TSENS_TYPE4 4 -#define TSENS_8916_BASE0_MASK 0x0000007f -#define TSENS_8916_BASE1_MASK 0xfe000000 - -#define TSENS0_8916_POINT1_MASK 0x00000f80 -#define TSENS1_8916_POINT1_MASK 0x003e0000 -#define TSENS2_8916_POINT1_MASK 0xf8000000 -#define TSENS3_8916_POINT1_MASK 0x000003e0 -#define TSENS4_8916_POINT1_MASK 0x000f8000 - -#define TSENS0_8916_POINT2_MASK 0x0001f000 -#define TSENS1_8916_POINT2_MASK 0x07c00000 -#define TSENS2_8916_POINT2_MASK 0x0000001f -#define TSENS3_8916_POINT2_MASK 0x00007c00 -#define TSENS4_8916_POINT2_MASK 0x01f00000 - -#define TSENS_8916_TSENS_CAL_SEL 0xe0000000 - -#define TSENS_8916_CAL_SEL_SHIFT 29 -#define TSENS_8916_BASE1_SHIFT 25 - -#define TSENS0_8916_POINT1_SHIFT 7 -#define TSENS1_8916_POINT1_SHIFT 17 -#define TSENS2_8916_POINT1_SHIFT 27 -#define TSENS3_8916_POINT1_SHIFT 5 -#define TSENS4_8916_POINT1_SHIFT 15 - -#define TSENS0_8916_POINT2_SHIFT 12 -#define TSENS1_8916_POINT2_SHIFT 22 -#define TSENS3_8916_POINT2_SHIFT 10 -#define TSENS4_8916_POINT2_SHIFT 20 -#define TSENS_VALID_CNT_2 2 - -#define TSENS_8939_BASE0_MASK 0x000000ff -#define TSENS_8939_BASE1_MASK 0xff000000 - -#define TSENS0_8939_POINT1_MASK 0x000001f8 -#define TSENS1_8939_POINT1_MASK 0x001f8000 -#define TSENS2_8939_POINT1_MASK_0_4 0xf8000000 -#define TSENS2_8939_POINT1_MASK_5 0x00000001 -#define TSENS3_8939_POINT1_MASK 0x00001f80 -#define TSENS4_8939_POINT1_MASK 0x01f80000 -#define TSENS5_8939_POINT1_MASK 0x00003f00 -#define TSENS6_8939_POINT1_MASK 0x03f00000 -#define TSENS7_8939_POINT1_MASK 0x0000003f -#define TSENS8_8939_POINT1_MASK 0x0003f000 - -#define TSENS0_8939_POINT2_MASK 0x00007e00 -#define TSENS1_8939_POINT2_MASK 0x07e00000 -#define TSENS2_8939_POINT2_MASK 0x0000007e -#define TSENS3_8939_POINT2_MASK 0x0007e000 -#define TSENS4_8939_POINT2_MASK 0x7e000000 -#define TSENS5_8939_POINT2_MASK 0x000fc000 -#define TSENS6_8939_POINT2_MASK 0xfc000000 -#define TSENS7_8939_POINT2_MASK 0x00000fc0 -#define TSENS8_8939_POINT2_MASK 0x00fc0000 - -#define TSENS_8939_TSENS_CAL_SEL 0x7 -#define TSENS_8939_CAL_SEL_SHIFT 0 -#define TSENS_8939_BASE1_SHIFT 24 - -#define TSENS0_8939_POINT1_SHIFT 3 -#define TSENS1_8939_POINT1_SHIFT 15 -#define TSENS2_8939_POINT1_SHIFT_0_4 27 -#define TSENS2_8939_POINT1_SHIFT_5 5 -#define TSENS3_8939_POINT1_SHIFT 7 -#define TSENS4_8939_POINT1_SHIFT 19 -#define TSENS5_8939_POINT1_SHIFT 8 -#define TSENS6_8939_POINT1_SHIFT 20 -#define TSENS8_8939_POINT1_SHIFT 12 - -#define TSENS0_8939_POINT2_SHIFT 9 -#define TSENS1_8939_POINT2_SHIFT 21 -#define TSENS2_8939_POINT2_SHIFT 1 -#define TSENS3_8939_POINT2_SHIFT 13 -#define TSENS4_8939_POINT2_SHIFT 25 -#define TSENS5_8939_POINT2_SHIFT 14 -#define TSENS6_8939_POINT2_SHIFT 26 -#define TSENS7_8939_POINT2_SHIFT 6 -#define TSENS8_8939_POINT2_SHIFT 18 - -#define TSENS_BASE0_8994_MASK 0x3ff -#define TSENS_BASE1_8994_MASK 0xffc00 -#define TSENS_BASE1_8994_SHIFT 10 -#define TSENS0_OFFSET_8994_MASK 0xf00000 -#define TSENS0_OFFSET_8994_SHIFT 20 -#define TSENS1_OFFSET_8994_MASK 0xf000000 -#define TSENS1_OFFSET_8994_SHIFT 24 -#define TSENS2_OFFSET_8994_MASK 0xf0000000 -#define TSENS2_OFFSET_8994_SHIFT 28 -#define TSENS3_OFFSET_8994_MASK 0xf -#define TSENS4_OFFSET_8994_MASK 0xf0 -#define TSENS4_OFFSET_8994_SHIFT 4 -#define TSENS5_OFFSET_8994_MASK 0xf00 -#define TSENS5_OFFSET_8994_SHIFT 8 -#define TSENS6_OFFSET_8994_MASK 0xf000 -#define TSENS6_OFFSET_8994_SHIFT 12 -#define TSENS7_OFFSET_8994_MASK 0xf0000 -#define TSENS7_OFFSET_8994_SHIFT 16 -#define TSENS8_OFFSET_8994_MASK 0xf00000 -#define TSENS8_OFFSET_8994_SHIFT 20 -#define TSENS9_OFFSET_8994_MASK 0xf000000 -#define TSENS9_OFFSET_8994_SHIFT 24 -#define TSENS10_OFFSET_8994_MASK 0xf0000000 -#define TSENS10_OFFSET_8994_SHIFT 28 -#define TSENS11_OFFSET_8994_MASK 0xf -#define TSENS12_OFFSET_8994_MASK 0xf0 -#define TSENS12_OFFSET_8994_SHIFT 4 -#define TSENS13_OFFSET_8994_MASK 0xf00 -#define TSENS13_OFFSET_8994_SHIFT 8 -#define TSENS14_OFFSET_8994_MASK 0xf000 -#define TSENS14_OFFSET_8994_SHIFT 12 -#define TSENS15_OFFSET_8994_MASK 0xf0000 -#define TSENS15_OFFSET_8994_SHIFT 16 -#define TSENS_8994_CAL_SEL_MASK 0x700000 -#define TSENS_8994_CAL_SEL_SHIFT 20 - -#define TSENS_BASE0_8994_REDUN_MASK 0x7fe00000 -#define TSENS_BASE0_8994_REDUN_MASK_SHIFT 21 -#define TSENS_BASE1_BIT0_8994_REDUN_MASK 0x80000000 -#define TSENS_BASE1_BIT0_SHIFT_COMPUTE 31 -#define TSENS_BASE1_BIT1_9_8994_REDUN_MASK 0x1ff -#define TSENS0_OFFSET_8994_REDUN_MASK 0x1e00 -#define TSENS0_OFFSET_8994_REDUN_SHIFT 9 -#define TSENS1_OFFSET_8994_REDUN_MASK 0x1e000 -#define TSENS1_OFFSET_8994_REDUN_SHIFT 13 -#define TSENS2_OFFSET_8994_REDUN_MASK 0x1e0000 -#define TSENS2_OFFSET_8994_REDUN_SHIFT 17 -#define TSENS3_OFFSET_8994_REDUN_MASK 0x1e00000 -#define TSENS3_OFFSET_8994_REDUN_SHIFT 21 -#define TSENS4_OFFSET_8994_REDUN_MASK 0x1e000000 -#define TSENS4_OFFSET_8994_REDUN_SHIFT 25 -#define TSENS5_OFFSET_8994_REDUN_MASK_BIT0_2 0xe0000000 -#define TSENS5_OFFSET_8994_REDUN_SHIFT_BIT0_2 29 -#define TSENS5_OFFSET_8994_REDUN_MASK_BIT3 0x800000 -#define TSENS5_OFFSET_8994_REDUN_SHIFT_BIT3 23 -#define TSENS6_OFFSET_8994_REDUN_MASK 0xf000000 -#define TSENS6_OFFSET_8994_REDUN_SHIFT 24 -#define TSENS7_OFFSET_8994_REDUN_MASK 0xf0000000 -#define TSENS7_OFFSET_8994_REDUN_SHIFT 28 -#define TSENS8_OFFSET_8994_REDUN_MASK 0xf -#define TSENS9_OFFSET_8994_REDUN_MASK 0xf0 -#define TSENS9_OFFSET_8994_REDUN_SHIFT 4 -#define TSENS10_OFFSET_8994_REDUN_MASK 0xf00 -#define TSENS10_OFFSET_8994_REDUN_SHIFT 8 -#define TSENS11_OFFSET_8994_REDUN_MASK 0xf000 -#define TSENS11_OFFSET_8994_REDUN_SHIFT 12 -#define TSENS12_OFFSET_8994_REDUN_MASK 0xf0000 -#define TSENS12_OFFSET_8994_REDUN_SHIFT 16 -#define TSENS13_OFFSET_8994_REDUN_MASK 0xf00000 -#define TSENS13_OFFSET_8994_REDUN_SHIFT 20 -#define TSENS14_OFFSET_8994_REDUN_MASK 0xf000000 -#define TSENS14_OFFSET_8994_REDUN_SHIFT 24 -#define TSENS15_OFFSET_8994_REDUN_MASK 0xf0000000 -#define TSENS15_OFFSET_8994_REDUN_SHIFT 28 -#define TSENS_8994_REDUN_SEL_MASK 0x7 -#define TSENS_8994_CAL_SEL_REDUN_MASK 0xe0000000 -#define TSENS_8994_CAL_SEL_REDUN_SHIFT 29 - -#define TSENS_MSM8909_BASE0_MASK 0x000000ff -#define TSENS_MSM8909_BASE1_MASK 0x0000ff00 - -#define TSENS0_MSM8909_POINT1_MASK 0x0000003f -#define TSENS1_MSM8909_POINT1_MASK 0x0003f000 -#define TSENS2_MSM8909_POINT1_MASK 0x3f000000 -#define TSENS3_MSM8909_POINT1_MASK 0x000003f0 -#define TSENS4_MSM8909_POINT1_MASK 0x003f0000 - -#define TSENS0_MSM8909_POINT2_MASK 0x00000fc0 -#define TSENS1_MSM8909_POINT2_MASK 0x00fc0000 -#define TSENS2_MSM8909_POINT2_MASK_0_1 0xc0000000 -#define TSENS2_MSM8909_POINT2_MASK_2_5 0x0000000f -#define TSENS3_MSM8909_POINT2_MASK 0x0000fc00 -#define TSENS4_MSM8909_POINT2_MASK 0x0fc00000 - -#define TSENS_MSM8909_TSENS_CAL_SEL 0x00070000 -#define TSENS_MSM8909_CAL_SEL_SHIFT 16 -#define TSENS_MSM8909_BASE1_SHIFT 8 - -#define TSENS1_MSM8909_POINT1_SHIFT 12 -#define TSENS2_MSM8909_POINT1_SHIFT 24 -#define TSENS3_MSM8909_POINT1_SHIFT 4 -#define TSENS4_MSM8909_POINT1_SHIFT 16 - -#define TSENS0_MSM8909_POINT2_SHIFT 6 -#define TSENS1_MSM8909_POINT2_SHIFT 18 -#define TSENS2_MSM8909_POINT2_SHIFT_0_1 30 -#define TSENS2_MSM8909_POINT2_SHIFT_2_5 2 -#define TSENS3_MSM8909_POINT2_SHIFT 10 -#define TSENS4_MSM8909_POINT2_SHIFT 22 - -#define TSENS_ZIRC_CAL_SEL 0x700 -#define TSENS_ZIRC_CAL_SEL_SHIFT 8 -#define TSENS_BASE0_ZIRC_MASK 0x3ff -#define TSENS_BASE1_ZIRC_MASK 0xffc00 -#define TSENS_BASE1_ZIRC_SHIFT 10 -#define TSENS0_OFFSET_ZIRC_MASK 0xf00000 -#define TSENS0_OFFSET_ZIRC_SHIFT 20 -#define TSENS1_OFFSET_ZIRC_MASK 0xf000000 -#define TSENS1_OFFSET_ZIRC_SHIFT 24 -#define TSENS2_OFFSET_ZIRC_MASK 0xf0000000 -#define TSENS2_OFFSET_ZIRC_SHIFT 28 -#define TSENS3_OFFSET_ZIRC_MASK 0xf -#define TSENS4_OFFSET_ZIRC_MASK 0xf0 -#define TSENS4_OFFSET_ZIRC_SHIFT 4 - -#define TSENS_CONTR_14_BASE0_MASK 0x000000ff -#define TSENS_CONTR_14_BASE1_MASK 0xff000000 - -#define TSENS0_CONTR_14_POINT1_MASK 0x000001f8 -#define TSENS1_CONTR_14_POINT1_MASK 0x001f8000 -#define TSENS2_CONTR_14_POINT1_MASK_0_4 0xf8000000 -#define TSENS2_CONTR_14_POINT1_MASK_5 0x00000001 -#define TSENS3_CONTR_14_POINT1_MASK 0x00001f80 -#define TSENS4_CONTR_14_POINT1_MASK 0x01f80000 -#define TSENS5_CONTR_14_POINT1_MASK 0x00003f00 -#define TSENS6_CONTR_14_POINT1_MASK 0x03f00000 -#define TSENS7_CONTR_14_POINT1_MASK 0x0000003f -#define TSENS8_CONTR_14_POINT1_MASK 0x0003f000 -#define TSENS9_CONTR_14_POINT1_MASK 0x0000003f -#define TSENS10_CONTR_14_POINT1_MASK 0x0003f000 - -#define TSENS0_CONTR_14_POINT2_MASK 0x00007e00 -#define TSENS1_CONTR_14_POINT2_MASK 0x07e00000 -#define TSENS2_CONTR_14_POINT2_MASK 0x0000007e -#define TSENS3_CONTR_14_POINT2_MASK 0x0007e000 -#define TSENS4_CONTR_14_POINT2_MASK 0x7e000000 -#define TSENS5_CONTR_14_POINT2_MASK 0x000fc000 -#define TSENS6_CONTR_14_POINT2_MASK 0xfc000000 -#define TSENS7_CONTR_14_POINT2_MASK 0x00000fc0 -#define TSENS8_CONTR_14_POINT2_MASK 0x00fc0000 -#define TSENS9_CONTR_14_POINT2_MASK 0x00000fc0 -#define TSENS10_CONTR_14_POINT2_MASK 0x00fc0000 - -#define TSENS_CONTR_14_TSENS_CAL_SEL 0x00000007 -#define TSENS_CONTR_14_BASE1_SHIFT 24 - -#define TSENS0_CONTR_14_POINT1_SHIFT 3 -#define TSENS1_CONTR_14_POINT1_SHIFT 15 -#define TSENS2_CONTR_14_POINT1_SHIFT_0_4 27 -#define TSENS2_CONTR_14_POINT1_SHIFT_5 5 -#define TSENS3_CONTR_14_POINT1_SHIFT 7 -#define TSENS4_CONTR_14_POINT1_SHIFT 19 -#define TSENS5_CONTR_14_POINT1_SHIFT 8 -#define TSENS6_CONTR_14_POINT1_SHIFT 20 -#define TSENS8_CONTR_14_POINT1_SHIFT 12 -#define TSENS10_CONTR_14_POINT1_SHIFT 12 - -#define TSENS0_CONTR_14_POINT2_SHIFT 9 -#define TSENS1_CONTR_14_POINT2_SHIFT 21 -#define TSENS2_CONTR_14_POINT2_SHIFT 1 -#define TSENS3_CONTR_14_POINT2_SHIFT 13 -#define TSENS4_CONTR_14_POINT2_SHIFT 25 -#define TSENS5_CONTR_14_POINT2_SHIFT 14 -#define TSENS6_CONTR_14_POINT2_SHIFT 26 -#define TSENS7_CONTR_14_POINT2_SHIFT 6 -#define TSENS8_CONTR_14_POINT2_SHIFT 18 -#define TSENS9_CONTR_14_POINT2_SHIFT 6 -#define TSENS10_CONTR_14_POINT2_SHIFT 18 - -#define TSENS_TWO_POINT_CALIB_N_WA 0x6 -#define TSENS_TWO_POINT_CALIB_N_OFFSET_WA 0x7 - -#define TSENS_MSM8952_D30_WA_S0 2 -#define TSENS_MSM8952_D30_WA_S1 4 -#define TSENS_MSM8952_D30_WA_S2 4 -#define TSENS_MSM8952_D30_WA_S3 1 -#define TSENS_MSM8952_D30_WA_S4 2 -#define TSENS_MSM8952_D30_WA_S5 1 -#define TSENS_MSM8952_D30_WA_S7 3 -#define TSENS_MSM8952_D30_WA_S8 2 -#define TSENS_MSM8952_D30_WA_S10 3 - -#define TSENS_MSM8952_D120_WA_S0 1 -#define TSENS_MSM8952_D120_WA_S1 4 -#define TSENS_MSM8952_D120_WA_S2 5 -#define TSENS_MSM8952_D120_WA_S3 1 -#define TSENS_MSM8952_D120_WA_S4 3 -#define TSENS_MSM8952_D120_WA_S5 1 -#define TSENS_MSM8952_D120_WA_S6 1 -#define TSENS_MSM8952_D120_WA_S7 4 -#define TSENS_MSM8952_D120_WA_S8 4 -#define TSENS_MSM8952_D120_WA_S10 2 - -#define TSENS_NO_CALIB_POINT1_DATA 500 -#define TSENS_NO_CALIB_POINT2_DATA 780 - -#define TSENS_MDM9607_TSENS_CAL_SEL 0x00700000 -#define TSENS_MDM9607_CAL_SEL_SHIFT 20 -#define TSENS_MDM9607_BASE1_SHIFT 12 - -#define TSENS_MDM9607_BASE0_MASK 0x000000ff -#define TSENS_MDM9607_BASE1_MASK 0x000ff000 - -#define TSENS0_MDM9607_POINT1_MASK 0x00003f00 -#define TSENS1_MDM9607_POINT1_MASK 0x03f00000 -#define TSENS2_MDM9607_POINT1_MASK 0x0000003f -#define TSENS3_MDM9607_POINT1_MASK 0x0003f000 -#define TSENS4_MDM9607_POINT1_MASK 0x0000003f - -#define TSENS0_MDM9607_POINT2_MASK 0x000fc000 -#define TSENS1_MDM9607_POINT2_MASK 0xfc000000 -#define TSENS2_MDM9607_POINT2_MASK 0x00000fc0 -#define TSENS3_MDM9607_POINT2_MASK 0x00fc0000 -#define TSENS4_MDM9607_POINT2_MASK 0x0000fc00 - -#define TSENS0_MDM9607_POINT1_SHIFT 8 -#define TSENS1_MDM9607_POINT1_SHIFT 20 -#define TSENS3_MDM9607_POINT1_SHIFT 12 - -#define TSENS0_MDM9607_POINT2_SHIFT 14 -#define TSENS1_MDM9607_POINT2_SHIFT 26 -#define TSENS2_MDM9607_POINT2_SHIFT 6 -#define TSENS3_MDM9607_POINT2_SHIFT 18 -#define TSENS4_MDM9607_POINT2_SHIFT 6 - /* debug defines */ #define TSENS_DBG_BUS_ID_0 0 #define TSENS_DBG_BUS_ID_1 1 @@ -733,26 +182,6 @@ static uint32_t tsens_sec_to_msec_value = 1000; static uint32_t tsens_completion_timeout_hz = HZ/2; static uint32_t tsens_poll_check = 1; -enum tsens_calib_fuse_map_type { - TSENS_CALIB_FUSE_MAP_8974 = 0, - TSENS_CALIB_FUSE_MAP_8X26, - TSENS_CALIB_FUSE_MAP_8X10, - TSENS_CALIB_FUSE_MAP_9900, - TSENS_CALIB_FUSE_MAP_9630, - TSENS_CALIB_FUSE_MAP_8916, - TSENS_CALIB_FUSE_MAP_8939, - TSENS_CALIB_FUSE_MAP_8994, - TSENS_CALIB_FUSE_MAP_MSM8909, - TSENS_CALIB_FUSE_MAP_MSMZIRC, - TSENS_CALIB_FUSE_MAP_NONE, - TSENS_CALIB_FUSE_MAP_8992, - TSENS_CALIB_FUSE_MAP_MSM8952, - TSENS_CALIB_FUSE_MAP_MDM9607, - TSENS_CALIB_FUSE_MAP_MSM8937, - TSENS_CALIB_FUSE_MAP_MSMGOLD, - TSENS_CALIB_FUSE_MAP_NUM, -}; - /* Trips: warm and cool */ enum tsens_trip_type { TSENS_TRIP_WARM = 0, @@ -848,7 +277,6 @@ struct tsens_tm_device { int calib_len; struct resource *res_tsens_mem; struct resource *res_calib_mem; - uint32_t calib_mode; uint32_t tsens_type; bool tsens_valid_status_check; struct tsens_dbg_counter tsens_thread_iq_dbg; @@ -880,68 +308,17 @@ static struct dentry *dent; static struct dentry *dfile_stats; static struct of_device_id tsens_match[] = { - { .compatible = "qcom,msm-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8974, - }, - { .compatible = "qcom,msm8x26-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8X26, - }, - { .compatible = "qcom,msm8x10-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8X10, - }, - { .compatible = "qcom,fsm9900-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_9900, - }, - { .compatible = "qcom,mdm9630-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_9630, - }, - { .compatible = "qcom,msm8916-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8916, - }, - { .compatible = "qcom,msm8939-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8939, - }, - { .compatible = "qcom,msm8994-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8994, - }, - { .compatible = "qcom,msm8909-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MSM8909, - }, - { .compatible = "qcom,msmzirc-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MSMZIRC, - }, { .compatible = "qcom,msm8996-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, - }, - { .compatible = "qcom,msm8992-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_8992, - }, - { .compatible = "qcom,msm8952-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MSM8952, - }, - { .compatible = "qcom,mdm9607-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MDM9607, }, { .compatible = "qcom,msmtitanium-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, - }, - { .compatible = "qcom,msm8937-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MSM8937, - }, - { .compatible = "qcom,msmgold-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_MSMGOLD, }, { .compatible = "qcom,msm8998-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, }, { .compatible = "qcom,msmhamster-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, }, { .compatible = "qcom,sdm660-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, }, { .compatible = "qcom,sdm630-tsens", - .data = (void *)TSENS_CALIB_FUSE_MAP_NONE, }, {} }; @@ -2737,2639 +2114,6 @@ static int tsens_hw_init(struct tsens_tm_device *tmdev) return 0; } -static int tsens_calib_msm8937_msmgold_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0, ext_sen = 1; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens5_point1 = 0, tsens5_point2 = 0; - int tsens6_point1 = 0, tsens6_point2 = 0; - int tsens7_point1 = 0, tsens7_point2 = 0; - int tsens8_point1 = 0, tsens8_point2 = 0; - int tsens9_point1 = 0, tsens9_point2 = 0; - int tsens10_point1 = 0, tsens10_point2 = 0; - - int tsens_calibration_mode = 0, temp = 0; - uint32_t calib_data[5] = {0, 0, 0, 0, 0}; - uint32_t calib_tsens_point1_data[11], calib_tsens_point2_data[11]; - - if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSMGOLD) - ext_sen = 0; - - if (!tmdev->calibration_less_mode) { - - calib_data[0] = readl_relaxed(tmdev->tsens_calib_addr + 0x1D8); - calib_data[1] = readl_relaxed(tmdev->tsens_calib_addr + 0x1DC); - calib_data[2] = readl_relaxed(tmdev->tsens_calib_addr + 0x210); - calib_data[3] = readl_relaxed(tmdev->tsens_calib_addr + 0x214); - calib_data[4] = readl_relaxed(tmdev->tsens_calib_addr + 0x230); - - tsens_calibration_mode = - (calib_data[2] & - TSENS_CONTR_14_TSENS_CAL_SEL); - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[0] & - TSENS_CONTR_14_BASE0_MASK); - tsens0_point1 = (calib_data[2] & - TSENS0_CONTR_14_POINT1_MASK) - >> TSENS0_CONTR_14_POINT1_SHIFT; - tsens1_point1 = (calib_data[2] & - TSENS1_CONTR_14_POINT1_MASK) - >> TSENS1_CONTR_14_POINT1_SHIFT; - tsens2_point1 = (calib_data[2] & - TSENS2_CONTR_14_POINT1_MASK_0_4) - >> TSENS2_CONTR_14_POINT1_SHIFT_0_4; - temp = (calib_data[3] & TSENS2_CONTR_14_POINT1_MASK_5) - << TSENS2_CONTR_14_POINT1_SHIFT_5; - tsens2_point1 |= temp; - tsens3_point1 = (calib_data[3] & - TSENS3_CONTR_14_POINT1_MASK) - >> TSENS3_CONTR_14_POINT1_SHIFT; - tsens4_point1 = (calib_data[3] & - TSENS4_CONTR_14_POINT1_MASK) - >> TSENS4_CONTR_14_POINT1_SHIFT; - tsens5_point1 = (calib_data[0] & - TSENS5_CONTR_14_POINT1_MASK) - >> TSENS5_CONTR_14_POINT1_SHIFT; - tsens6_point1 = (calib_data[0] & - TSENS6_CONTR_14_POINT1_MASK) - >> TSENS6_CONTR_14_POINT1_SHIFT; - tsens7_point1 = (calib_data[1] & - TSENS7_CONTR_14_POINT1_MASK); - tsens8_point1 = (calib_data[1] & - TSENS8_CONTR_14_POINT1_MASK) - >> TSENS8_CONTR_14_POINT1_SHIFT; - tsens9_point1 = (calib_data[4] & - TSENS9_CONTR_14_POINT1_MASK); - if (ext_sen) - tsens10_point1 = (calib_data[4] & - TSENS10_CONTR_14_POINT1_MASK) - >> TSENS10_CONTR_14_POINT1_SHIFT; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[1] & - TSENS_CONTR_14_BASE1_MASK) - >> TSENS_CONTR_14_BASE1_SHIFT; - tsens0_point2 = (calib_data[2] & - TSENS0_CONTR_14_POINT2_MASK) - >> TSENS0_CONTR_14_POINT2_SHIFT; - tsens1_point2 = (calib_data[2] & - TSENS1_CONTR_14_POINT2_MASK) - >> TSENS1_CONTR_14_POINT2_SHIFT; - tsens2_point2 = (calib_data[3] & - TSENS2_CONTR_14_POINT2_MASK) - >> TSENS2_CONTR_14_POINT2_SHIFT; - tsens3_point2 = (calib_data[3] & - TSENS3_CONTR_14_POINT2_MASK) - >> TSENS3_CONTR_14_POINT2_SHIFT; - tsens4_point2 = (calib_data[3] & - TSENS4_CONTR_14_POINT2_MASK) - >> TSENS4_CONTR_14_POINT2_SHIFT; - tsens5_point2 = (calib_data[0] & - TSENS5_CONTR_14_POINT2_MASK) - >> TSENS5_CONTR_14_POINT2_SHIFT; - tsens6_point2 = (calib_data[0] & - TSENS6_CONTR_14_POINT2_MASK) - >> TSENS6_CONTR_14_POINT2_SHIFT; - tsens7_point2 = (calib_data[1] & - TSENS7_CONTR_14_POINT2_MASK) - >> TSENS7_CONTR_14_POINT2_SHIFT; - tsens8_point2 = (calib_data[1] & - TSENS8_CONTR_14_POINT2_MASK) - >> TSENS8_CONTR_14_POINT2_SHIFT; - tsens9_point2 = (calib_data[4] & - TSENS9_CONTR_14_POINT2_MASK) - >> TSENS9_CONTR_14_POINT2_SHIFT; - if (ext_sen) - tsens10_point2 = (calib_data[4] & - TSENS10_CONTR_14_POINT2_MASK) - >> TSENS10_CONTR_14_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS in calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - calib_tsens_point2_data[i] = TSENS_NO_CALIB_POINT2_DATA; - calib_tsens_point1_data[i] = TSENS_NO_CALIB_POINT1_DATA; - } - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2) + - tmdev->sensor[0].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2) + - tmdev->sensor[1].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2) + - tmdev->sensor[2].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2) + - tmdev->sensor[3].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2) + - tmdev->sensor[4].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[5] = - (((tsens_base0_data) + tsens5_point1) << 2) + - tmdev->sensor[5].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[6] = - (((tsens_base0_data) + tsens6_point1) << 2) + - tmdev->sensor[6].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[7] = - (((tsens_base0_data) + tsens7_point1) << 2) + - tmdev->sensor[7].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[8] = - (((tsens_base0_data) + tsens8_point1) << 2) + - tmdev->sensor[8].wa_temp1_calib_offset_factor; - calib_tsens_point1_data[9] = - (((tsens_base0_data) + tsens9_point1) << 2) + - tmdev->sensor[9].wa_temp1_calib_offset_factor; - if (ext_sen) - calib_tsens_point1_data[10] = - (((tsens_base0_data) + tsens10_point1) << 2) + - tmdev->sensor[10].wa_temp1_calib_offset_factor; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2) + - tmdev->sensor[0].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2) + - tmdev->sensor[1].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2) + - tmdev->sensor[2].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2) + - tmdev->sensor[3].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2) + - tmdev->sensor[4].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[5] = - ((tsens_base1_data + tsens5_point2) << 2) + - tmdev->sensor[5].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[6] = - ((tsens_base1_data + tsens6_point2) << 2) + - tmdev->sensor[6].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[7] = - ((tsens_base1_data + tsens7_point2) << 2) + - tmdev->sensor[7].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[8] = - ((tsens_base1_data + tsens8_point2) << 2) + - tmdev->sensor[8].wa_temp2_calib_offset_factor; - calib_tsens_point2_data[9] = - ((tsens_base1_data + tsens9_point2) << 2) + - tmdev->sensor[9].wa_temp2_calib_offset_factor; - if (ext_sen) - calib_tsens_point2_data[10] = - ((tsens_base1_data + tsens10_point2) << 2) + - tmdev->sensor[10].wa_temp2_calib_offset_factor; - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* - * slope (m) = adc_code2 - adc_code1 (y2 - y1) - * temp_120_degc - temp_30_degc (x2 - x1) - */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - return 0; -} - -static int tsens_calib_mdm9607_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens_calibration_mode = 0; - uint32_t calib_data[3] = {0, 0, 0}; - uint32_t calib_tsens_point1_data[5], calib_tsens_point2_data[5]; - - if (!tmdev->calibration_less_mode) { - calib_data[0] = readl_relaxed(tmdev->tsens_calib_addr + 0x228); - calib_data[1] = readl_relaxed(tmdev->tsens_calib_addr + 0x22c); - calib_data[2] = readl_relaxed(tmdev->tsens_calib_addr + 0x230); - - tsens_calibration_mode = - (calib_data[2] & TSENS_MDM9607_TSENS_CAL_SEL) >> - TSENS_MDM9607_CAL_SEL_SHIFT; - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = - (calib_data[0] & TSENS_MDM9607_BASE0_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_MDM9607_POINT1_MASK) - >> TSENS0_MDM9607_POINT1_SHIFT; - tsens1_point1 = (calib_data[0] & TSENS1_MDM9607_POINT1_MASK) - >> TSENS1_MDM9607_POINT1_SHIFT; - tsens2_point1 = (calib_data[1] & TSENS2_MDM9607_POINT1_MASK); - tsens3_point1 = (calib_data[1] & TSENS3_MDM9607_POINT1_MASK) - >> TSENS3_MDM9607_POINT1_SHIFT; - tsens4_point1 = (calib_data[2] & TSENS4_MDM9607_POINT1_MASK); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[2] & TSENS_MDM9607_BASE1_MASK) - >> TSENS_MDM9607_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & TSENS0_MDM9607_POINT2_MASK) - >> TSENS0_MDM9607_POINT2_SHIFT; - tsens1_point2 = (calib_data[0] & TSENS1_MDM9607_POINT2_MASK) - >> TSENS1_MDM9607_POINT2_SHIFT; - tsens2_point2 = (calib_data[1] & TSENS2_MDM9607_POINT2_MASK) - >> TSENS2_MDM9607_POINT2_SHIFT; - tsens3_point2 = (calib_data[1] & TSENS3_MDM9607_POINT2_MASK) - >> TSENS3_MDM9607_POINT2_SHIFT; - tsens4_point2 = (calib_data[2] & TSENS4_MDM9607_POINT2_MASK) - >> TSENS4_MDM9607_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS in calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - calib_tsens_point2_data[i] = TSENS_NO_CALIB_POINT2_DATA; - calib_tsens_point1_data[i] = TSENS_NO_CALIB_POINT1_DATA; - } - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2); - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2); - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2); - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2); - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2); - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2); - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2); - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2); - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2); - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* - * slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - * temp_120_degc - temp_30_degc (x2 - x1) - */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_msm8952_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens5_point1 = 0, tsens5_point2 = 0; - int tsens6_point1 = 0, tsens6_point2 = 0; - int tsens7_point1 = 0, tsens7_point2 = 0; - int tsens8_point1 = 0, tsens8_point2 = 0; - int tsens9_point1 = 0, tsens9_point2 = 0; - int tsens10_point1 = 0, tsens10_point2 = 0; - - int tsens_calibration_mode = 0, temp = 0; - uint32_t calib_data[5] = {0, 0, 0, 0, 0}; - uint32_t calib_tsens_point1_data[11], calib_tsens_point2_data[11]; - - if (!tmdev->calibration_less_mode) { - calib_data[0] = readl_relaxed( - TSENS_8939_EEPROM - (tmdev->tsens_calib_addr) + 0x30); - calib_data[1] = readl_relaxed( - (TSENS_8939_EEPROM - (tmdev->tsens_calib_addr) + 0x34)); - calib_data[2] = readl_relaxed( - (TSENS_8939_EEPROM - (tmdev->tsens_calib_addr))); - calib_data[3] = readl_relaxed( - (TSENS_8939_EEPROM - (tmdev->tsens_calib_addr) + 0x4)); - calib_data[4] = readl_relaxed( - (TSENS_8939_EEPROM - (tmdev->tsens_calib_addr) + 0x50)); - - tsens_calibration_mode = - (calib_data[0] & - TSENS_CONTR_14_TSENS_CAL_SEL); - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[2] & - TSENS_CONTR_14_BASE0_MASK); - tsens0_point1 = (calib_data[0] & - TSENS0_CONTR_14_POINT1_MASK) - >> TSENS0_CONTR_14_POINT1_SHIFT; - tsens1_point1 = (calib_data[0] & - TSENS1_CONTR_14_POINT1_MASK) - >> TSENS1_CONTR_14_POINT1_SHIFT; - tsens2_point1 = (calib_data[0] & - TSENS2_CONTR_14_POINT1_MASK_0_4) - >> TSENS2_CONTR_14_POINT1_SHIFT_0_4; - temp = (calib_data[1] & TSENS2_CONTR_14_POINT1_MASK_5) - << TSENS2_CONTR_14_POINT1_SHIFT_5; - tsens2_point1 |= temp; - tsens3_point1 = (calib_data[1] & - TSENS3_CONTR_14_POINT1_MASK) - >> TSENS3_CONTR_14_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & - TSENS4_CONTR_14_POINT1_MASK) - >> TSENS4_CONTR_14_POINT1_SHIFT; - tsens5_point1 = (calib_data[2] & - TSENS5_CONTR_14_POINT1_MASK) - >> TSENS5_CONTR_14_POINT1_SHIFT; - tsens6_point1 = (calib_data[2] & - TSENS6_CONTR_14_POINT1_MASK) - >> TSENS6_CONTR_14_POINT1_SHIFT; - tsens7_point1 = (calib_data[3] & - TSENS7_CONTR_14_POINT1_MASK); - tsens8_point1 = (calib_data[3] & - TSENS8_CONTR_14_POINT1_MASK) - >> TSENS8_CONTR_14_POINT1_SHIFT; - tsens9_point1 = (calib_data[4] & - TSENS9_CONTR_14_POINT1_MASK); - tsens10_point1 = (calib_data[4] & - TSENS10_CONTR_14_POINT1_MASK) - >> TSENS10_CONTR_14_POINT1_SHIFT; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[3] & - TSENS_CONTR_14_BASE1_MASK) - >> TSENS_CONTR_14_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & - TSENS0_CONTR_14_POINT2_MASK) - >> TSENS0_CONTR_14_POINT2_SHIFT; - tsens1_point2 = (calib_data[0] & - TSENS1_CONTR_14_POINT2_MASK) - >> TSENS1_CONTR_14_POINT2_SHIFT; - tsens2_point2 = (calib_data[1] & - TSENS2_CONTR_14_POINT2_MASK) - >> TSENS2_CONTR_14_POINT2_SHIFT; - tsens3_point2 = (calib_data[1] & - TSENS3_CONTR_14_POINT2_MASK) - >> TSENS3_CONTR_14_POINT2_SHIFT; - tsens4_point2 = (calib_data[1] & - TSENS4_CONTR_14_POINT2_MASK) - >> TSENS4_CONTR_14_POINT2_SHIFT; - tsens5_point2 = (calib_data[2] & - TSENS5_CONTR_14_POINT2_MASK) - >> TSENS5_CONTR_14_POINT2_SHIFT; - tsens6_point2 = (calib_data[2] & - TSENS6_CONTR_14_POINT2_MASK) - >> TSENS6_CONTR_14_POINT2_SHIFT; - tsens7_point2 = (calib_data[3] & - TSENS7_CONTR_14_POINT2_MASK) - >> TSENS7_CONTR_14_POINT2_SHIFT; - tsens8_point2 = (calib_data[3] & - TSENS8_CONTR_14_POINT2_MASK) - >> TSENS8_CONTR_14_POINT2_SHIFT; - tsens9_point2 = (calib_data[4] & - TSENS9_CONTR_14_POINT2_MASK) - >> TSENS9_CONTR_14_POINT2_SHIFT; - tsens10_point2 = (calib_data[4] & - TSENS10_CONTR_14_POINT2_MASK) - >> TSENS10_CONTR_14_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS in calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - calib_tsens_point2_data[i] = TSENS_NO_CALIB_POINT2_DATA; - calib_tsens_point1_data[i] = TSENS_NO_CALIB_POINT1_DATA; - } - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2); - calib_tsens_point1_data[0] = calib_tsens_point1_data[0] + - TSENS_MSM8952_D30_WA_S0; - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2); - calib_tsens_point1_data[1] = calib_tsens_point1_data[1] - - TSENS_MSM8952_D30_WA_S1; - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2); - calib_tsens_point1_data[2] = calib_tsens_point1_data[2] + - TSENS_MSM8952_D30_WA_S2; - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2); - calib_tsens_point1_data[3] = calib_tsens_point1_data[3] + - TSENS_MSM8952_D30_WA_S3; - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2); - calib_tsens_point1_data[4] = calib_tsens_point1_data[4] + - TSENS_MSM8952_D30_WA_S4; - calib_tsens_point1_data[5] = - (((tsens_base0_data) + tsens5_point1) << 2); - calib_tsens_point1_data[5] = calib_tsens_point1_data[5] - - TSENS_MSM8952_D30_WA_S5; - calib_tsens_point1_data[6] = - (((tsens_base0_data) + tsens6_point1) << 2); - calib_tsens_point1_data[7] = - (((tsens_base0_data) + tsens7_point1) << 2); - calib_tsens_point1_data[7] = calib_tsens_point1_data[7] + - TSENS_MSM8952_D30_WA_S7; - calib_tsens_point1_data[8] = - (((tsens_base0_data) + tsens8_point1) << 2); - calib_tsens_point1_data[8] = calib_tsens_point1_data[8] + - TSENS_MSM8952_D30_WA_S8; - calib_tsens_point1_data[9] = - (((tsens_base0_data) + tsens9_point1) << 2); - calib_tsens_point1_data[10] = - (((tsens_base0_data) + tsens10_point1) << 2); - calib_tsens_point1_data[10] = calib_tsens_point1_data[10] - - TSENS_MSM8952_D30_WA_S10; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2); - calib_tsens_point1_data[0] = calib_tsens_point1_data[0] - - TSENS_MSM8952_D120_WA_S0; - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2); - calib_tsens_point1_data[1] = calib_tsens_point1_data[1] - - TSENS_MSM8952_D120_WA_S1; - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2); - calib_tsens_point1_data[2] = calib_tsens_point1_data[2] + - TSENS_MSM8952_D120_WA_S2; - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2); - calib_tsens_point1_data[3] = calib_tsens_point1_data[3] + - TSENS_MSM8952_D120_WA_S3; - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2); - calib_tsens_point1_data[4] = calib_tsens_point1_data[4] + - TSENS_MSM8952_D120_WA_S4; - calib_tsens_point2_data[5] = - ((tsens_base1_data + tsens5_point2) << 2); - calib_tsens_point1_data[5] = calib_tsens_point1_data[5] - - TSENS_MSM8952_D120_WA_S5; - calib_tsens_point2_data[6] = - ((tsens_base1_data + tsens6_point2) << 2); - calib_tsens_point1_data[6] = calib_tsens_point1_data[6] - - TSENS_MSM8952_D120_WA_S6; - calib_tsens_point2_data[7] = - ((tsens_base1_data + tsens7_point2) << 2); - calib_tsens_point1_data[7] = calib_tsens_point1_data[7] + - TSENS_MSM8952_D120_WA_S7; - calib_tsens_point2_data[8] = - ((tsens_base1_data + tsens8_point2) << 2); - calib_tsens_point1_data[8] = calib_tsens_point1_data[8] + - TSENS_MSM8952_D120_WA_S8; - calib_tsens_point2_data[9] = - ((tsens_base1_data + tsens9_point2) << 2); - calib_tsens_point2_data[10] = - ((tsens_base1_data + tsens10_point2) << 2); - calib_tsens_point1_data[10] = calib_tsens_point1_data[10] - - TSENS_MSM8952_D120_WA_S10; - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB_N_WA) || - (tsens_calibration_mode == - TSENS_TWO_POINT_CALIB_N_OFFSET_WA)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2); - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2); - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2); - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2); - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2); - calib_tsens_point1_data[5] = - (((tsens_base0_data) + tsens5_point1) << 2); - calib_tsens_point1_data[6] = - (((tsens_base0_data) + tsens6_point1) << 2); - calib_tsens_point1_data[7] = - (((tsens_base0_data) + tsens7_point1) << 2); - calib_tsens_point1_data[8] = - (((tsens_base0_data) + tsens8_point1) << 2); - calib_tsens_point1_data[9] = - (((tsens_base0_data) + tsens9_point1) << 2); - calib_tsens_point1_data[10] = - (((tsens_base0_data) + tsens10_point1) << 2); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB_N_WA) || - (tsens_calibration_mode == - TSENS_TWO_POINT_CALIB_N_OFFSET_WA)) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2); - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2); - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2); - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2); - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2); - calib_tsens_point2_data[5] = - ((tsens_base1_data + tsens5_point2) << 2); - calib_tsens_point2_data[6] = - ((tsens_base1_data + tsens6_point2) << 2); - calib_tsens_point2_data[7] = - ((tsens_base1_data + tsens7_point2) << 2); - calib_tsens_point2_data[8] = - ((tsens_base1_data + tsens8_point2) << 2); - calib_tsens_point2_data[9] = - ((tsens_base1_data + tsens9_point2) << 2); - calib_tsens_point2_data[10] = - ((tsens_base1_data + tsens10_point2) << 2); - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* - * slope (m) = adc_code2 - adc_code1 (y2 - y1) - * temp_120_degc - temp_30_degc (x2 - x1) - */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - return 0; -} - -static int tsens_calib_msm8909_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens_calibration_mode = 0, temp = 0; - uint32_t calib_data[3] = {0, 0, 0}; - uint32_t calib_tsens_point1_data[5], calib_tsens_point2_data[5]; - - if (!tmdev->calibration_less_mode) { - - calib_data[0] = readl_relaxed( - TSENS_8939_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_8939_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - calib_data[2] = readl_relaxed( - (TSENS_8939_EEPROM(tmdev->tsens_calib_addr) + 0x3c)); - - tsens_calibration_mode = - (calib_data[2] & TSENS_MSM8909_TSENS_CAL_SEL) >> - TSENS_MSM8909_CAL_SEL_SHIFT; - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[2] & TSENS_MSM8909_BASE0_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_MSM8909_POINT1_MASK); - tsens1_point1 = (calib_data[0] & TSENS1_MSM8909_POINT1_MASK) - >> TSENS1_MSM8909_POINT1_SHIFT; - tsens2_point1 = (calib_data[0] & TSENS2_MSM8909_POINT1_MASK) - >> TSENS2_MSM8909_POINT1_SHIFT; - tsens3_point1 = (calib_data[1] & TSENS3_MSM8909_POINT1_MASK) - >> TSENS3_MSM8909_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & TSENS4_MSM8909_POINT1_MASK) - >> TSENS4_MSM8909_POINT1_SHIFT; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[2] & TSENS_MSM8909_BASE1_MASK) - >> TSENS_MSM8909_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & TSENS0_MSM8909_POINT2_MASK) - >> TSENS0_MSM8909_POINT2_SHIFT; - tsens1_point2 = (calib_data[0] & TSENS1_MSM8909_POINT2_MASK) - >> TSENS1_MSM8909_POINT2_SHIFT; - tsens2_point2 = - (calib_data[0] & TSENS2_MSM8909_POINT2_MASK_0_1) - >> TSENS2_MSM8909_POINT2_SHIFT_0_1; - temp = (calib_data[1] & TSENS2_MSM8909_POINT2_MASK_2_5) << - TSENS2_MSM8909_POINT2_SHIFT_2_5; - tsens2_point2 |= temp; - tsens3_point2 = (calib_data[1] & TSENS3_MSM8909_POINT2_MASK) - >> TSENS3_MSM8909_POINT2_SHIFT; - tsens4_point2 = (calib_data[1] & TSENS4_MSM8909_POINT2_MASK) - >> TSENS4_MSM8909_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 500; - calib_tsens_point1_data[1] = 500; - calib_tsens_point1_data[2] = 500; - calib_tsens_point1_data[3] = 500; - calib_tsens_point1_data[4] = 500; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2); - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2); - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2); - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2); - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2); - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2); - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2); - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2); - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2); - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - * temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8939_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens5_point1 = 0, tsens5_point2 = 0; - int tsens6_point1 = 0, tsens6_point2 = 0; - int tsens7_point1 = 0, tsens7_point2 = 0; - int tsens8_point1 = 0, tsens8_point2 = 0; - int tsens_calibration_mode = 0, temp = 0; - uint32_t calib_data[4] = {0, 0, 0, 0}; - uint32_t calib_tsens_point1_data[9], calib_tsens_point2_data[9]; - - if (!tmdev->calibration_less_mode) { - - calib_data[0] = readl_relaxed( - TSENS_8939_EEPROM(tmdev->tsens_calib_addr) + 0x30); - calib_data[1] = readl_relaxed( - (TSENS_8939_EEPROM(tmdev->tsens_calib_addr) + 0x34)); - calib_data[2] = readl_relaxed( - (TSENS_8939_EEPROM(tmdev->tsens_calib_addr))); - calib_data[3] = readl_relaxed( - (TSENS_8939_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - - tsens_calibration_mode = - (calib_data[0] & TSENS_8939_TSENS_CAL_SEL); - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[2] & TSENS_8939_BASE0_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_8939_POINT1_MASK) >> - TSENS0_8939_POINT1_SHIFT; - tsens1_point1 = (calib_data[0] & TSENS1_8939_POINT1_MASK) >> - TSENS1_8939_POINT1_SHIFT; - tsens2_point1 = (calib_data[0] & TSENS2_8939_POINT1_MASK_0_4) - >> TSENS2_8939_POINT1_SHIFT_0_4; - temp = (calib_data[1] & TSENS2_8939_POINT1_MASK_5) << - TSENS2_8939_POINT1_SHIFT_5; - tsens2_point1 |= temp; - tsens3_point1 = (calib_data[1] & TSENS3_8939_POINT1_MASK) >> - TSENS3_8939_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & TSENS4_8939_POINT1_MASK) >> - TSENS4_8939_POINT1_SHIFT; - tsens5_point1 = (calib_data[2] & TSENS5_8939_POINT1_MASK) >> - TSENS5_8939_POINT1_SHIFT; - tsens6_point1 = (calib_data[2] & TSENS6_8939_POINT1_MASK) >> - TSENS6_8939_POINT1_SHIFT; - tsens7_point1 = (calib_data[3] & TSENS7_8939_POINT1_MASK); - tsens8_point1 = (calib_data[3] & TSENS8_8939_POINT1_MASK) >> - TSENS8_8939_POINT1_SHIFT; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[3] & TSENS_8939_BASE1_MASK) >> - TSENS_8939_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & TSENS0_8939_POINT2_MASK) >> - TSENS0_8939_POINT2_SHIFT; - tsens1_point2 = (calib_data[0] & TSENS1_8939_POINT2_MASK) >> - TSENS1_8939_POINT2_SHIFT; - tsens2_point2 = (calib_data[1] & TSENS2_8939_POINT2_MASK) >> - TSENS2_8939_POINT2_SHIFT; - tsens3_point2 = (calib_data[1] & TSENS3_8939_POINT2_MASK) >> - TSENS3_8939_POINT2_SHIFT; - tsens4_point2 = (calib_data[1] & TSENS4_8939_POINT2_MASK) >> - TSENS4_8939_POINT2_SHIFT; - tsens5_point2 = (calib_data[2] & TSENS5_8939_POINT2_MASK) >> - TSENS5_8939_POINT2_SHIFT; - tsens6_point2 = (calib_data[2] & TSENS6_8939_POINT2_MASK) >> - TSENS6_8939_POINT2_SHIFT; - tsens7_point2 = (calib_data[3] & TSENS7_8939_POINT2_MASK) >> - TSENS7_8939_POINT2_SHIFT; - tsens8_point2 = (calib_data[3] & TSENS8_8939_POINT2_MASK) >> - TSENS8_8939_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 500; - calib_tsens_point1_data[1] = 500; - calib_tsens_point1_data[2] = 500; - calib_tsens_point1_data[3] = 500; - calib_tsens_point1_data[4] = 500; - calib_tsens_point1_data[5] = 500; - calib_tsens_point1_data[6] = 500; - calib_tsens_point1_data[7] = 500; - calib_tsens_point1_data[8] = 500; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 2); - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 2); - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 2); - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 2); - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 2); - calib_tsens_point1_data[5] = - (((tsens_base0_data) + tsens5_point1) << 2); - calib_tsens_point1_data[6] = - (((tsens_base0_data) + tsens6_point1) << 2); - calib_tsens_point1_data[7] = - (((tsens_base0_data) + tsens7_point1) << 2); - calib_tsens_point1_data[8] = - (((tsens_base0_data) + tsens8_point1) << 2); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 2); - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 2); - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 2); - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 2); - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 2); - calib_tsens_point2_data[5] = - ((tsens_base1_data + tsens5_point2) << 2); - calib_tsens_point2_data[6] = - ((tsens_base1_data + tsens6_point2) << 2); - calib_tsens_point2_data[7] = - ((tsens_base1_data + tsens7_point2) << 2); - calib_tsens_point2_data[8] = - ((tsens_base1_data + tsens8_point2) << 2); - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - * temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8916_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point1 = 0, tsens0_point2 = 0; - int tsens1_point1 = 0, tsens1_point2 = 0; - int tsens2_point1 = 0, tsens2_point2 = 0; - int tsens3_point1 = 0, tsens3_point2 = 0; - int tsens4_point1 = 0, tsens4_point2 = 0; - int tsens_calibration_mode = 0; - uint32_t calib_data[3] = {0, 0, 0}; - uint32_t calib_tsens_point1_data[5], calib_tsens_point2_data[5]; - - if (!tmdev->calibration_less_mode) { - - calib_data[0] = readl_relaxed( - TSENS_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - calib_data[2] = readl_relaxed( - (TSENS_EEPROM(tmdev->tsens_calib_addr) + 0x1c)); - - tsens_calibration_mode = - (calib_data[2] & TSENS_8916_TSENS_CAL_SEL) >> - TSENS_8916_CAL_SEL_SHIFT; - - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[0] & TSENS_8916_BASE0_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_8916_POINT1_MASK) >> - TSENS0_8916_POINT1_SHIFT; - tsens1_point1 = (calib_data[0] & TSENS1_8916_POINT1_MASK) >> - TSENS1_8916_POINT1_SHIFT; - tsens2_point1 = (calib_data[0] & TSENS2_8916_POINT1_MASK) >> - TSENS2_8916_POINT1_SHIFT; - tsens3_point1 = (calib_data[1] & TSENS3_8916_POINT1_MASK) >> - TSENS3_8916_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & TSENS4_8916_POINT1_MASK) >> - TSENS4_8916_POINT1_SHIFT; - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[1] & TSENS_8916_BASE1_MASK) >> - TSENS_8916_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & TSENS0_8916_POINT2_MASK) >> - TSENS0_8916_POINT2_SHIFT; - tsens1_point2 = (calib_data[0] & TSENS1_8916_POINT2_MASK) >> - TSENS1_8916_POINT2_SHIFT; - tsens2_point2 = (calib_data[1] & TSENS2_8916_POINT2_MASK); - tsens3_point2 = (calib_data[1] & TSENS3_8916_POINT2_MASK) >> - TSENS3_8916_POINT2_SHIFT; - tsens4_point2 = (calib_data[1] & TSENS4_8916_POINT2_MASK) >> - TSENS4_8916_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 500; - calib_tsens_point1_data[1] = 500; - calib_tsens_point1_data[2] = 500; - calib_tsens_point1_data[3] = 500; - calib_tsens_point1_data[4] = 500; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - (((tsens_base0_data) + tsens0_point1) << 3); - calib_tsens_point1_data[1] = - (((tsens_base0_data) + tsens1_point1) << 3); - calib_tsens_point1_data[2] = - (((tsens_base0_data) + tsens2_point1) << 3); - calib_tsens_point1_data[3] = - (((tsens_base0_data) + tsens3_point1) << 3); - calib_tsens_point1_data[4] = - (((tsens_base0_data) + tsens4_point1) << 3); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - ((tsens_base1_data + tsens0_point2) << 3); - calib_tsens_point2_data[1] = - ((tsens_base1_data + tsens1_point2) << 3); - calib_tsens_point2_data[2] = - ((tsens_base1_data + tsens2_point2) << 3); - calib_tsens_point2_data[3] = - ((tsens_base1_data + tsens3_point2) << 3); - calib_tsens_point2_data[4] = - ((tsens_base1_data + tsens4_point2) << 3); - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - * temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_9630_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens0_point = 0, tsens1_point = 0; - int tsens2_point = 0, tsens3_point = 0, tsens4_point = 0; - int tsens_base1_data = 0, tsens_calibration_mode = 0, calib_mode = 0; - uint32_t calib_data[2], calib_tsens_point_data[5]; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_data[0] = readl_relaxed( - TSENS_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - - calib_mode = (calib_data[1] & TSENS_TORINO_CALIB_PT) >> - TSENS_TORINO_CALIB_SHIFT; - pr_debug("calib mode is %d\n", calib_mode); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & TSENS_TORINO_BASE0); - tsens_base1_data = (calib_data[0] & TSENS_TORINO_BASE1) >> - TSENS_TORINO_BASE1_SHIFT; - tsens0_point = (calib_data[0] & TSENS_TORINO_POINT0) >> - TSENS_TORINO_POINT0_SHIFT; - tsens1_point = (calib_data[0] & TSENS_TORINO_POINT1) >> - TSENS_TORINO_POINT1_SHIFT; - tsens2_point = (calib_data[0] & TSENS_TORINO_POINT2) >> - TSENS_TORINO_POINT2_SHIFT; - tsens3_point = (calib_data[0] & TSENS_TORINO_POINT3) >> - TSENS_TORINO_POINT3_SHIFT; - tsens4_point = (calib_data[0] & TSENS_TORINO_POINT4) >> - TSENS_TORINO_POINT4_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - } - - if (calib_mode == 0) { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - calib_tsens_point_data[0] = 532; - calib_tsens_point_data[1] = 532; - calib_tsens_point_data[2] = 532; - calib_tsens_point_data[3] = 532; - calib_tsens_point_data[4] = 532; - goto compute_intercept_slope; - } - -compute_intercept_slope: - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0, adc_code_of_tempx = 0; - - tmdev->sensor[i].calib_data_point2 = tsens_base1_data; - tmdev->sensor[i].calib_data_point1 = tsens_base0_data; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - adc_code_of_tempx = - tsens_base0_data + calib_tsens_point_data[i]; - pr_debug("offset_adc_code_of_tempx:0x%x\n", - adc_code_of_tempx); - tmdev->sensor[i].offset = (adc_code_of_tempx * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8994_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens0_point = 0, tsens1_point = 0; - int tsens2_point = 0, tsens3_point = 0, tsens4_point = 0; - int tsens5_point = 0, tsens6_point = 0, tsens7_point = 0; - int tsens8_point = 0, tsens9_point = 0, tsens10_point = 0; - int tsens11_point = 0, tsens12_point = 0, tsens13_point = 0; - int tsens14_point = 0, tsens15_point = 0; - int tsens_base1_data = 0, calib_mode = 0; - uint32_t calib_data[6], calib_tsens_point_data[16], calib_redun_sel; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_redun_sel = readl_relaxed( - TSENS_8994_EEPROM_REDUN_SEL(tmdev->tsens_calib_addr)); - calib_redun_sel = calib_redun_sel & TSENS_8994_CAL_SEL_REDUN_MASK; - calib_redun_sel >>= TSENS_8994_CAL_SEL_REDUN_SHIFT; - - if (calib_redun_sel == TSENS_QFPROM_BACKUP_SEL) { - calib_data[0] = readl_relaxed( - TSENS_REDUN_REGION1_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - TSENS_REDUN_REGION2_EEPROM(tmdev->tsens_calib_addr)); - calib_data[2] = readl_relaxed( - TSENS_REDUN_REGION3_EEPROM(tmdev->tsens_calib_addr)); - calib_data[3] = readl_relaxed( - TSENS_REDUN_REGION4_EEPROM(tmdev->tsens_calib_addr)); - calib_data[4] = readl_relaxed( - TSENS_REDUN_REGION5_EEPROM(tmdev->tsens_calib_addr)); - - calib_mode = (calib_data[4] & TSENS_8994_REDUN_SEL_MASK); - pr_debug("calib mode is %d\n", calib_mode); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & - TSENS_BASE0_8994_REDUN_MASK) >> - TSENS_BASE0_8994_REDUN_MASK_SHIFT; - tsens_base1_data = (calib_data[0] & - TSENS_BASE1_BIT0_8994_REDUN_MASK) >> - TSENS_BASE1_BIT0_SHIFT_COMPUTE; - tsens_base1_data |= (calib_data[1] & - TSENS_BASE1_BIT1_9_8994_REDUN_MASK); - tsens0_point = (calib_data[1] & - TSENS0_OFFSET_8994_REDUN_MASK) >> - TSENS0_OFFSET_8994_REDUN_SHIFT; - tsens1_point = (calib_data[1] & - TSENS1_OFFSET_8994_REDUN_MASK) >> - TSENS1_OFFSET_8994_REDUN_SHIFT; - tsens2_point = (calib_data[1] & - TSENS2_OFFSET_8994_REDUN_MASK) >> - TSENS2_OFFSET_8994_REDUN_SHIFT; - tsens3_point = (calib_data[1] & - TSENS3_OFFSET_8994_REDUN_MASK) >> - TSENS3_OFFSET_8994_REDUN_SHIFT; - tsens4_point = (calib_data[1] & - TSENS4_OFFSET_8994_REDUN_MASK) >> - TSENS4_OFFSET_8994_REDUN_SHIFT; - tsens5_point = (calib_data[1] & - TSENS5_OFFSET_8994_REDUN_MASK_BIT0_2) >> - TSENS5_OFFSET_8994_REDUN_SHIFT_BIT0_2; - tsens5_point |= ((calib_data[2] & - TSENS5_OFFSET_8994_REDUN_MASK_BIT3) >> - TSENS5_OFFSET_8994_REDUN_SHIFT_BIT3); - tsens6_point = (calib_data[2] & - TSENS6_OFFSET_8994_REDUN_MASK) >> - TSENS6_OFFSET_8994_REDUN_SHIFT; - tsens7_point = (calib_data[2] & - TSENS7_OFFSET_8994_REDUN_MASK) >> - TSENS7_OFFSET_8994_REDUN_SHIFT; - tsens8_point = (calib_data[3] & - TSENS8_OFFSET_8994_REDUN_MASK); - tsens9_point = (calib_data[3] & - TSENS9_OFFSET_8994_REDUN_MASK) >> - TSENS9_OFFSET_8994_REDUN_SHIFT; - tsens10_point = (calib_data[3] & - TSENS10_OFFSET_8994_REDUN_MASK) >> - TSENS10_OFFSET_8994_REDUN_SHIFT; - tsens11_point = (calib_data[3] & - TSENS11_OFFSET_8994_REDUN_MASK) >> - TSENS11_OFFSET_8994_REDUN_SHIFT; - tsens12_point = (calib_data[3] & - TSENS12_OFFSET_8994_REDUN_MASK) >> - TSENS12_OFFSET_8994_REDUN_SHIFT; - tsens13_point = (calib_data[3] & - TSENS13_OFFSET_8994_REDUN_MASK) >> - TSENS13_OFFSET_8994_REDUN_SHIFT; - tsens14_point = (calib_data[3] & - TSENS14_OFFSET_8994_REDUN_MASK) >> - TSENS14_OFFSET_8994_REDUN_SHIFT; - tsens15_point = (calib_data[3] & - TSENS15_OFFSET_8994_REDUN_MASK) >> - TSENS15_OFFSET_8994_REDUN_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - calib_tsens_point_data[5] = tsens5_point; - calib_tsens_point_data[6] = tsens6_point; - calib_tsens_point_data[7] = tsens7_point; - calib_tsens_point_data[8] = tsens8_point; - calib_tsens_point_data[9] = tsens9_point; - calib_tsens_point_data[10] = tsens10_point; - calib_tsens_point_data[11] = tsens11_point; - calib_tsens_point_data[12] = tsens12_point; - calib_tsens_point_data[13] = tsens13_point; - calib_tsens_point_data[14] = tsens14_point; - calib_tsens_point_data[15] = tsens15_point; - } else - goto calibration_less_mode; - } else { - calib_data[0] = readl_relaxed( - TSENS_8994_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_8994_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - calib_data[2] = readl_relaxed( - (TSENS_8994_EEPROM(tmdev->tsens_calib_addr) + 0x8)); - - calib_mode = (calib_data[2] & TSENS_8994_CAL_SEL_MASK) >> - TSENS_8994_CAL_SEL_SHIFT; - pr_debug("calib mode is %d\n", calib_mode); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & - TSENS_BASE0_8994_MASK); - tsens_base1_data = (calib_data[0] & - TSENS_BASE1_8994_MASK) >> - TSENS_BASE1_8994_SHIFT; - tsens0_point = (calib_data[0] & - TSENS0_OFFSET_8994_MASK) >> - TSENS0_OFFSET_8994_SHIFT; - tsens1_point = (calib_data[0] & - TSENS1_OFFSET_8994_MASK) >> - TSENS1_OFFSET_8994_SHIFT; - tsens2_point = (calib_data[0] & - TSENS2_OFFSET_8994_MASK) >> - TSENS2_OFFSET_8994_SHIFT; - tsens3_point = (calib_data[1] & - TSENS3_OFFSET_8994_MASK); - tsens4_point = (calib_data[1] & - TSENS4_OFFSET_8994_MASK) >> - TSENS4_OFFSET_8994_SHIFT; - tsens5_point = (calib_data[1] & - TSENS5_OFFSET_8994_MASK) >> - TSENS5_OFFSET_8994_SHIFT; - tsens6_point = (calib_data[1] & - TSENS6_OFFSET_8994_MASK) >> - TSENS6_OFFSET_8994_SHIFT; - tsens7_point = (calib_data[1] & - TSENS7_OFFSET_8994_MASK) >> - TSENS7_OFFSET_8994_SHIFT; - tsens8_point = (calib_data[1] & - TSENS8_OFFSET_8994_MASK) >> - TSENS8_OFFSET_8994_SHIFT; - tsens9_point = (calib_data[1] & - TSENS9_OFFSET_8994_MASK) >> - TSENS9_OFFSET_8994_SHIFT; - tsens10_point = (calib_data[1] & - TSENS10_OFFSET_8994_MASK) >> - TSENS10_OFFSET_8994_SHIFT; - tsens11_point = (calib_data[2] & - TSENS11_OFFSET_8994_MASK); - tsens12_point = (calib_data[2] & - TSENS12_OFFSET_8994_MASK) >> - TSENS12_OFFSET_8994_SHIFT; - tsens13_point = (calib_data[2] & - TSENS13_OFFSET_8994_MASK) >> - TSENS13_OFFSET_8994_SHIFT; - tsens14_point = (calib_data[2] & - TSENS14_OFFSET_8994_MASK) >> - TSENS14_OFFSET_8994_SHIFT; - tsens15_point = (calib_data[2] & - TSENS15_OFFSET_8994_MASK) >> - TSENS15_OFFSET_8994_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - calib_tsens_point_data[5] = tsens5_point; - calib_tsens_point_data[6] = tsens6_point; - calib_tsens_point_data[7] = tsens7_point; - calib_tsens_point_data[8] = tsens8_point; - calib_tsens_point_data[9] = tsens9_point; - calib_tsens_point_data[10] = tsens10_point; - calib_tsens_point_data[11] = tsens11_point; - calib_tsens_point_data[12] = tsens12_point; - calib_tsens_point_data[13] = tsens13_point; - calib_tsens_point_data[14] = tsens14_point; - calib_tsens_point_data[15] = tsens15_point; - } else { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - calib_tsens_point_data[0] = 532; - calib_tsens_point_data[1] = 532; - calib_tsens_point_data[2] = 532; - calib_tsens_point_data[3] = 532; - calib_tsens_point_data[4] = 532; - calib_tsens_point_data[5] = 532; - calib_tsens_point_data[6] = 532; - calib_tsens_point_data[7] = 532; - calib_tsens_point_data[8] = 532; - calib_tsens_point_data[9] = 532; - calib_tsens_point_data[10] = 532; - calib_tsens_point_data[11] = 532; - calib_tsens_point_data[12] = 532; - calib_tsens_point_data[13] = 532; - calib_tsens_point_data[14] = 532; - calib_tsens_point_data[15] = 532; - } - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0, adc_code_of_tempx = 0; - - tmdev->sensor[i].calib_data_point2 = tsens_base1_data; - tmdev->sensor[i].calib_data_point1 = tsens_base0_data; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - adc_code_of_tempx = - tsens_base0_data + calib_tsens_point_data[i]; - pr_debug("offset_adc_code_of_tempx:0x%x\n", - adc_code_of_tempx); - tmdev->sensor[i].offset = (adc_code_of_tempx * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8992_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens0_point = 0, tsens1_point = 0; - int tsens2_point = 0, tsens3_point = 0, tsens4_point = 0; - int tsens5_point = 0, tsens6_point = 0, tsens7_point = 0; - int tsens8_point = 0, tsens9_point = 0, tsens10_point = 0; - int tsens11_point = 0, tsens12_point = 0, tsens13_point = 0; - int tsens14_point = 0, tsens15_point = 0; - int tsens_base1_data = 0, calib_mode = 0; - uint32_t calib_data[6], calib_tsens_point_data[16], calib_redun_sel; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_redun_sel = readl_relaxed( - TSENS_8994_EEPROM_REDUN_SEL(tmdev->tsens_calib_addr)); - calib_redun_sel = calib_redun_sel & TSENS_8994_CAL_SEL_REDUN_MASK; - calib_redun_sel >>= TSENS_8994_CAL_SEL_REDUN_SHIFT; - - if (calib_redun_sel == TSENS_QFPROM_BACKUP_SEL) { - calib_data[0] = readl_relaxed( - TSENS_REDUN_REGION1_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - TSENS_REDUN_REGION2_EEPROM(tmdev->tsens_calib_addr)); - calib_data[2] = readl_relaxed( - TSENS_REDUN_REGION3_EEPROM(tmdev->tsens_calib_addr)); - calib_data[3] = readl_relaxed( - TSENS_REDUN_REGION4_EEPROM(tmdev->tsens_calib_addr)); - calib_data[4] = readl_relaxed( - TSENS_REDUN_REGION5_EEPROM(tmdev->tsens_calib_addr)); - - calib_mode = (calib_data[4] & TSENS_8994_REDUN_SEL_MASK); - pr_debug("calib mode is %d\n", calib_mode); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & - TSENS_BASE0_8994_REDUN_MASK) >> - TSENS_BASE0_8994_REDUN_MASK_SHIFT; - tsens_base1_data = (calib_data[0] & - TSENS_BASE1_BIT0_8994_REDUN_MASK) >> - TSENS_BASE1_BIT0_SHIFT_COMPUTE; - tsens_base1_data |= (calib_data[1] & - TSENS_BASE1_BIT1_9_8994_REDUN_MASK); - tsens0_point = (calib_data[1] & - TSENS0_OFFSET_8994_REDUN_MASK) >> - TSENS0_OFFSET_8994_REDUN_SHIFT; - tsens1_point = (calib_data[1] & - TSENS1_OFFSET_8994_REDUN_MASK) >> - TSENS1_OFFSET_8994_REDUN_SHIFT; - tsens2_point = (calib_data[1] & - TSENS2_OFFSET_8994_REDUN_MASK) >> - TSENS2_OFFSET_8994_REDUN_SHIFT; - tsens3_point = (calib_data[1] & - TSENS3_OFFSET_8994_REDUN_MASK) >> - TSENS3_OFFSET_8994_REDUN_SHIFT; - tsens4_point = (calib_data[1] & - TSENS4_OFFSET_8994_REDUN_MASK) >> - TSENS4_OFFSET_8994_REDUN_SHIFT; - tsens5_point = (calib_data[1] & - TSENS5_OFFSET_8994_REDUN_MASK_BIT0_2) >> - TSENS5_OFFSET_8994_REDUN_SHIFT_BIT0_2; - tsens5_point |= ((calib_data[2] & - TSENS5_OFFSET_8994_REDUN_MASK_BIT3) >> - TSENS5_OFFSET_8994_REDUN_SHIFT_BIT3); - tsens6_point = (calib_data[2] & - TSENS6_OFFSET_8994_REDUN_MASK) >> - TSENS6_OFFSET_8994_REDUN_SHIFT; - tsens7_point = (calib_data[2] & - TSENS7_OFFSET_8994_REDUN_MASK) >> - TSENS7_OFFSET_8994_REDUN_SHIFT; - tsens8_point = (calib_data[3] & - TSENS8_OFFSET_8994_REDUN_MASK); - tsens9_point = (calib_data[3] & - TSENS9_OFFSET_8994_REDUN_MASK) >> - TSENS9_OFFSET_8994_REDUN_SHIFT; - tsens10_point = (calib_data[3] & - TSENS10_OFFSET_8994_REDUN_MASK) >> - TSENS10_OFFSET_8994_REDUN_SHIFT; - tsens11_point = (calib_data[3] & - TSENS11_OFFSET_8994_REDUN_MASK) >> - TSENS11_OFFSET_8994_REDUN_SHIFT; - tsens12_point = (calib_data[3] & - TSENS12_OFFSET_8994_REDUN_MASK) >> - TSENS12_OFFSET_8994_REDUN_SHIFT; - tsens13_point = (calib_data[3] & - TSENS13_OFFSET_8994_REDUN_MASK) >> - TSENS13_OFFSET_8994_REDUN_SHIFT; - tsens14_point = (calib_data[3] & - TSENS14_OFFSET_8994_REDUN_MASK) >> - TSENS14_OFFSET_8994_REDUN_SHIFT; - tsens15_point = (calib_data[3] & - TSENS15_OFFSET_8994_REDUN_MASK) >> - TSENS15_OFFSET_8994_REDUN_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - calib_tsens_point_data[5] = tsens5_point; - calib_tsens_point_data[6] = tsens7_point; - calib_tsens_point_data[7] = tsens9_point; - calib_tsens_point_data[8] = tsens10_point; - calib_tsens_point_data[9] = tsens11_point; - calib_tsens_point_data[10] = tsens12_point; - calib_tsens_point_data[11] = tsens13_point; - calib_tsens_point_data[12] = tsens14_point; - } else - goto calibration_less_mode; - } else { - calib_data[0] = readl_relaxed( - TSENS_8994_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_8994_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - calib_data[2] = readl_relaxed( - (TSENS_8994_EEPROM(tmdev->tsens_calib_addr) + 0x8)); - - calib_mode = (calib_data[2] & TSENS_8994_CAL_SEL_MASK) >> - TSENS_8994_CAL_SEL_SHIFT; - pr_debug("calib mode is %d\n", calib_mode); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & - TSENS_BASE0_8994_MASK); - tsens_base1_data = (calib_data[0] & - TSENS_BASE1_8994_MASK) >> - TSENS_BASE1_8994_SHIFT; - tsens0_point = (calib_data[0] & - TSENS0_OFFSET_8994_MASK) >> - TSENS0_OFFSET_8994_SHIFT; - tsens1_point = (calib_data[0] & - TSENS1_OFFSET_8994_MASK) >> - TSENS1_OFFSET_8994_SHIFT; - tsens2_point = (calib_data[0] & - TSENS2_OFFSET_8994_MASK) >> - TSENS2_OFFSET_8994_SHIFT; - tsens3_point = (calib_data[1] & - TSENS3_OFFSET_8994_MASK); - tsens4_point = (calib_data[1] & - TSENS4_OFFSET_8994_MASK) >> - TSENS4_OFFSET_8994_SHIFT; - tsens5_point = (calib_data[1] & - TSENS5_OFFSET_8994_MASK) >> - TSENS5_OFFSET_8994_SHIFT; - tsens7_point = (calib_data[1] & - TSENS6_OFFSET_8994_MASK) >> - TSENS6_OFFSET_8994_SHIFT; - tsens9_point = (calib_data[1] & - TSENS7_OFFSET_8994_MASK) >> - TSENS7_OFFSET_8994_SHIFT; - tsens10_point = (calib_data[1] & - TSENS8_OFFSET_8994_MASK) >> - TSENS8_OFFSET_8994_SHIFT; - tsens11_point = (calib_data[1] & - TSENS9_OFFSET_8994_MASK) >> - TSENS9_OFFSET_8994_SHIFT; - tsens12_point = (calib_data[1] & - TSENS10_OFFSET_8994_MASK) >> - TSENS10_OFFSET_8994_SHIFT; - tsens13_point = (calib_data[2] & - TSENS11_OFFSET_8994_MASK); - tsens14_point = (calib_data[2] & - TSENS12_OFFSET_8994_MASK) >> - TSENS12_OFFSET_8994_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - calib_tsens_point_data[5] = tsens5_point; - calib_tsens_point_data[6] = tsens7_point; - calib_tsens_point_data[7] = tsens9_point; - calib_tsens_point_data[8] = tsens10_point; - calib_tsens_point_data[9] = tsens11_point; - calib_tsens_point_data[10] = tsens12_point; - calib_tsens_point_data[11] = tsens13_point; - calib_tsens_point_data[12] = tsens14_point; - } else { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - calib_tsens_point_data[0] = 532; - calib_tsens_point_data[1] = 532; - calib_tsens_point_data[2] = 532; - calib_tsens_point_data[3] = 532; - calib_tsens_point_data[4] = 532; - calib_tsens_point_data[5] = 532; - calib_tsens_point_data[6] = 532; - calib_tsens_point_data[7] = 532; - calib_tsens_point_data[8] = 532; - calib_tsens_point_data[9] = 532; - calib_tsens_point_data[10] = 532; - calib_tsens_point_data[11] = 532; - calib_tsens_point_data[12] = 532; - calib_tsens_point_data[13] = 532; - calib_tsens_point_data[14] = 532; - calib_tsens_point_data[15] = 532; - } - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0, adc_code_of_tempx = 0; - - tmdev->sensor[i].calib_data_point2 = tsens_base1_data; - tmdev->sensor[i].calib_data_point1 = tsens_base0_data; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (calib_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - adc_code_of_tempx = - tsens_base0_data + calib_tsens_point_data[i]; - pr_debug("offset_adc_code_of_tempx:0x%x\n", - adc_code_of_tempx); - tmdev->sensor[i].offset = (adc_code_of_tempx * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8x10_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens0_point1 = 0, tsens1_point1 = 0; - int tsens0_point2 = 0, tsens1_point2 = 0; - int tsens_base1_data = 0, tsens_calibration_mode = 0; - uint32_t calib_data[2], calib_redun_sel; - uint32_t calib_tsens_point1_data[2], calib_tsens_point2_data[2]; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_redun_sel = readl_relaxed( - TSENS_EEPROM_8X10_2(tmdev->tsens_calib_addr)); - calib_redun_sel = calib_redun_sel & TSENS_8X10_REDUN_SEL_MASK; - calib_redun_sel >>= TSENS_8X10_REDUN_SEL_SHIFT; - pr_debug("calib_redun_sel:%x\n", calib_redun_sel); - - if (calib_redun_sel == TSENS_QFPROM_BACKUP_SEL) { - calib_data[0] = readl_relaxed( - TSENS_EEPROM_8X10_SPARE_1(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - TSENS_EEPROM_8X10_SPARE_2(tmdev->tsens_calib_addr)); - } else { - calib_data[0] = readl_relaxed( - TSENS_EEPROM_8X10_1(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_EEPROM_8X10_1(tmdev->tsens_calib_addr) + - TSENS_EEPROM_8X10_1_OFFSET)); - } - - tsens_calibration_mode = (calib_data[0] & TSENS_8X10_TSENS_CAL_SEL) - >> TSENS_8X10_CAL_SEL_SHIFT; - pr_debug("calib mode scheme:%x\n", tsens_calibration_mode); - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[0] & TSENS_8X10_BASE0_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_8X10_POINT1_MASK) >> - TSENS0_8X10_POINT1_SHIFT; - tsens1_point1 = calib_data[1] & TSENS1_8X10_POINT1_MASK; - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[0] & TSENS_8X10_BASE1_MASK) >> - TSENS_8X10_BASE1_SHIFT; - tsens0_point2 = (calib_data[0] & TSENS0_8X10_POINT2_MASK) >> - TSENS0_8X10_POINT2_SHIFT; - tsens1_point2 = (calib_data[1] & TSENS1_8X10_POINT2_MASK) >> - TSENS1_8X10_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 595; - calib_tsens_point1_data[1] = 629; - goto compute_intercept_slope; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - ((((tsens_base0_data) + tsens0_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[1] = - ((((tsens_base0_data) + tsens1_point1) << 2) | - TSENS_BIT_APPEND); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - (((tsens_base1_data + tsens0_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[1] = - (((tsens_base1_data + tsens1_point2) << 2) | - TSENS_BIT_APPEND); - } - -compute_intercept_slope: - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8x26_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base0_data = 0, tsens0_point1 = 0, tsens1_point1 = 0; - int tsens2_point1 = 0, tsens3_point1 = 0, tsens4_point1 = 0; - int tsens5_point1 = 0, tsens6_point1 = 0, tsens6_point2 = 0; - int tsens0_point2 = 0, tsens1_point2 = 0, tsens2_point2 = 0; - int tsens3_point2 = 0, tsens4_point2 = 0, tsens5_point2 = 0; - int tsens_base1_data = 0, tsens_calibration_mode = 0; - uint32_t calib_data[6]; - uint32_t calib_tsens_point1_data[7], calib_tsens_point2_data[7]; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - for (i = 0; i < TSENS_8X26_MAIN_CALIB_ADDR_RANGE; i++) - calib_data[i] = readl_relaxed( - (TSENS_EEPROM_8X26_1(tmdev->tsens_calib_addr)) - + (i * TSENS_SN_ADDR_OFFSET)); - calib_data[4] = readl_relaxed( - (TSENS_EEPROM_8X26_2(tmdev->tsens_calib_addr))); - calib_data[5] = readl_relaxed( - (TSENS_EEPROM_8X26_2(tmdev->tsens_calib_addr)) + 0x8); - - tsens_calibration_mode = (calib_data[5] & TSENS_8X26_TSENS_CAL_SEL) - >> TSENS_8X26_CAL_SEL_SHIFT; - pr_debug("calib mode scheme:%x\n", tsens_calibration_mode); - - if ((tsens_calibration_mode == TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base0_data = (calib_data[0] & TSENS_8X26_BASE0_MASK) - >> TSENS_8X26_BASE0_SHIFT; - tsens0_point1 = (calib_data[0] & TSENS0_8X26_POINT1_MASK) >> - TSENS0_8X26_POINT1_SHIFT; - tsens1_point1 = calib_data[1] & TSENS1_8X26_POINT1_MASK; - tsens2_point1 = (calib_data[1] & TSENS2_8X26_POINT1_MASK) >> - TSENS2_8X26_POINT1_SHIFT; - tsens3_point1 = (calib_data[1] & TSENS3_8X26_POINT1_MASK) >> - TSENS3_8X26_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & TSENS4_8X26_POINT1_MASK) >> - TSENS4_8X26_POINT1_SHIFT; - tsens5_point1 = (calib_data[1] & TSENS5_8X26_POINT1_MASK) >> - TSENS5_8X26_POINT1_SHIFT; - tsens6_point1 = (calib_data[2] & TSENS6_8X26_POINT1_MASK) >> - TSENS6_8X26_POINT1_SHIFT; - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base1_data = (calib_data[3] & TSENS_8X26_BASE1_MASK); - tsens0_point2 = (calib_data[3] & TSENS0_8X26_POINT2_MASK) >> - TSENS0_8X26_POINT2_SHIFT; - tsens1_point2 = (calib_data[3] & TSENS1_8X26_POINT2_MASK) >> - TSENS1_8X26_POINT2_SHIFT; - tsens2_point2 = (calib_data[3] & TSENS2_8X26_POINT2_MASK) >> - TSENS2_8X26_POINT2_SHIFT; - tsens3_point2 = (calib_data[3] & TSENS3_8X26_POINT2_MASK) >> - TSENS3_8X26_POINT2_SHIFT; - tsens4_point2 = (calib_data[4] & TSENS4_8X26_POINT2_MASK) >> - TSENS4_8X26_POINT2_SHIFT; - tsens5_point2 = (calib_data[4] & TSENS5_8X26_POINT2_MASK) >> - TSENS5_8X26_POINT2_SHIFT; - tsens6_point2 = (calib_data[5] & TSENS6_8X26_POINT2_MASK) >> - TSENS6_8X26_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 595; - calib_tsens_point1_data[1] = 625; - calib_tsens_point1_data[2] = 553; - calib_tsens_point1_data[3] = 578; - calib_tsens_point1_data[4] = 505; - calib_tsens_point1_data[5] = 509; - calib_tsens_point1_data[6] = 507; - goto compute_intercept_slope; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - calib_tsens_point1_data[0] = - ((((tsens_base0_data) + tsens0_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[1] = - ((((tsens_base0_data) + tsens1_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[2] = - ((((tsens_base0_data) + tsens2_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[3] = - ((((tsens_base0_data) + tsens3_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[4] = - ((((tsens_base0_data) + tsens4_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[5] = - ((((tsens_base0_data) + tsens5_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[6] = - ((((tsens_base0_data) + tsens6_point1) << 2) | - TSENS_BIT_APPEND); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - (((tsens_base1_data + tsens0_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[1] = - (((tsens_base1_data + tsens1_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[2] = - (((tsens_base1_data + tsens2_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[3] = - (((tsens_base1_data + tsens3_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[4] = - (((tsens_base1_data + tsens4_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[5] = - (((tsens_base1_data + tsens5_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[6] = - (((tsens_base1_data + tsens6_point2) << 2) | - TSENS_BIT_APPEND); - } - -compute_intercept_slope: - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_8974_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base1_data = 0, tsens0_point1 = 0, tsens1_point1 = 0; - int tsens2_point1 = 0, tsens3_point1 = 0, tsens4_point1 = 0; - int tsens5_point1 = 0, tsens6_point1 = 0, tsens7_point1 = 0; - int tsens8_point1 = 0, tsens9_point1 = 0, tsens10_point1 = 0; - int tsens0_point2 = 0, tsens1_point2 = 0, tsens2_point2 = 0; - int tsens3_point2 = 0, tsens4_point2 = 0, tsens5_point2 = 0; - int tsens6_point2 = 0, tsens7_point2 = 0, tsens8_point2 = 0; - int tsens9_point2 = 0, tsens10_point2 = 0; - int tsens_base2_data = 0, tsens_calibration_mode = 0, temp = 0; - uint32_t calib_data[6], calib_redun_sel, calib_data_backup[4]; - uint32_t calib_tsens_point1_data[11], calib_tsens_point2_data[11]; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_redun_sel = readl_relaxed( - TSENS_EEPROM_REDUNDANCY_SEL(tmdev->tsens_calib_addr)); - calib_redun_sel = calib_redun_sel & TSENS_QFPROM_BACKUP_REDUN_SEL; - calib_redun_sel >>= TSENS_QFPROM_BACKUP_REDUN_SHIFT; - pr_debug("calib_redun_sel:%x\n", calib_redun_sel); - - for (i = 0; i < TSENS_MAIN_CALIB_ADDR_RANGE; i++) { - calib_data[i] = readl_relaxed( - (TSENS_EEPROM(tmdev->tsens_calib_addr)) - + (i * TSENS_SN_ADDR_OFFSET)); - pr_debug("calib raw data row%d:0x%x\n", i, calib_data[i]); - } - - if (calib_redun_sel == TSENS_QFPROM_BACKUP_SEL) { - tsens_calibration_mode = (calib_data[4] & TSENS_CAL_SEL_0_1) - >> TSENS_CAL_SEL_SHIFT; - temp = (calib_data[5] & TSENS_CAL_SEL_2) - >> TSENS_CAL_SEL_SHIFT_2; - tsens_calibration_mode |= temp; - pr_debug("backup calib mode:%x\n", calib_redun_sel); - - for (i = 0; i < TSENS_BACKUP_CALIB_ADDR_RANGE; i++) - calib_data_backup[i] = readl_relaxed( - (TSENS_EEPROM_BACKUP_REGION( - tmdev->tsens_calib_addr)) - + (i * TSENS_SN_ADDR_OFFSET)); - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB) - || (tsens_calibration_mode == - TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == - TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base1_data = (calib_data_backup[0] & - TSENS_BASE1_MASK); - tsens0_point1 = (calib_data_backup[0] & - TSENS0_POINT1_MASK) >> - TSENS0_POINT1_SHIFT; - tsens1_point1 = (calib_data_backup[0] & - TSENS1_POINT1_MASK) >> TSENS1_POINT1_SHIFT; - tsens2_point1 = (calib_data_backup[0] & - TSENS2_POINT1_MASK) >> TSENS2_POINT1_SHIFT; - tsens3_point1 = (calib_data_backup[0] & - TSENS3_POINT1_MASK) >> TSENS3_POINT1_SHIFT; - tsens4_point1 = (calib_data_backup[1] & - TSENS4_POINT1_MASK); - tsens5_point1 = (calib_data_backup[1] & - TSENS5_POINT1_MASK) >> TSENS5_POINT1_SHIFT; - tsens6_point1 = (calib_data_backup[1] & - TSENS6_POINT1_MASK) >> TSENS6_POINT1_SHIFT; - tsens7_point1 = (calib_data_backup[1] & - TSENS7_POINT1_MASK) >> TSENS7_POINT1_SHIFT; - tsens8_point1 = (calib_data_backup[2] & - TSENS8_POINT1_MASK_BACKUP) >> - TSENS8_POINT1_SHIFT; - tsens9_point1 = (calib_data_backup[2] & - TSENS9_POINT1_MASK_BACKUP) >> - TSENS9_POINT1_BACKUP_SHIFT; - tsens10_point1 = (calib_data_backup[2] & - TSENS10_POINT1_MASK_BACKUP) >> - TSENS10_POINT1_BACKUP_SHIFT; - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base2_data = (calib_data_backup[2] & - TSENS_BASE2_BACKUP_MASK) >> - TSENS_POINT2_BASE_BACKUP_SHIFT; - tsens0_point2 = (calib_data_backup[2] & - TSENS0_POINT2_BACKUP_MASK) >> - TSENS0_POINT2_BACKUP_SHIFT; - tsens1_point2 = (calib_data_backup[3] & - TSENS1_POINT2_BACKUP_MASK); - tsens2_point2 = (calib_data_backup[3] & - TSENS2_POINT2_BACKUP_MASK) >> - TSENS2_POINT2_BACKUP_SHIFT; - tsens3_point2 = (calib_data_backup[3] & - TSENS3_POINT2_BACKUP_MASK) >> - TSENS3_POINT2_BACKUP_SHIFT; - tsens4_point2 = (calib_data_backup[3] & - TSENS4_POINT2_BACKUP_MASK) >> - TSENS4_POINT2_BACKUP_SHIFT; - tsens5_point2 = (calib_data[4] & - TSENS5_POINT2_BACKUP_MASK) >> - TSENS5_POINT2_BACKUP_SHIFT; - tsens6_point2 = (calib_data[5] & - TSENS6_POINT2_BACKUP_MASK); - tsens7_point2 = (calib_data[5] & - TSENS7_POINT2_BACKUP_MASK) >> - TSENS7_POINT2_BACKUP_SHIFT; - tsens8_point2 = (calib_data[5] & - TSENS8_POINT2_BACKUP_MASK) >> - TSENS8_POINT2_BACKUP_SHIFT; - tsens9_point2 = (calib_data[5] & - TSENS9_POINT2_BACKUP_MASK) >> - TSENS9_POINT2_BACKUP_SHIFT; - tsens10_point2 = (calib_data[5] & - TSENS10_POINT2_BACKUP_MASK) - >> TSENS10_POINT2_BACKUP_SHIFT; - } - } else { - tsens_calibration_mode = (calib_data[1] & TSENS_CAL_SEL_0_1) - >> TSENS_CAL_SEL_SHIFT; - temp = (calib_data[3] & TSENS_CAL_SEL_2) - >> TSENS_CAL_SEL_SHIFT_2; - tsens_calibration_mode |= temp; - pr_debug("calib mode scheme:%x\n", tsens_calibration_mode); - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB) || - (tsens_calibration_mode == - TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - tsens_base1_data = (calib_data[0] & TSENS_BASE1_MASK); - tsens0_point1 = (calib_data[0] & TSENS0_POINT1_MASK) >> - TSENS0_POINT1_SHIFT; - tsens1_point1 = (calib_data[0] & TSENS1_POINT1_MASK) >> - TSENS1_POINT1_SHIFT; - tsens2_point1 = (calib_data[0] & TSENS2_POINT1_MASK) >> - TSENS2_POINT1_SHIFT; - tsens3_point1 = (calib_data[0] & TSENS3_POINT1_MASK) >> - TSENS3_POINT1_SHIFT; - tsens4_point1 = (calib_data[1] & TSENS4_POINT1_MASK); - tsens5_point1 = (calib_data[1] & TSENS5_POINT1_MASK) >> - TSENS5_POINT1_SHIFT; - tsens6_point1 = (calib_data[1] & TSENS6_POINT1_MASK) >> - TSENS6_POINT1_SHIFT; - tsens7_point1 = (calib_data[1] & TSENS7_POINT1_MASK) >> - TSENS7_POINT1_SHIFT; - tsens8_point1 = (calib_data[1] & TSENS8_POINT1_MASK) >> - TSENS8_POINT1_SHIFT; - tsens9_point1 = (calib_data[2] & TSENS9_POINT1_MASK); - tsens10_point1 = (calib_data[2] & TSENS10_POINT1_MASK) - >> TSENS10_POINT1_SHIFT; - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base2_data = (calib_data[2] & TSENS_BASE2_MASK) >> - TSENS_POINT2_BASE_SHIFT; - tsens0_point2 = (calib_data[2] & TSENS0_POINT2_MASK) >> - TSENS0_POINT2_SHIFT; - tsens1_point2 = (calib_data[2] & TSENS1_POINT2_MASK) >> - TSENS1_POINT2_SHIFT; - tsens2_point2 = (calib_data[3] & TSENS2_POINT2_MASK); - tsens3_point2 = (calib_data[3] & TSENS3_POINT2_MASK) >> - TSENS3_POINT2_SHIFT; - tsens4_point2 = (calib_data[3] & TSENS4_POINT2_MASK) >> - TSENS4_POINT2_SHIFT; - tsens5_point2 = (calib_data[3] & TSENS5_POINT2_MASK) >> - TSENS5_POINT2_SHIFT; - tsens6_point2 = (calib_data[3] & TSENS6_POINT2_MASK) >> - TSENS6_POINT2_SHIFT; - tsens7_point2 = (calib_data[4] & TSENS7_POINT2_MASK); - tsens8_point2 = (calib_data[4] & TSENS8_POINT2_MASK) >> - TSENS8_POINT2_SHIFT; - tsens9_point2 = (calib_data[4] & TSENS9_POINT2_MASK) >> - TSENS9_POINT2_SHIFT; - tsens10_point2 = (calib_data[4] & TSENS10_POINT2_MASK) - >> TSENS10_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 502; - calib_tsens_point1_data[1] = 509; - calib_tsens_point1_data[2] = 503; - calib_tsens_point1_data[3] = 509; - calib_tsens_point1_data[4] = 505; - calib_tsens_point1_data[5] = 509; - calib_tsens_point1_data[6] = 507; - calib_tsens_point1_data[7] = 510; - calib_tsens_point1_data[8] = 508; - calib_tsens_point1_data[9] = 509; - calib_tsens_point1_data[10] = 508; - goto compute_intercept_slope; - } - } - - if (tsens_calibration_mode == TSENS_ONE_POINT_CALIB) { - calib_tsens_point1_data[0] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens0_point1; - calib_tsens_point1_data[1] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens1_point1; - calib_tsens_point1_data[2] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens2_point1; - calib_tsens_point1_data[3] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens3_point1; - calib_tsens_point1_data[4] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens4_point1; - calib_tsens_point1_data[5] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens5_point1; - calib_tsens_point1_data[6] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens6_point1; - calib_tsens_point1_data[7] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens7_point1; - calib_tsens_point1_data[8] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens8_point1; - calib_tsens_point1_data[9] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens9_point1; - calib_tsens_point1_data[10] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens10_point1; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - pr_debug("one point calibration calculation\n"); - calib_tsens_point1_data[0] = - ((((tsens_base1_data) + tsens0_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[1] = - ((((tsens_base1_data) + tsens1_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[2] = - ((((tsens_base1_data) + tsens2_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[3] = - ((((tsens_base1_data) + tsens3_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[4] = - ((((tsens_base1_data) + tsens4_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[5] = - ((((tsens_base1_data) + tsens5_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[6] = - ((((tsens_base1_data) + tsens6_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[7] = - ((((tsens_base1_data) + tsens7_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[8] = - ((((tsens_base1_data) + tsens8_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[9] = - ((((tsens_base1_data) + tsens9_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[10] = - ((((tsens_base1_data) + tsens10_point1) << 2) | - TSENS_BIT_APPEND); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - (((tsens_base2_data + tsens0_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[1] = - (((tsens_base2_data + tsens1_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[2] = - (((tsens_base2_data + tsens2_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[3] = - (((tsens_base2_data + tsens3_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[4] = - (((tsens_base2_data + tsens4_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[5] = - (((tsens_base2_data + tsens5_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[6] = - (((tsens_base2_data + tsens6_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[7] = - (((tsens_base2_data + tsens7_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[8] = - (((tsens_base2_data + tsens8_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[9] = - (((tsens_base2_data + tsens9_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[10] = - (((tsens_base2_data + tsens10_point2) << 2) | - TSENS_BIT_APPEND); - } - -compute_intercept_slope: - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d\n", tmdev->sensor[i].offset); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_9900_sensors(struct tsens_tm_device *tmdev) -{ - int i, tsens_base1_data = 0, tsens0_point1 = 0, tsens1_point1 = 0; - int tsens2_point1 = 0, tsens3_point1 = 0, tsens4_point1 = 0; - int tsens5_point1 = 0, tsens6_point1 = 0, tsens0_point2 = 0; - int tsens1_point2 = 0, tsens2_point2 = 0, tsens3_point2 = 0; - int tsens4_point2 = 0, tsens5_point2 = 0, tsens6_point2 = 0; - int tsens_base2_data = 0, tsens_calibration_mode = 0; - uint32_t calib_data[4], calib_redun_sel, calib_data_backup[4]; - uint32_t calib_tsens_point1_data[7], calib_tsens_point2_data[7]; - - if (tmdev->calibration_less_mode) - goto calibration_less_mode; - - calib_redun_sel = readl_relaxed( - TSENS_9900_EEPROM_REDUNDANCY_SEL(tmdev->tsens_calib_addr)); - calib_redun_sel = calib_redun_sel & TSENS_QFPROM_BACKUP_9900_REDUN_SEL; - calib_redun_sel >>= TSENS_QFPROM_BACKUP_9900_REDUN_SHIFT; - pr_debug("calib_redun_sel:%x\n", calib_redun_sel); - - if (calib_redun_sel == TSENS_QFPROM_BACKUP_SEL) { - for (i = 0; i < TSENS_9900_CALIB_ADDR_RANGE; i++) { - calib_data_backup[i] = readl_relaxed( - (TSENS_9900_EEPROM_BACKUP_REGION( - tmdev->tsens_calib_addr)) - + (i * TSENS_SN_ADDR_OFFSET)); - pr_debug("backup calib raw data row%d:0x%x\n", - i, calib_data_backup[i]); - } - - tsens_calibration_mode = (calib_data_backup[0] & - TSENS_9900_TSENS_CAL_SEL) >> TSENS_9900_CAL_SEL_SHIFT; - pr_debug("backup calib mode:%x\n", tsens_calibration_mode); - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB) - || (tsens_calibration_mode == - TSENS_TWO_POINT_CALIB) || - (tsens_calibration_mode == - TSENS_ONE_POINT_CALIB_OPTION_2)) { - tsens_base1_data = (calib_data_backup[0] & - TSENS_9900_BASE1_MASK); - tsens0_point1 = (calib_data_backup[0] & - TSENS0_9900_POINT1_MASK) >> - TSENS0_9900_POINT1_SHIFT; - tsens1_point1 = (calib_data_backup[1] & - TSENS1_9900_POINT1_MASK); - tsens2_point1 = (calib_data_backup[1] & - TSENS2_9900_POINT1_MASK) >> - TSENS2_9900_POINT1_SHIFT; - tsens3_point1 = (calib_data_backup[1] & - TSENS3_9900_POINT1_MASK) >> - TSENS3_9900_POINT1_SHIFT; - tsens4_point1 = (calib_data_backup[2] & - TSENS4_9900_POINT1_MASK) >> - TSENS4_9900_POINT1_SHIFT; - tsens5_point1 = (calib_data_backup[2] & - TSENS5_9900_POINT1_MASK) >> - TSENS5_9900_POINT1_SHIFT; - tsens6_point1 = (calib_data_backup[3] & - TSENS6_9900_POINT1_MASK); - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base2_data = (calib_data_backup[0] & - TSENS_9900_BASE2_MASK) >> - TSENS_9900_BASE2_SHIFT; - tsens0_point2 = (calib_data_backup[0] & - TSENS0_9900_POINT2_MASK) >> - TSENS0_9900_POINT2_SHIFT; - tsens1_point2 = (calib_data_backup[1] & - TSENS1_9900_POINT2_MASK)>> - TSENS1_9900_POINT2_SHIFT; - tsens2_point2 = (calib_data_backup[1] & - TSENS2_9900_POINT2_MASK) >> - TSENS2_9900_POINT2_SHIFT; - tsens3_point2 = (calib_data_backup[2] & - TSENS3_9900_POINT2_MASK); - tsens4_point2 = (calib_data_backup[2] & - TSENS4_9900_POINT2_MASK) >> - TSENS4_9900_POINT2_SHIFT; - tsens5_point2 = (calib_data_backup[2] & - TSENS5_9900_POINT2_MASK) >> - TSENS5_9900_POINT2_SHIFT; - tsens6_point2 = (calib_data_backup[3] & - TSENS6_9900_POINT2_MASK) >> - TSENS6_9900_POINT2_SHIFT; - } - } else { - for (i = 0; i < TSENS_9900_CALIB_ADDR_RANGE; i++) { - calib_data[i] = readl_relaxed( - (TSENS_9900_EEPROM(tmdev->tsens_calib_addr)) - + (i * TSENS_SN_ADDR_OFFSET)); - pr_debug("calib raw data row%d:0x%x\n", i , calib_data[i]); - } - - tsens_calibration_mode = (calib_data[0] & - TSENS_9900_TSENS_CAL_SEL) >> TSENS_9900_CAL_SEL_SHIFT; - pr_debug("calib mode:%x\n", tsens_calibration_mode); - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB) || - (tsens_calibration_mode == - TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - tsens_base1_data = (calib_data[0] & - TSENS_9900_BASE1_MASK); - tsens0_point1 = (calib_data[0] & - TSENS0_9900_POINT1_MASK) >> - TSENS0_9900_POINT1_SHIFT; - tsens1_point1 = (calib_data[1] & - TSENS1_9900_POINT1_MASK); - tsens2_point1 = (calib_data[1] & - TSENS2_9900_POINT1_MASK) >> - TSENS2_9900_POINT1_SHIFT; - tsens3_point1 = (calib_data[1] & - TSENS3_9900_POINT1_MASK) >> - TSENS3_9900_POINT1_SHIFT; - tsens4_point1 = (calib_data[2] & - TSENS4_9900_POINT1_MASK) >> - TSENS4_9900_POINT1_SHIFT; - tsens5_point1 = (calib_data[2] & - TSENS5_9900_POINT1_MASK) >> - TSENS5_9900_POINT1_SHIFT; - tsens6_point1 = (calib_data[3] & - TSENS6_9900_POINT1_MASK); - } else - goto calibration_less_mode; - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base2_data = (calib_data[0] & - TSENS_9900_BASE2_MASK) >> - TSENS_9900_BASE2_SHIFT; - tsens0_point2 = (calib_data[0] & - TSENS0_9900_POINT2_MASK) >> - TSENS0_9900_POINT2_SHIFT; - tsens1_point2 = (calib_data[1] & - TSENS1_9900_POINT2_MASK) >> - TSENS1_9900_POINT2_SHIFT; - tsens2_point2 = (calib_data[1] & - TSENS2_9900_POINT2_MASK)>> - TSENS2_9900_POINT2_SHIFT; - tsens3_point2 = (calib_data[2] & - TSENS3_9900_POINT2_MASK); - tsens4_point2 = (calib_data[2] & - TSENS4_9900_POINT2_MASK) >> - TSENS4_9900_POINT2_SHIFT; - tsens5_point2 = (calib_data[2] & - TSENS5_9900_POINT2_MASK) >> - TSENS5_9900_POINT2_SHIFT; - tsens6_point2 = (calib_data[3] & - TSENS6_9900_POINT2_MASK) >> - TSENS6_9900_POINT2_SHIFT; - } - - if (tsens_calibration_mode == 0) { -calibration_less_mode: - pr_debug("TSENS is calibrationless mode\n"); - for (i = 0; i < tmdev->tsens_num_sensor; i++) - calib_tsens_point2_data[i] = 780; - calib_tsens_point1_data[0] = 502; - calib_tsens_point1_data[1] = 509; - calib_tsens_point1_data[2] = 503; - calib_tsens_point1_data[3] = 509; - calib_tsens_point1_data[4] = 505; - calib_tsens_point1_data[5] = 509; - calib_tsens_point1_data[6] = 507; - goto compute_intercept_slope; - } - } - - if (tsens_calibration_mode == TSENS_ONE_POINT_CALIB) { - calib_tsens_point1_data[0] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens0_point1; - calib_tsens_point1_data[1] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens1_point1; - calib_tsens_point1_data[2] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens2_point1; - calib_tsens_point1_data[3] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens3_point1; - calib_tsens_point1_data[4] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens4_point1; - calib_tsens_point1_data[5] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens5_point1; - calib_tsens_point1_data[6] = - (((tsens_base1_data) << 2) | TSENS_BIT_APPEND) - + tsens6_point1; - } - - if ((tsens_calibration_mode == TSENS_ONE_POINT_CALIB_OPTION_2) || - (tsens_calibration_mode == TSENS_TWO_POINT_CALIB)) { - pr_debug("one point calibration calculation\n"); - calib_tsens_point1_data[0] = - ((((tsens_base1_data) + tsens0_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[1] = - ((((tsens_base1_data) + tsens1_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[2] = - ((((tsens_base1_data) + tsens2_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[3] = - ((((tsens_base1_data) + tsens3_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[4] = - ((((tsens_base1_data) + tsens4_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[5] = - ((((tsens_base1_data) + tsens5_point1) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point1_data[6] = - ((((tsens_base1_data) + tsens6_point1) << 2) | - TSENS_BIT_APPEND); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - pr_debug("two point calibration calculation\n"); - calib_tsens_point2_data[0] = - (((tsens_base2_data + tsens0_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[1] = - (((tsens_base2_data + tsens1_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[2] = - (((tsens_base2_data + tsens2_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[3] = - (((tsens_base2_data + tsens3_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[4] = - (((tsens_base2_data + tsens4_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[5] = - (((tsens_base2_data + tsens5_point2) << 2) | - TSENS_BIT_APPEND); - calib_tsens_point2_data[6] = - (((tsens_base2_data + tsens6_point2) << 2) | - TSENS_BIT_APPEND); - } - -compute_intercept_slope: - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0; - - tmdev->sensor[i].calib_data_point2 = calib_tsens_point2_data[i]; - tmdev->sensor[i].calib_data_point1 = calib_tsens_point1_data[i]; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d\n", tmdev->sensor[i].offset); - tmdev->prev_reading_avail = false; - } - - return 0; -} - -static int tsens_calib_msmzirc_sensors(struct tsens_tm_device *tmdev) -{ - int i = 0, tsens_base0_data = 0, tsens_base1_data = 0; - int tsens0_point = 0, tsens1_point = 0, tsens2_point = 0; - int tsens3_point = 0, tsens4_point = 0; - int tsens_calibration_mode = 0; - uint32_t calib_data[2] = {0, 0}; - uint32_t calib_tsens_point_data[5]; - - if (!tmdev->calibration_less_mode) { - calib_data[0] = readl_relaxed( - TSENS_EEPROM(tmdev->tsens_calib_addr)); - calib_data[1] = readl_relaxed( - (TSENS_EEPROM(tmdev->tsens_calib_addr) + 0x4)); - - tsens_calibration_mode = - (calib_data[1] & TSENS_ZIRC_CAL_SEL) >> - TSENS_ZIRC_CAL_SEL_SHIFT; - pr_debug("calib mode is %d\n", tsens_calibration_mode); - } - - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - tsens_base0_data = (calib_data[0] & TSENS_BASE0_ZIRC_MASK); - tsens_base1_data = (calib_data[0] & TSENS_BASE1_ZIRC_MASK) >> - TSENS_BASE1_ZIRC_SHIFT; - tsens0_point = (calib_data[0] & TSENS0_OFFSET_ZIRC_MASK) >> - TSENS0_OFFSET_ZIRC_SHIFT; - tsens1_point = (calib_data[0] & TSENS1_OFFSET_ZIRC_MASK) >> - TSENS1_OFFSET_ZIRC_SHIFT; - tsens2_point = (calib_data[0] & TSENS2_OFFSET_ZIRC_MASK) >> - TSENS2_OFFSET_ZIRC_SHIFT; - tsens3_point = (calib_data[1] & TSENS3_OFFSET_ZIRC_MASK); - tsens4_point = (calib_data[1] & TSENS4_OFFSET_ZIRC_MASK) >> - TSENS4_OFFSET_ZIRC_SHIFT; - calib_tsens_point_data[0] = tsens0_point; - calib_tsens_point_data[1] = tsens1_point; - calib_tsens_point_data[2] = tsens2_point; - calib_tsens_point_data[3] = tsens3_point; - calib_tsens_point_data[4] = tsens4_point; - } else { - if (tsens_calibration_mode == 0) { - pr_debug("TSENS is calibrationless mode\n"); - calib_tsens_point_data[0] = 532; - calib_tsens_point_data[1] = 532; - calib_tsens_point_data[2] = 532; - calib_tsens_point_data[3] = 532; - calib_tsens_point_data[4] = 532; - } - } - - for (i = 0; i < tmdev->tsens_num_sensor; i++) { - int32_t num = 0, den = 0, adc_code_of_tempx = 0; - - tmdev->sensor[i].calib_data_point2 = tsens_base1_data; - tmdev->sensor[i].calib_data_point1 = tsens_base0_data; - pr_debug("sensor:%d - calib_data_point1:0x%x, calib_data_point2:0x%x\n", - i, tmdev->sensor[i].calib_data_point1, - tmdev->sensor[i].calib_data_point2); - if (tsens_calibration_mode == TSENS_TWO_POINT_CALIB) { - /* slope (m) = adc_code2 - adc_code1 (y2 - y1)/ - * temp_120_degc - temp_30_degc (x2 - x1) */ - num = tmdev->sensor[i].calib_data_point2 - - tmdev->sensor[i].calib_data_point1; - num *= tmdev->tsens_factor; - den = TSENS_CAL_DEGC_POINT2 - TSENS_CAL_DEGC_POINT1; - tmdev->sensor[i].slope_mul_tsens_factor = num/den; - } - adc_code_of_tempx = - tsens_base0_data + calib_tsens_point_data[i]; - pr_debug("offset_adc_code_of_tempx:0x%x\n", - adc_code_of_tempx); - tmdev->sensor[i].offset = (adc_code_of_tempx * - tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 * - tmdev->sensor[i].slope_mul_tsens_factor); - pr_debug("offset:%d and slope:%d\n", tmdev->sensor[i].offset, - tmdev->sensor[i].slope_mul_tsens_factor); - tmdev->prev_reading_avail = false; - } - - return 0; -} -static int tsens_calib_sensors(struct tsens_tm_device *tmdev) -{ - int rc = 0; - - pr_debug("%s\n", __func__); - - if (!tmdev) - return -ENODEV; - - if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8974) - rc = tsens_calib_8974_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8X26) - rc = tsens_calib_8x26_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8X10) - rc = tsens_calib_8x10_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_9900) - rc = tsens_calib_9900_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_9630) - rc = tsens_calib_9630_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8916) - rc = tsens_calib_8916_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8939) - rc = tsens_calib_8939_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8994) - rc = tsens_calib_8994_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSM8909) - rc = tsens_calib_msm8909_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSMZIRC) - rc = tsens_calib_msmzirc_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_8992) - rc = tsens_calib_8992_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSM8952) - rc = tsens_calib_msm8952_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MDM9607) - rc = tsens_calib_mdm9607_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSM8937) - rc = tsens_calib_msm8937_msmgold_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_MSMGOLD) - rc = tsens_calib_msm8937_msmgold_sensors(tmdev); - else if (tmdev->calib_mode == TSENS_CALIB_FUSE_MAP_NONE) { - pr_debug("Fuse map info not required\n"); - rc = 0; - } else { - pr_err("TSENS Calib fuse not found\n"); - rc = -ENODEV; - } - - return rc; -} - static int get_device_tree_data(struct platform_device *pdev, struct tsens_tm_device *tmdev) { @@ -5436,7 +2180,6 @@ static int get_device_tree_data(struct platform_device *pdev, "qcom,calibration-less-mode"); tmdev->tsens_local_init = of_property_read_bool(of_node, "qcom,tsens-local-init"); - tmdev->calib_mode = (u32)(uintptr_t) id->data; sensor_id = devm_kzalloc(&pdev->dev, tsens_num_sensors * sizeof(u32), GFP_KERNEL); @@ -5498,41 +2241,27 @@ static int get_device_tree_data(struct platform_device *pdev, tmdev->wd_bark_val = wd_bark; } - if (!strcmp(id->compatible, "qcom,mdm9630-tsens") || - (!strcmp(id->compatible, "qcom,msmzirc-tsens")) || - (!strcmp(id->compatible, "qcom,msm8994-tsens")) || - (!strcmp(id->compatible, "qcom,msm8992-tsens"))) - tmdev->tsens_type = TSENS_TYPE2; - else if (!strcmp(id->compatible, "qcom,msm8996-tsens") || + if (!strcmp(id->compatible, "qcom,msm8996-tsens") || (!strcmp(id->compatible, "qcom,msm8998-tsens"))) tmdev->tsens_type = TSENS_TYPE3; else if (!strcmp(id->compatible, "qcom,msmtitanium-tsens") || - (!strcmp(id->compatible, "qcom,sdm660-tsens") || - (!strcmp(id->compatible, "qcom,sdm630-tsens") || - (!strcmp(id->compatible, "qcom,msmhamster-tsens"))))) { + (!strcmp(id->compatible, "qcom,sdm660-tsens")) || + (!strcmp(id->compatible, "qcom,sdm630-tsens")) || + (!strcmp(id->compatible, "qcom,msmhamster-tsens"))) { tmdev->tsens_type = TSENS_TYPE3; tsens_poll_check = 0; - } else if (!strcmp(id->compatible, "qcom,msm8952-tsens") || - (!strcmp(id->compatible, "qcom,msmgold-tsens")) || - (!strcmp(id->compatible, "qcom,msm8937-tsens"))) - tmdev->tsens_type = TSENS_TYPE4; - else + } else tmdev->tsens_type = TSENS_TYPE0; tmdev->tsens_valid_status_check = of_property_read_bool(of_node, "qcom,valid-status-check"); if (!tmdev->tsens_valid_status_check) { - if (!strcmp(id->compatible, "qcom,msm8994-tsens") || - (!strcmp(id->compatible, "qcom,msmzirc-tsens")) || - (!strcmp(id->compatible, "qcom,msm8992-tsens")) || - (!strcmp(id->compatible, "qcom,msm8996-tsens")) || - (!strcmp(id->compatible, "qcom,msm8952-tsens")) || - (!strcmp(id->compatible, "qcom,msm8937-tsens")) || + if (!strcmp(id->compatible, "qcom,msm8996-tsens") || (!strcmp(id->compatible, "qcom,msmtitanium-tsens")) || (!strcmp(id->compatible, "qcom,msm8998-tsens")) || - (!strcmp(id->compatible, "qcom,sdm660-tsens") || - (!strcmp(id->compatible, "qcom,sdm630-tsens") || - (!strcmp(id->compatible, "qcom,msmhamster-tsens"))))) + (!strcmp(id->compatible, "qcom,sdm660-tsens")) || + (!strcmp(id->compatible, "qcom,sdm630-tsens")) || + (!strcmp(id->compatible, "qcom,msmhamster-tsens"))) tmdev->tsens_valid_status_check = true; } @@ -5547,9 +2276,9 @@ static int get_device_tree_data(struct platform_device *pdev, if (!strcmp(id->compatible, "qcom,msm8996-tsens") || (!strcmp(id->compatible, "qcom,msm8998-tsens")) || (!strcmp(id->compatible, "qcom,msmhamster-tsens")) || - (!strcmp(id->compatible, "qcom,sdm660-tsens") || - (!strcmp(id->compatible, "qcom,sdm630-tsens") || - (!strcmp(id->compatible, "qcom,msmtitanium-tsens"))))) { + (!strcmp(id->compatible, "qcom,sdm660-tsens")) || + (!strcmp(id->compatible, "qcom,sdm630-tsens")) || + (!strcmp(id->compatible, "qcom,msmtitanium-tsens"))) { tmdev->tsens_critical_irq = platform_get_irq_byname(pdev, "tsens-critical"); @@ -5690,12 +2419,6 @@ static int tsens_tm_probe(struct platform_device *pdev) goto fail; } - rc = tsens_calib_sensors(tmdev); - if (rc < 0) { - pr_err("Calibration failed\n"); - goto fail; - } - rc = tsens_hw_init(tmdev); if (rc) return rc; diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h index 23a5ef2af249..0cdf91da920c 100644 --- a/drivers/video/fbdev/msm/mdss.h +++ b/drivers/video/fbdev/msm/mdss.h @@ -164,6 +164,7 @@ enum mdss_hw_quirk { MDSS_QUIRK_SRC_SPLIT_ALWAYS, MDSS_QUIRK_MMSS_GDSC_COLLAPSE, MDSS_QUIRK_MDP_CLK_SET_RATE, + MDSS_QUIRK_HDR_SUPPORT_ENABLED, MDSS_QUIRK_MAX, }; diff --git a/drivers/video/fbdev/msm/mdss_compat_utils.c b/drivers/video/fbdev/msm/mdss_compat_utils.c index 9f1a24431de9..f499cdfd85ef 100644 --- a/drivers/video/fbdev/msm/mdss_compat_utils.c +++ b/drivers/video/fbdev/msm/mdss_compat_utils.c @@ -225,6 +225,7 @@ static struct mdp_input_layer *__create_layer_list( layer->transp_mask = layer32->transp_mask; layer->bg_color = layer32->bg_color; layer->blend_op = layer32->blend_op; + layer->color_space = layer32->color_space; layer->src_rect = layer32->src_rect; layer->dst_rect = layer32->dst_rect; layer->buffer = layer32->buffer; @@ -312,6 +313,8 @@ static int __compat_atomic_commit(struct fb_info *info, unsigned int cmd, ret = -EFAULT; return ret; } + + memset(&commit, 0, sizeof(struct mdp_layer_commit)); __copy_atomic_commit_struct(&commit, &commit32); if (commit32.commit_v1.output_layer) { diff --git a/drivers/video/fbdev/msm/mdss_compat_utils.h b/drivers/video/fbdev/msm/mdss_compat_utils.h index d6f85a493315..626792925cb6 100644 --- a/drivers/video/fbdev/msm/mdss_compat_utils.h +++ b/drivers/video/fbdev/msm/mdss_compat_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -15,6 +15,15 @@ #ifndef MDSS_COMPAT_UTILS_H #define MDSS_COMPAT_UTILS_H +/* + * To allow proper structure padding for 64bit/32bit target + */ +#ifdef __LP64 +#define MDP_LAYER_COMMIT_V1_PAD 3 +#else +#define MDP_LAYER_COMMIT_V1_PAD 4 +#endif + struct mdp_buf_sync32 { u32 flags; u32 acq_fen_fd_cnt; @@ -498,7 +507,8 @@ struct mdp_input_layer32 { uint16_t z_order; uint32_t transp_mask; uint32_t bg_color; - enum mdss_mdp_blend_op blend_op; + enum mdss_mdp_blend_op blend_op; + enum mdp_color_space color_space; struct mdp_rect src_rect; struct mdp_rect dst_rect; compat_caddr_t scale; @@ -512,7 +522,8 @@ struct mdp_output_layer32 { uint32_t flags; uint32_t writeback_ndx; struct mdp_layer_buffer buffer; - uint32_t reserved[6]; + enum mdp_color_space color_space; + uint32_t reserved[5]; }; struct mdp_layer_commit_v1_32 { uint32_t flags; @@ -523,7 +534,10 @@ struct mdp_layer_commit_v1_32 { uint32_t input_layer_cnt; compat_caddr_t output_layer; int retire_fence; - uint32_t reserved[6]; + compat_caddr_t dest_scaler; + uint32_t dest_scaler_cnt; + compat_caddr_t frc_info; + uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; }; struct mdp_layer_commit32 { diff --git a/drivers/video/fbdev/msm/mdss_debug.c b/drivers/video/fbdev/msm/mdss_debug.c index 9ab88d4a7a52..8d06edf01d1d 100644 --- a/drivers/video/fbdev/msm/mdss_debug.c +++ b/drivers/video/fbdev/msm/mdss_debug.c @@ -169,7 +169,8 @@ static ssize_t panel_debug_base_reg_write(struct file *file, break; } /* End of a hex value in given string */ - bufp[NEXT_VALUE_OFFSET - 1] = 0; + if ((bufp + NEXT_VALUE_OFFSET - 1) < (buf + count)) + bufp[NEXT_VALUE_OFFSET - 1] = 0; } if (len < PANEL_CMD_MIN_TX_COUNT) { pr_err("wrong input reg len\n"); diff --git a/drivers/video/fbdev/msm/mdss_dsi_panel.c b/drivers/video/fbdev/msm/mdss_dsi_panel.c index 79e74df12988..29288f0bca74 100644 --- a/drivers/video/fbdev/msm/mdss_dsi_panel.c +++ b/drivers/video/fbdev/msm/mdss_dsi_panel.c @@ -2366,9 +2366,9 @@ static int mdss_dsi_panel_timing_from_dt(struct device_node *np, phy_timings_present = true; } - data = of_get_property(np, "qcom,mdss-dsi-panel-timings-8996", &len); + data = of_get_property(np, "qcom,mdss-dsi-panel-timings-phy-v2", &len); if ((!data) || (len != 40)) { - pr_debug("%s:%d, Unable to read 8996 Phy lane timing settings", + pr_debug("%s:%d, Unable to read phy-v2 lane timing settings", __func__, __LINE__); } else { for (i = 0; i < len; i++) diff --git a/drivers/video/fbdev/msm/mdss_fb.c b/drivers/video/fbdev/msm/mdss_fb.c index 36c48040d8ce..082986b0ade7 100644 --- a/drivers/video/fbdev/msm/mdss_fb.c +++ b/drivers/video/fbdev/msm/mdss_fb.c @@ -76,6 +76,12 @@ #define BLANK_FLAG_ULP FB_BLANK_NORMAL #endif +/* + * Time period for fps calulation in micro seconds. + * Default value is set to 1 sec. + */ +#define MDP_TIME_PERIOD_CALC_FPS_US 1000000 + static struct fb_info *fbi_list[MAX_FBI_LIST]; static int fbi_list_index; @@ -502,6 +508,22 @@ static void __mdss_fb_idle_notify_work(struct work_struct *work) mfd->idle_state = MDSS_FB_IDLE; } + +static ssize_t mdss_fb_get_fps_info(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fb_info *fbi = dev_get_drvdata(dev); + struct msm_fb_data_type *mfd = fbi->par; + unsigned int fps_int, fps_float; + + if (mfd->panel_power_state != MDSS_PANEL_POWER_ON) + mfd->fps_info.measured_fps = 0; + fps_int = (unsigned int) mfd->fps_info.measured_fps; + fps_float = do_div(fps_int, 10); + return scnprintf(buf, PAGE_SIZE, "%d.%d\n", fps_int, fps_float); + +} + static ssize_t mdss_fb_get_idle_time(struct device *dev, struct device_attribute *attr, char *buf) { @@ -815,6 +837,8 @@ static DEVICE_ATTR(msm_fb_panel_status, S_IRUGO | S_IWUSR, mdss_fb_get_panel_status, mdss_fb_force_panel_dead); static DEVICE_ATTR(msm_fb_dfps_mode, S_IRUGO | S_IWUSR, mdss_fb_get_dfps_mode, mdss_fb_change_dfps_mode); +static DEVICE_ATTR(measured_fps, S_IRUGO | S_IWUSR | S_IWGRP, + mdss_fb_get_fps_info, NULL); static struct attribute *mdss_fb_attrs[] = { &dev_attr_msm_fb_type.attr, &dev_attr_msm_fb_split.attr, @@ -826,6 +850,7 @@ static struct attribute *mdss_fb_attrs[] = { &dev_attr_msm_fb_thermal_level.attr, &dev_attr_msm_fb_panel_status.attr, &dev_attr_msm_fb_dfps_mode.attr, + &dev_attr_measured_fps.attr, NULL, }; @@ -1196,6 +1221,7 @@ static int mdss_fb_probe(struct platform_device *pdev) return rc; } } + mdss_fb_init_fps_info(mfd); rc = pm_runtime_set_active(mfd->fbi->dev); if (rc < 0) @@ -2829,7 +2855,7 @@ static int __mdss_fb_wait_for_fence_sub(struct msm_sync_pt_data *sync_pt_data, wait_ms); pr_warn("%s: sync_fence_wait timed out! ", - sync_pt_data->fence_name); + fences[i]->name); pr_cont("Waiting %ld.%ld more seconds\n", (wait_ms/MSEC_PER_SEC), (wait_ms%MSEC_PER_SEC)); @@ -2981,6 +3007,7 @@ static int __mdss_fb_sync_buf_done_callback(struct notifier_block *p, case MDP_NOTIFY_FRAME_DONE: pr_debug("%s: frame done\n", sync_pt_data->fence_name); mdss_fb_signal_timeline(sync_pt_data); + mdss_fb_calc_fps(mfd); break; case MDP_NOTIFY_FRAME_CFG_DONE: if (sync_pt_data->async_wait_fences) @@ -5035,3 +5062,34 @@ void mdss_fb_report_panel_dead(struct msm_fb_data_type *mfd) KOBJ_CHANGE, envp); pr_err("Panel has gone bad, sending uevent - %s\n", envp[0]); } + + +/* + * mdss_fb_calc_fps() - Calculates fps value. + * @mfd : frame buffer structure associated with fb device. + * + * This function is called at frame done. It counts the number + * of frames done for every 1 sec. Stores the value in measured_fps. + * measured_fps value is 10 times the calculated fps value. + * For example, measured_fps= 594 for calculated fps of 59.4 + */ +void mdss_fb_calc_fps(struct msm_fb_data_type *mfd) +{ + ktime_t current_time_us; + u64 fps, diff_us; + + current_time_us = ktime_get(); + diff_us = (u64)ktime_us_delta(current_time_us, + mfd->fps_info.last_sampled_time_us); + mfd->fps_info.frame_count++; + + if (diff_us >= MDP_TIME_PERIOD_CALC_FPS_US) { + fps = ((u64)mfd->fps_info.frame_count) * 10000000; + do_div(fps, diff_us); + mfd->fps_info.measured_fps = (unsigned int)fps; + pr_debug(" MDP_FPS for fb%d is %d.%d\n", + mfd->index, (unsigned int)fps/10, (unsigned int)fps%10); + mfd->fps_info.last_sampled_time_us = current_time_us; + mfd->fps_info.frame_count = 0; + } +} diff --git a/drivers/video/fbdev/msm/mdss_fb.h b/drivers/video/fbdev/msm/mdss_fb.h index 2eb6c6456f29..1487c4e7f6e2 100644 --- a/drivers/video/fbdev/msm/mdss_fb.h +++ b/drivers/video/fbdev/msm/mdss_fb.h @@ -253,6 +253,12 @@ struct msm_fb_backup_type { bool atomic_commit; }; +struct msm_fb_fps_info { + u32 frame_count; + ktime_t last_sampled_time_us; + u32 measured_fps; +}; + struct msm_fb_data_type { u32 key; u32 index; @@ -271,6 +277,7 @@ struct msm_fb_data_type { int idle_time; u32 idle_state; + struct msm_fb_fps_info fps_info; struct delayed_work idle_notify_work; bool atomic_commit_pending; @@ -426,6 +433,10 @@ static inline bool mdss_fb_is_hdmi_primary(struct msm_fb_data_type *mfd) (mfd->panel_info->type == DTV_PANEL)); } +static inline void mdss_fb_init_fps_info(struct msm_fb_data_type *mfd) +{ + memset(&mfd->fps_info, 0, sizeof(mfd->fps_info)); +} int mdss_fb_get_phys_info(dma_addr_t *start, unsigned long *len, int fb_num); void mdss_fb_set_backlight(struct msm_fb_data_type *mfd, u32 bkl_lvl); void mdss_fb_update_backlight(struct msm_fb_data_type *mfd); @@ -449,4 +460,5 @@ u32 mdss_fb_get_mode_switch(struct msm_fb_data_type *mfd); void mdss_fb_report_panel_dead(struct msm_fb_data_type *mfd); void mdss_panelinfo_to_fb_var(struct mdss_panel_info *pinfo, struct fb_var_screeninfo *var); +void mdss_fb_calc_fps(struct msm_fb_data_type *mfd); #endif /* MDSS_FB_H */ diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index d9cfd2360ab3..7ed4b5404868 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -2146,6 +2146,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) mdata->has_wb_ubwc = true; set_bit(MDSS_CAPS_10_BIT_SUPPORTED, mdata->mdss_caps_map); set_bit(MDSS_CAPS_SEC_DETACH_SMMU, mdata->mdss_caps_map); + mdss_set_quirk(mdata, MDSS_QUIRK_HDR_SUPPORT_ENABLED); break; default: mdata->max_target_zorder = 4; /* excluding base layer */ @@ -2416,13 +2417,16 @@ static int mdss_mdp_get_pan_cfg(struct mdss_panel_cfg *pan_cfg) char *t = NULL; char pan_intf_str[MDSS_MAX_PANEL_LEN]; int rc, i, panel_len; - char pan_name[MDSS_MAX_PANEL_LEN]; + char pan_name[MDSS_MAX_PANEL_LEN] = {'\0'}; if (!pan_cfg) return -EINVAL; if (mdss_mdp_panel[0] == '0') { + pr_debug("panel name is not set\n"); pan_cfg->lk_cfg = false; + pan_cfg->pan_intf = MDSS_PANEL_INTF_INVALID; + return -EINVAL; } else if (mdss_mdp_panel[0] == '1') { pan_cfg->lk_cfg = true; } else { @@ -2432,7 +2436,7 @@ static int mdss_mdp_get_pan_cfg(struct mdss_panel_cfg *pan_cfg) return -EINVAL; } - /* skip lk cfg and delimiter; ex: "0:" */ + /* skip lk cfg and delimiter; ex: "1:" */ strlcpy(pan_name, &mdss_mdp_panel[2], MDSS_MAX_PANEL_LEN); t = strnstr(pan_name, ":", MDSS_MAX_PANEL_LEN); if (!t) { @@ -2689,6 +2693,8 @@ ssize_t mdss_mdp_show_capabilities(struct device *dev, SPRINT(" concurrent_writeback"); if (test_bit(MDSS_CAPS_AVR_SUPPORTED, mdata->mdss_caps_map)) SPRINT(" avr"); + if (mdss_has_quirk(mdata, MDSS_QUIRK_HDR_SUPPORT_ENABLED)) + SPRINT(" hdr"); SPRINT("\n"); #undef SPRINT @@ -2814,7 +2820,10 @@ static int mdss_mdp_probe(struct platform_device *pdev) struct resource *res; int rc; struct mdss_data_type *mdata; - bool display_on = false; + uint32_t intf_sel = 0; + uint32_t split_display = 0; + int num_of_display_on = 0; + int i = 0; if (!pdev->dev.of_node) { pr_err("MDP driver only supports device tree probe\n"); @@ -2941,7 +2950,6 @@ static int mdss_mdp_probe(struct platform_device *pdev) */ mdss_mdp_footswitch_ctrl_splash(true); mdss_hw_rev_init(mdata); - display_on = true; /*populate hw iomem base info from device tree*/ rc = mdss_mdp_parse_dt(pdev); @@ -3010,10 +3018,34 @@ static int mdss_mdp_probe(struct platform_device *pdev) * clk/regulator votes else turn off clk/regulators because purpose * here is to get mdp_rev. */ - display_on = (bool)readl_relaxed(mdata->mdp_base + + intf_sel = readl_relaxed(mdata->mdp_base + MDSS_MDP_REG_DISP_INTF_SEL); - if (!display_on) + split_display = readl_relaxed(mdata->mdp_base + + MDSS_MDP_REG_SPLIT_DISPLAY_EN); + if (intf_sel != 0) { + for (i = 0; i < 4; i++) + num_of_display_on += ((intf_sel >> i*8) & 0x000000FF); + + /* + * For split display enabled - DSI0, DSI1 interfaces are + * considered as single display. So decrement + * 'num_of_display_on' by 1 + */ + if (split_display) + num_of_display_on--; + } + if (!num_of_display_on) { mdss_mdp_footswitch_ctrl_splash(false); + } else { + mdata->handoff_pending = true; + /* + * If multiple displays are enabled in LK, ctrl_splash off will + * be called multiple times during splash_cleanup. Need to + * enable it symmetrically + */ + for (i = 1; i < num_of_display_on; i++) + mdss_mdp_footswitch_ctrl_splash(true); + } mdp_intr_cb = kcalloc(ARRAY_SIZE(mdp_irq_map), sizeof(struct intr_callback), GFP_KERNEL); @@ -3055,12 +3087,13 @@ static int mdss_mdp_probe(struct platform_device *pdev) mdss_res->mdp_irq_export[0] = MDSS_MDP_INTR_WB_0_DONE | MDSS_MDP_INTR_WB_1_DONE; - pr_info("mdss version = 0x%x, bootloader display is %s\n", - mdata->mdp_rev, display_on ? "on" : "off"); + pr_info("mdss version = 0x%x, bootloader display is %s, num %d, intf_sel=0x%08x\n", + mdata->mdp_rev, num_of_display_on ? "on" : "off", + num_of_display_on, intf_sel); probe_done: if (IS_ERR_VALUE(rc)) { - if (display_on) + if (!num_of_display_on) mdss_mdp_footswitch_ctrl_splash(false); if (mdata->regulator_notif_register) @@ -4800,6 +4833,14 @@ static void apply_dynamic_ot_limit(u32 *ot_lim, else *ot_lim = 6; break; + case MDSS_MDP_HW_REV_320: + if ((res <= RES_1080p) && (params->frame_rate <= 30)) + *ot_lim = 2; + else if ((res <= RES_1080p) && (params->frame_rate <= 60)) + *ot_lim = 6; + else if ((res <= RES_UHD) && (params->frame_rate <= 30)) + *ot_lim = 16; + break; default: if (res <= RES_1080p) { *ot_lim = 2; diff --git a/drivers/video/fbdev/msm/mdss_mdp.h b/drivers/video/fbdev/msm/mdss_mdp.h index ab2a7184aa45..d3d332d780d5 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.h +++ b/drivers/video/fbdev/msm/mdss_mdp.h @@ -424,6 +424,7 @@ struct mdss_mdp_ctl_intfs_ops { struct mdss_mdp_cwb { struct mutex queue_lock; struct list_head data_queue; + struct list_head cleanup_queue; int valid; u32 wb_idx; struct mdp_output_layer layer; @@ -1322,12 +1323,21 @@ static inline int mdss_mdp_get_wb_ctl_support(struct mdss_data_type *mdata, bool rotator_session) { /* - * Initial control paths are used for primary and external - * interfaces and remaining control paths are used for WB - * interfaces. + * Any control path can be routed to any of the hardware datapaths. + * But there is a HW restriction for 3D Mux block. As the 3D Mux + * settings in the CTL registers are double buffered, if an interface + * uses it and disconnects, then the subsequent interface which gets + * connected should use the same control path in order to clear the + * 3D MUX settings. + * To handle this restriction, we are allowing WB also, to loop through + * all the avialable control paths, so that it can reuse the control + * path left by the external interface, thereby clearing the 3D Mux + * settings. + * The initial control paths can be used by Primary, External and WB. + * The rotator can use the remaining available control paths. */ return rotator_session ? (mdata->nctl - mdata->nmixers_wb) : - (mdata->nctl - mdata->nwb); + MDSS_MDP_CTL0; } static inline bool mdss_mdp_is_nrt_vbif_client(struct mdss_data_type *mdata, diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c index 5744f7d037b4..5246e5d1166c 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c +++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c @@ -703,6 +703,7 @@ int mdss_mdp_get_panel_params(struct mdss_mdp_pipe *pipe, *v_total = mixer->height; *xres = mixer->width; *h_total = mixer->width; + *fps = DEFAULT_FRAME_RATE; } return 0; @@ -714,7 +715,8 @@ int mdss_mdp_get_pipe_overlap_bw(struct mdss_mdp_pipe *pipe, struct mdss_data_type *mdata = mdss_mdp_get_mdata(); struct mdss_mdp_mixer *mixer = pipe->mixer_left; struct mdss_rect src, dst; - u32 v_total, fps, h_total, xres, src_h; + u32 v_total = 0, h_total = 0, xres = 0, src_h = 0; + u32 fps = DEFAULT_FRAME_RATE; *quota = 0; *quota_nocr = 0; @@ -3563,6 +3565,11 @@ int mdss_mdp_cwb_setup(struct mdss_mdp_ctl *ctl) goto cwb_setup_fail; } + /* Add to cleanup list */ + mutex_lock(&cwb->queue_lock); + list_add_tail(&cwb_data->next, &mdp5_data->cwb.cleanup_queue); + mutex_unlock(&cwb->queue_lock); + memset(&wb_args, 0, sizeof(wb_args)); wb_args.data = &cwb_data->data; diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_cmd.c b/drivers/video/fbdev/msm/mdss_mdp_intf_cmd.c index 6d5927cf3cdc..c249cac87b8a 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_intf_cmd.c +++ b/drivers/video/fbdev/msm/mdss_mdp_intf_cmd.c @@ -35,6 +35,8 @@ static DEFINE_MUTEX(cmd_clk_mtx); +static DEFINE_MUTEX(cmd_off_mtx); + enum mdss_mdp_cmd_autorefresh_state { MDP_AUTOREFRESH_OFF, MDP_AUTOREFRESH_ON_REQUESTED, @@ -1351,7 +1353,7 @@ static int mdss_mdp_cmd_add_lineptr_handler(struct mdss_mdp_ctl *ctl, unsigned long flags; int ret = 0; - mutex_lock(&ctl->offlock); + mutex_lock(&cmd_off_mtx); ctx = (struct mdss_mdp_cmd_ctx *) ctl->intf_ctx[MASTER_CTX]; if (!ctx || !ctl->is_master) { ret = -EINVAL; @@ -1379,7 +1381,7 @@ static int mdss_mdp_cmd_add_lineptr_handler(struct mdss_mdp_ctl *ctl, if (ctl->mfd->split_mode == MDP_DUAL_LM_DUAL_DISPLAY) mutex_unlock(&cmd_clk_mtx); done: - mutex_unlock(&ctl->offlock); + mutex_unlock(&cmd_off_mtx); return ret; } @@ -1820,7 +1822,7 @@ static int mdss_mdp_cmd_add_vsync_handler(struct mdss_mdp_ctl *ctl, bool enable_rdptr = false; int ret = 0; - mutex_lock(&ctl->offlock); + mutex_lock(&cmd_off_mtx); ctx = (struct mdss_mdp_cmd_ctx *) ctl->intf_ctx[MASTER_CTX]; if (!ctx) { pr_err("%s: invalid ctx\n", __func__); @@ -1857,7 +1859,7 @@ static int mdss_mdp_cmd_add_vsync_handler(struct mdss_mdp_ctl *ctl, } done: - mutex_unlock(&ctl->offlock); + mutex_unlock(&cmd_off_mtx); return ret; } @@ -3190,6 +3192,7 @@ int mdss_mdp_cmd_stop(struct mdss_mdp_ctl *ctl, int panel_power_state) MDSS_XLOG(ctx->panel_power_state, panel_power_state); mutex_lock(&ctl->offlock); + mutex_lock(&cmd_off_mtx); if (mdss_panel_is_power_off(panel_power_state)) { /* Transition to display off */ send_panel_events = true; @@ -3309,6 +3312,7 @@ end: } MDSS_XLOG(ctl->num, atomic_read(&ctx->koff_cnt), XLOG_FUNC_EXIT); + mutex_unlock(&cmd_off_mtx); mutex_unlock(&ctl->offlock); pr_debug("%s:-\n", __func__); diff --git a/drivers/video/fbdev/msm/mdss_mdp_overlay.c b/drivers/video/fbdev/msm/mdss_mdp_overlay.c index 4ae91cf8e81d..8f48956680fc 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_overlay.c +++ b/drivers/video/fbdev/msm/mdss_mdp_overlay.c @@ -3228,6 +3228,7 @@ int mdss_mdp_dfps_update_params(struct msm_fb_data_type *mfd, pr_warn("Unsupported FPS. Configuring to max_fps = %d\n", pdata->panel_info.max_fps); dfps = pdata->panel_info.max_fps; + dfps_data->fps = dfps; } dfps_update_panel_params(pdata, dfps_data); @@ -5872,10 +5873,24 @@ __vsync_retire_get_fence(struct msm_sync_pt_data *sync_pt_data) static void __cwb_wq_handler(struct work_struct *cwb_work) { struct mdss_mdp_cwb *cwb = NULL; + struct mdss_mdp_wb_data *cwb_data = NULL; cwb = container_of(cwb_work, struct mdss_mdp_cwb, cwb_work); blocking_notifier_call_chain(&cwb->notifier_head, MDP_NOTIFY_FRAME_DONE, NULL); + + /* free the buffer from cleanup queue */ + mutex_lock(&cwb->queue_lock); + cwb_data = list_first_entry_or_null(&cwb->cleanup_queue, + struct mdss_mdp_wb_data, next); + __list_del_entry(&cwb_data->next); + mutex_unlock(&cwb->queue_lock); + if (cwb_data == NULL) { + pr_err("no output buffer for cwb cleanup\n"); + return; + } + mdss_mdp_data_free(&cwb_data->data, true, DMA_FROM_DEVICE); + kfree(cwb_data); } static int __vsync_set_vsync_handler(struct msm_fb_data_type *mfd) @@ -6106,6 +6121,7 @@ int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd) mutex_init(&mdp5_data->cwb.queue_lock); mutex_init(&mdp5_data->cwb.cwb_sync_pt_data.sync_mutex); INIT_LIST_HEAD(&mdp5_data->cwb.data_queue); + INIT_LIST_HEAD(&mdp5_data->cwb.cleanup_queue); snprintf(timeline_name, sizeof(timeline_name), "cwb%d", mfd->index); mdp5_data->cwb.cwb_sync_pt_data.fence_name = "cwb-fence"; diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c index 917e6889124d..30dd3c856c7f 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pp.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c @@ -1655,10 +1655,6 @@ int mdss_mdp_scaler_lut_cfg(struct mdp_scale_data_v2 *scaler, } } - if (scaler->lut_flag & SCALER_LUT_SWAP) - writel_relaxed(BIT(0), MDSS_MDP_REG_SCALER_COEF_LUT_CTRL + - offset); - return 0; } @@ -1795,6 +1791,10 @@ int mdss_mdp_qseed3_setup(struct mdp_scale_data_v2 *scaler, __func__); return -EINVAL; } + if (scaler->lut_flag & SCALER_LUT_SWAP) + writel_relaxed(BIT(0), + MDSS_MDP_REG_SCALER_COEF_LUT_CTRL + + offset); } writel_relaxed(phase_init, diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp_cache_config.c b/drivers/video/fbdev/msm/mdss_mdp_pp_cache_config.c index e51cf44c2de2..017a2f10dfbc 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pp_cache_config.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pp_cache_config.c @@ -1394,7 +1394,6 @@ exit: ret = -EFAULT; kfree(cfg_payload); cfg_payload = NULL; - goto exit; } pp_info->igc_cfg.cfg_payload = cfg_payload; return ret; diff --git a/drivers/video/fbdev/msm/mdss_rotator.c b/drivers/video/fbdev/msm/mdss_rotator.c index 8612d60deeca..d001f148b443 100644 --- a/drivers/video/fbdev/msm/mdss_rotator.c +++ b/drivers/video/fbdev/msm/mdss_rotator.c @@ -2386,6 +2386,31 @@ handle_request32_err: return ret; } +static unsigned int __do_compat_ioctl_rot(unsigned int cmd32) +{ + unsigned int cmd; + + switch (cmd32) { + case MDSS_ROTATION_REQUEST32: + cmd = MDSS_ROTATION_REQUEST; + break; + case MDSS_ROTATION_OPEN32: + cmd = MDSS_ROTATION_OPEN; + break; + case MDSS_ROTATION_CLOSE32: + cmd = MDSS_ROTATION_CLOSE; + break; + case MDSS_ROTATION_CONFIG32: + cmd = MDSS_ROTATION_CONFIG; + break; + default: + cmd = cmd32; + break; + } + + return cmd; +} + static long mdss_rotator_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -2408,6 +2433,8 @@ static long mdss_rotator_compat_ioctl(struct file *file, unsigned int cmd, return -EINVAL; } + cmd = __do_compat_ioctl_rot(cmd); + switch (cmd) { case MDSS_ROTATION_REQUEST: ATRACE_BEGIN("rotator_request32"); diff --git a/drivers/video/fbdev/msm/mdss_rotator_internal.h b/drivers/video/fbdev/msm/mdss_rotator_internal.h index dae5f5cb117e..30d460abf5b7 100644 --- a/drivers/video/fbdev/msm/mdss_rotator_internal.h +++ b/drivers/video/fbdev/msm/mdss_rotator_internal.h @@ -187,6 +187,23 @@ struct mdss_rot_mgr { }; #ifdef CONFIG_COMPAT + +/* open a rotation session */ +#define MDSS_ROTATION_OPEN32 \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 1, compat_caddr_t) + +/* change the rotation session configuration */ +#define MDSS_ROTATION_CONFIG32 \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 2, compat_caddr_t) + +/* queue the rotation request */ +#define MDSS_ROTATION_REQUEST32 \ + _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 3, compat_caddr_t) + +/* close a rotation session with the specified rotation session ID */ +#define MDSS_ROTATION_CLOSE32 \ + _IOW(MDSS_ROTATOR_IOCTL_MAGIC, 4, unsigned int) + struct mdp_rotation_request32 { uint32_t version; uint32_t flags; diff --git a/drivers/video/fbdev/msm/mdss_smmu.c b/drivers/video/fbdev/msm/mdss_smmu.c index 2239791fdad0..a08eec8e1606 100644 --- a/drivers/video/fbdev/msm/mdss_smmu.c +++ b/drivers/video/fbdev/msm/mdss_smmu.c @@ -177,7 +177,6 @@ static int mdss_smmu_attach_v2(struct mdss_data_type *mdata) struct mdss_smmu_client *mdss_smmu; int i, rc = 0; - mutex_lock(&mdp_iommu_lock); for (i = 0; i < MDSS_IOMMU_MAX_DOMAIN; i++) { if (!mdss_smmu_is_valid_domain_type(mdata, i)) continue; @@ -211,11 +210,9 @@ static int mdss_smmu_attach_v2(struct mdss_data_type *mdata) } } else { pr_err("iommu device not attached for domain[%d]\n", i); - mutex_unlock(&mdp_iommu_lock); return -ENODEV; } } - mutex_unlock(&mdp_iommu_lock); return 0; @@ -228,7 +225,6 @@ err: mdss_smmu->domain_attached = false; } } - mutex_unlock(&mdp_iommu_lock); return rc; } @@ -245,7 +241,6 @@ static int mdss_smmu_detach_v2(struct mdss_data_type *mdata) struct mdss_smmu_client *mdss_smmu; int i; - mutex_lock(&mdp_iommu_lock); for (i = 0; i < MDSS_IOMMU_MAX_DOMAIN; i++) { if (!mdss_smmu_is_valid_domain_type(mdata, i)) continue; @@ -270,7 +265,6 @@ static int mdss_smmu_detach_v2(struct mdss_data_type *mdata) } } } - mutex_unlock(&mdp_iommu_lock); return 0; } diff --git a/drivers/video/fbdev/msm/mdss_smmu.h b/drivers/video/fbdev/msm/mdss_smmu.h index f7e6e275c16a..73b978b72f0e 100644 --- a/drivers/video/fbdev/msm/mdss_smmu.h +++ b/drivers/video/fbdev/msm/mdss_smmu.h @@ -150,18 +150,26 @@ static inline int mdss_smmu_attach(struct mdss_data_type *mdata) { int rc; + mdata->mdss_util->iommu_lock(); MDSS_XLOG(mdata->iommu_attached); + if (mdata->iommu_attached) { pr_debug("mdp iommu already attached\n"); - return 0; + rc = 0; + goto end; } - if (!mdata->smmu_ops.smmu_attach) - return -ENOSYS; + if (!mdata->smmu_ops.smmu_attach) { + rc = -ENODEV; + goto end; + } rc = mdata->smmu_ops.smmu_attach(mdata); if (!rc) mdata->iommu_attached = true; + +end: + mdata->mdss_util->iommu_unlock(); return rc; } @@ -169,19 +177,26 @@ static inline int mdss_smmu_detach(struct mdss_data_type *mdata) { int rc; + mdata->mdss_util->iommu_lock(); MDSS_XLOG(mdata->iommu_attached); if (!mdata->iommu_attached) { pr_debug("mdp iommu already dettached\n"); - return 0; + rc = 0; + goto end; } - if (!mdata->smmu_ops.smmu_detach) - return -ENOSYS; + if (!mdata->smmu_ops.smmu_detach) { + rc = -ENODEV; + goto end; + } rc = mdata->smmu_ops.smmu_detach(mdata); if (!rc) mdata->iommu_attached = false; + +end: + mdata->mdss_util->iommu_unlock(); return rc; } @@ -247,7 +262,7 @@ static inline void mdss_smmu_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t phys, dma_addr_t iova, int domain) { struct mdss_data_type *mdata = mdss_mdp_get_mdata(); - if (mdata->smmu_ops.smmu_dma_free_coherent) + if (mdata && mdata->smmu_ops.smmu_dma_free_coherent) mdata->smmu_ops.smmu_dma_free_coherent(dev, size, cpu_addr, phys, iova, domain); } diff --git a/include/linux/qpnp/power-on.h b/include/linux/input/qpnp-power-on.h index da8f5a8622dd..a2624ab57826 100644 --- a/include/linux/qpnp/power-on.h +++ b/include/linux/input/qpnp-power-on.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -60,7 +60,7 @@ enum pon_restart_reason { PON_RESTART_REASON_KEYS_CLEAR = 0x06, }; -#ifdef CONFIG_QPNP_POWER_ON +#ifdef CONFIG_INPUT_QPNP_POWER_ON int qpnp_pon_system_pwr_off(enum pon_power_off_type type); int qpnp_pon_is_warm_reset(void); int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable); diff --git a/include/trace/events/msm_cam.h b/include/trace/events/msm_cam.h new file mode 100644 index 000000000000..b52845407ef0 --- /dev/null +++ b/include/trace/events/msm_cam.h @@ -0,0 +1,136 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM msm_cam + +#if !defined(_TRACE_MSM_VFE_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_MSM_VFE_H + +#include "msm_isp.h" +#include <linux/types.h> +#include <linux/tracepoint.h> + +#define STRING_LEN 80 + + +TRACE_EVENT(msm_cam_string, + TP_PROTO(const char *str), + TP_ARGS(str), + TP_STRUCT__entry( + __array(char, str, STRING_LEN) + ), + TP_fast_assign( + strlcpy(__entry->str, str, STRING_LEN); + ), + TP_printk("msm_cam: %s", __entry->str) +); + +TRACE_EVENT(msm_cam_tasklet_debug_dump, + TP_PROTO(struct msm_vfe_irq_debug_info tasklet_state), + TP_ARGS(tasklet_state), + TP_STRUCT__entry( + __field(unsigned int, vfe_id) + __field(unsigned int, core_id) + __field(unsigned int, irq_status0) + __field(unsigned int, irq_status1) + __field(unsigned int, ping_pong_status) + __field(long, tv_sec) + __field(long, tv_usec) + ), + TP_fast_assign( + __entry->vfe_id = tasklet_state.vfe_id; + __entry->irq_status0 = + tasklet_state.irq_status0[tasklet_state.vfe_id]; + __entry->irq_status1 = + tasklet_state.irq_status1[tasklet_state.vfe_id]; + __entry->core_id = tasklet_state.core_id; + __entry->ping_pong_status = + tasklet_state.ping_pong_status[tasklet_state.vfe_id]; + __entry->tv_sec = + tasklet_state.ts.buf_time.tv_sec; + __entry->tv_usec = + tasklet_state.ts.buf_time.tv_usec; + ), + TP_printk("vfe_id %d, core %d, irq_st0 0x%x, irq_st1 0x%x\n" + "pi_po_st 0x%x, time %ld:%ld", + __entry->vfe_id, + __entry->core_id, + __entry->irq_status0, + __entry->irq_status1, + __entry->ping_pong_status, + __entry->tv_sec, + __entry->tv_usec + ) +); + +TRACE_EVENT(msm_cam_ping_pong_debug_dump, + TP_PROTO(struct msm_vfe_irq_debug_info ping_pong_state), + TP_ARGS(ping_pong_state), + TP_STRUCT__entry( + __field(unsigned int, curr_vfe_id) + __field(unsigned int, curr_irq_status0) + __field(unsigned int, curr_irq_status1) + __field(unsigned int, curr_ping_pong_status) + __field(unsigned int, othr_vfe_id) + __field(unsigned int, othr_irq_status0) + __field(unsigned int, othr_irq_status1) + __field(unsigned int, othr_ping_pong_status) + __field(long, othr_tv_sec) + __field(long, othr_tv_usec) + __field(unsigned int, core_id) + ), + TP_fast_assign( + __entry->curr_vfe_id = + ping_pong_state.vfe_id; + __entry->curr_irq_status0 = + ping_pong_state.irq_status0[ping_pong_state.vfe_id]; + __entry->curr_irq_status1 = + ping_pong_state.irq_status1[ping_pong_state.vfe_id]; + __entry->curr_ping_pong_status = + ping_pong_state. + ping_pong_status[ping_pong_state.vfe_id]; + __entry->othr_vfe_id = + !ping_pong_state.vfe_id; + __entry->othr_irq_status0 = + ping_pong_state.irq_status0[!ping_pong_state.vfe_id]; + __entry->othr_irq_status1 = + ping_pong_state.irq_status1[!ping_pong_state.vfe_id]; + __entry->othr_ping_pong_status = + ping_pong_state. + ping_pong_status[!ping_pong_state.vfe_id]; + __entry->othr_tv_sec = + ping_pong_state.ts.buf_time.tv_sec; + __entry->othr_tv_usec = + ping_pong_state.ts.buf_time.tv_usec; + __entry->core_id = ping_pong_state.core_id; + ), + TP_printk("vfe_id %d, irq_st0 0x%x, irq_st1 0x%x, pi_po_st 0x%x\n" + "other vfe_id %d, irq_st0 0x%x, irq_st1 0x%x\n" + "pi_po_st 0x%x, time %ld:%ld core %d", + __entry->curr_vfe_id, + __entry->curr_irq_status0, + __entry->curr_irq_status1, + __entry->curr_ping_pong_status, + __entry->othr_vfe_id, + __entry->othr_irq_status0, + __entry->othr_irq_status1, + __entry->othr_ping_pong_status, + __entry->othr_tv_sec, + __entry->othr_tv_usec, + __entry->core_id + ) +); + +#endif /* _MSM_CAM_TRACE_H */ +/* This part must be outside protection */ +#include <trace/define_trace.h> diff --git a/kernel/sched/hmp.c b/kernel/sched/hmp.c index ab5587309760..d3547391b937 100644 --- a/kernel/sched/hmp.c +++ b/kernel/sched/hmp.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -774,13 +774,6 @@ __read_mostly unsigned int sched_ravg_window = MIN_SCHED_RAVG_WINDOW; /* Temporarily disable window-stats activity on all cpus */ unsigned int __read_mostly sched_disable_window_stats; -/* - * Major task runtime. If a task runs for more than sched_major_task_runtime - * in a window, it's considered to be generating majority of workload - * for this window. Prediction could be adjusted for such tasks. - */ -__read_mostly unsigned int sched_major_task_runtime = 10000000; - static unsigned int sync_cpu; struct related_thread_group *related_thread_groups[MAX_NUM_CGROUP_COLOC_ID]; @@ -1015,9 +1008,6 @@ void set_hmp_defaults(void) update_up_down_migrate(); - sched_major_task_runtime = - mult_frac(sched_ravg_window, MAJOR_TASK_PCT, 100); - sched_init_task_load_windows = div64_u64((u64)sysctl_sched_init_task_load_pct * (u64)sched_ravg_window, 100); @@ -1961,8 +1951,6 @@ scale_load_to_freq(u64 load, unsigned int src_freq, unsigned int dst_freq) return div64_u64(load * (u64)src_freq, (u64)dst_freq); } -#define HEAVY_TASK_SKIP 2 -#define HEAVY_TASK_SKIP_LIMIT 4 /* * get_pred_busy - calculate predicted demand for a task on runqueue * @@ -1990,7 +1978,7 @@ static u32 get_pred_busy(struct rq *rq, struct task_struct *p, u32 *hist = p->ravg.sum_history; u32 dmin, dmax; u64 cur_freq_runtime = 0; - int first = NUM_BUSY_BUCKETS, final, skip_to; + int first = NUM_BUSY_BUCKETS, final; u32 ret = runtime; /* skip prediction for new tasks due to lack of history */ @@ -2010,36 +1998,6 @@ static u32 get_pred_busy(struct rq *rq, struct task_struct *p, /* compute the bucket for prediction */ final = first; - if (first < HEAVY_TASK_SKIP_LIMIT) { - /* compute runtime at current CPU frequency */ - cur_freq_runtime = mult_frac(runtime, max_possible_efficiency, - rq->cluster->efficiency); - cur_freq_runtime = scale_load_to_freq(cur_freq_runtime, - max_possible_freq, rq->cluster->cur_freq); - /* - * if the task runs for majority of the window, try to - * pick higher buckets. - */ - if (cur_freq_runtime >= sched_major_task_runtime) { - int next = NUM_BUSY_BUCKETS; - /* - * if there is a higher bucket that's consistently - * hit, don't jump beyond that. - */ - for (i = start + 1; i <= HEAVY_TASK_SKIP_LIMIT && - i < NUM_BUSY_BUCKETS; i++) { - if (buckets[i] > CONSISTENT_THRES) { - next = i; - break; - } - } - skip_to = min(next, start + HEAVY_TASK_SKIP); - /* don't jump beyond HEAVY_TASK_SKIP_LIMIT */ - skip_to = min(HEAVY_TASK_SKIP_LIMIT, skip_to); - /* don't go below first non-empty bucket, if any */ - final = max(first, skip_to); - } - } /* determine demand range for the predicted bucket */ if (final < 2) { @@ -3908,7 +3866,7 @@ static void transfer_busy_time(struct rq *rq, struct related_thread_group *grp, struct migration_sum_data d; int migrate_type; int cpu = cpu_of(rq); - bool new_task = is_new_task(p); + bool new_task; int i; if (!sched_freq_aggregate) @@ -3918,6 +3876,7 @@ static void transfer_busy_time(struct rq *rq, struct related_thread_group *grp, update_task_ravg(rq->curr, rq, TASK_UPDATE, wallclock, 0); update_task_ravg(p, rq, TASK_UPDATE, wallclock, 0); + new_task = is_new_task(p); /* cpu_time protected by related_thread_group_lock, grp->lock rq_lock */ cpu_time = _group_cpu_time(grp, cpu); @@ -4012,6 +3971,8 @@ static void transfer_busy_time(struct rq *rq, struct related_thread_group *grp, BUG_ON((s64)*src_curr_runnable_sum < 0); BUG_ON((s64)*src_prev_runnable_sum < 0); + BUG_ON((s64)*src_nt_curr_runnable_sum < 0); + BUG_ON((s64)*src_nt_prev_runnable_sum < 0); } static inline struct group_cpu_time * diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index afccfd0878b1..a3abdf19ff4c 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -1066,7 +1066,6 @@ static inline void sched_ttwu_pending(void) { } #define FREQ_REPORT_CPU_LOAD 1 #define FREQ_REPORT_TOP_TASK 2 -#define MAJOR_TASK_PCT 85 #define SCHED_UPMIGRATE_MIN_NICE 15 #define EXITING_TASK_MARKER 0xdeaddead @@ -1093,7 +1092,6 @@ extern unsigned int sched_init_task_load_windows; extern unsigned int up_down_migrate_scale_factor; extern unsigned int sysctl_sched_restrict_cluster_spill; extern unsigned int sched_pred_alert_load; -extern unsigned int sched_major_task_runtime; extern struct sched_cluster init_cluster; extern unsigned int __read_mostly sched_short_sleep_task_threshold; extern unsigned int __read_mostly sched_long_cpu_selection_threshold; diff --git a/net/netfilter/xt_IDLETIMER.c b/net/netfilter/xt_IDLETIMER.c index 456a1dff692d..80b32de1d99c 100644 --- a/net/netfilter/xt_IDLETIMER.c +++ b/net/netfilter/xt_IDLETIMER.c @@ -49,6 +49,7 @@ #include <linux/notifier.h> #include <net/net_namespace.h> #include <net/sock.h> +#include <net/inet_sock.h> struct idletimer_tg_attr { struct attribute attr; @@ -360,8 +361,8 @@ static void reset_timer(const struct idletimer_tg_info *info, /* Stores the uid resposible for waking up the radio */ if (skb && (skb->sk)) { - timer->uid = from_kuid_munged(current_user_ns(), - sock_i_uid(skb->sk)); + timer->uid = from_kuid_munged + (current_user_ns(), sock_i_uid(skb_to_full_sk(skb))); } /* checks if there is a pending inactive notification*/ diff --git a/sound/soc/codecs/wcd934x/wcd934x.c b/sound/soc/codecs/wcd934x/wcd934x.c index 9b45db43ffb2..f2850d5e5ed3 100644 --- a/sound/soc/codecs/wcd934x/wcd934x.c +++ b/sound/soc/codecs/wcd934x/wcd934x.c @@ -5204,6 +5204,14 @@ static int tavil_mad_input_put(struct snd_kcontrol *kcontrol, tavil_mad_input = ucontrol->value.integer.value[0]; + if (tavil_mad_input >= sizeof(tavil_conn_mad_text)/ + sizeof(tavil_conn_mad_text[0])) { + dev_err(codec->dev, + "%s: tavil_mad_input = %d out of bounds\n", + __func__, tavil_mad_input); + return -EINVAL; + } + if (strnstr(tavil_conn_mad_text[tavil_mad_input], "NOTUSED", sizeof("NOTUSED"))) { dev_dbg(codec->dev, diff --git a/sound/soc/msm/qdsp6v2/msm-dolby-dap-config.c b/sound/soc/msm/qdsp6v2/msm-dolby-dap-config.c index bb0f890d300f..5866e46cc6a2 100644 --- a/sound/soc/msm/qdsp6v2/msm-dolby-dap-config.c +++ b/sound/soc/msm/qdsp6v2/msm-dolby-dap-config.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2014, 2016, The Linux Foundation. All rights reserved. * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. @@ -18,6 +18,10 @@ #include "msm-dolby-dap-config.h" +#ifndef DOLBY_PARAM_VCNB_MAX_LENGTH +#define DOLBY_PARAM_VCNB_MAX_LENGTH 40 +#endif + /* dolby endp based parameters */ struct dolby_dap_endp_params_s { int device; @@ -896,6 +900,11 @@ int msm_dolby_dap_param_visualizer_control_get(struct snd_kcontrol *kcontrol, uint32_t param_payload_len = DOLBY_PARAM_PAYLOAD_SIZE * sizeof(uint32_t); int port_id, copp_idx, idx; + if (length > DOLBY_PARAM_VCNB_MAX_LENGTH || length <= 0) { + pr_err("%s Incorrect VCNB length", __func__); + ucontrol->value.integer.value[0] = 0; + return -EINVAL; + } for (idx = 0; idx < AFE_MAX_PORTS; idx++) { port_id = dolby_dap_params_states.port_id[idx]; copp_idx = dolby_dap_params_states.copp_idx[idx]; diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c index 2639bfd5b8fd..dc57ae804dfa 100644 --- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c +++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c @@ -10982,6 +10982,7 @@ static const struct snd_soc_dapm_route intercon[] = { {"TERT_MI2S_UL_HL", NULL, "TERT_MI2S_TX"}, {"SEC_I2S_RX", NULL, "SEC_I2S_DL_HL"}, {"PRI_MI2S_UL_HL", NULL, "PRI_MI2S_TX"}, + {"SEC_MI2S_UL_HL", NULL, "SEC_MI2S_TX"}, {"SEC_MI2S_RX", NULL, "SEC_MI2S_DL_HL"}, {"PRI_MI2S_RX", NULL, "PRI_MI2S_DL_HL"}, {"TERT_MI2S_RX", NULL, "TERT_MI2S_DL_HL"}, |