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authorJiri Kosina <jkosina@suse.cz>2010-10-30 22:16:56 +0200
committerJiri Kosina <jkosina@suse.cz>2010-10-30 22:16:56 +0200
commitf1e095f1d206b81b44160f41278ce5c78641e9b7 (patch)
treebd293d46d2d3e4cdf435a22ddb2877c6ba1b8acc /arch/mips/pci/pcie-octeon.c
parentb0438a1b71955c425c304a2a483765ef24841766 (diff)
parent1792f17b7210280a3d7ff29da9614ba779cfcedb (diff)
Merge branch 'master' into for-next
Diffstat (limited to 'arch/mips/pci/pcie-octeon.c')
-rw-r--r--arch/mips/pci/pcie-octeon.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index 861361e0c9af..385f035b24e4 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -75,6 +75,8 @@ union cvmx_pcie_address {
} mem;
};
+#include <dma-coherence.h>
+
/**
* Return the Core virtual base address for PCIe IO access. IOs are
* read/written as an offset from this address.
@@ -1391,6 +1393,9 @@ static int __init octeon_pcie_setup(void)
cvmx_pcie_get_io_size(1) - 1;
register_pci_controller(&octeon_pcie1_controller);
}
+
+ octeon_pci_dma_init();
+
return 0;
}