summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorUjwal Patel <ujwalp@codeaurora.org>2013-09-30 10:12:39 -0700
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:21:44 -0700
commited86f33f0291535d3031a367cf890dd9f05154ea (patch)
tree4aec1811b6b7048cbe722a898860e611b5441ae6
parent752f9c2a3e02bc2c190df714e68e25500f419a2c (diff)
msm: mdss: Use single flush method for 8084 split display
Split display use-cases have two independent control paths. MDSS before 8084 requires both control paths to program their own flush registers which can lead to race conditions. Starting 8084, MDSS HW can achieve same flush but with only single register write and eliminating race conditions. Change-Id: I62e5d61decb6f20cbd9bec542e035471b84b2c0a Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
-rw-r--r--drivers/video/fbdev/msm/mdss_mdp_ctl.c16
-rw-r--r--drivers/video/fbdev/msm/mdss_mdp_hwio.h1
2 files changed, 13 insertions, 4 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c
index 722d6d23bc3c..33a7d8a49a9d 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c
@@ -997,8 +997,11 @@ static void mdss_mdp_ctl_split_display_enable(int enable,
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTRL, upper);
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTRL, lower);
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_SPLIT_DISPLAY_EN, enable);
-}
+ if (main_ctl->mdata->mdp_rev >= MDSS_MDP_HW_REV_103)
+ MDSS_MDP_REG_WRITE(MMSS_MDP_MDP_SSPP_SPARE_0,
+ enable ? 0x1 : 0x0);
+}
int mdss_mdp_ctl_destroy(struct mdss_mdp_ctl *ctl)
{
@@ -1788,15 +1791,20 @@ int mdss_mdp_display_commit(struct mdss_mdp_ctl *ctl, void *arg)
/* postprocessing setup, including dspp */
mdss_mdp_pp_setup_locked(ctl);
+
+ if (sctl && ctl->mdata->mdp_rev >= MDSS_MDP_HW_REV_103) {
+ ctl->flush_bits |= sctl->flush_bits;
+ sctl->flush_bits = 0;
+ }
+
mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, ctl->flush_bits);
- if (sctl) {
+ if (sctl && sctl->flush_bits) {
mdss_mdp_ctl_write(sctl, MDSS_MDP_REG_CTL_FLUSH,
sctl->flush_bits);
+ sctl->flush_bits = 0;
}
wmb();
ctl->flush_bits = 0;
- if (sctl)
- sctl->flush_bits = 0;
if (ctl->display_fnc)
ret = ctl->display_fnc(ctl, arg); /* kickoff */
diff --git a/drivers/video/fbdev/msm/mdss_mdp_hwio.h b/drivers/video/fbdev/msm/mdss_mdp_hwio.h
index a13c5be41395..8ddf10156f44 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_hwio.h
+++ b/drivers/video/fbdev/msm/mdss_mdp_hwio.h
@@ -44,6 +44,7 @@
#define MDSS_MDP_REG_HIST_INTR_EN 0x0011C
#define MDSS_MDP_REG_HIST_INTR_STATUS 0x00120
#define MDSS_MDP_REG_HIST_INTR_CLEAR 0x00124
+#define MMSS_MDP_MDP_SSPP_SPARE_0 0x00128
#define MDSS_MDP_REG_VIDEO_INTF_UNDERFLOW_CTL 0x003E0
#define MDSS_MDP_REG_SPLIT_DISPLAY_EN 0x003F4