diff options
| author | Sivan Reinstein <sivanr@codeaurora.org> | 2016-03-14 21:47:41 +0200 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-25 16:03:59 -0700 |
| commit | 1c5466dbec98409c5882f297385d0730abab6cbb (patch) | |
| tree | b8bf96bc65e289e74038bef97e73a93bc016fbf2 | |
| parent | a90d8e325e8bb8eb5bfa61b9270c825640aa55f9 (diff) | |
ARM: dts: msm: add entry for IPA FWs
Add IPA FWs to the subsystems which require secure PIL
process.
Change-Id: I6a197257d82f9315afd101e5b4d146b4504dc0db
CRs-Fixed: 970340
Acked-by: David Arinzon <darinzon@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 5b715bc1ecd9..62e3b1c21ba3 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -808,6 +808,13 @@ qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; }; + qcom,ipa_fws@1e08000 { + compatible = "qcom,pil-tz-generic"; + qcom,pas-id = <0xF>; + qcom,firmware-name = "ipa_fws"; + memory-region = <&peripheral_mem>; + }; + qcom,chd { compatible = "qcom,core-hang-detect"; qcom,threshold-arr = <0x179880b0 0x179980b0 |