diff options
| author | Ashish Garg <ashigarg@codeaurora.org> | 2017-05-23 14:45:55 +0530 |
|---|---|---|
| committer | Ashish Garg <ashigarg@codeaurora.org> | 2017-05-23 18:38:25 +0530 |
| commit | 5d1a2710565c17f07c22a2816c5856180a5a78c8 (patch) | |
| tree | a0b8066c832019672b422be26f9ef7870cc930f8 | |
| parent | 60be71604a84d2e047215cb702d6324379a353bb (diff) | |
msm: mdss: ensure clocks are on till pixel transfer is completed
When pixel transfer is going on, there is a race condition during
which pixel clock can get turned off due to early clock gating
before CMD_MDP interrupt is triggered which can cause interrupt
storm. This change ensures CMD_MDP interrupt is received before
turning off clocks.
Change-Id: I33b664334912584170c12733329051b067c3f1da
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_dsi_host.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/video/fbdev/msm/mdss_dsi_host.c b/drivers/video/fbdev/msm/mdss_dsi_host.c index 1a471155072b..7b923ef08b5a 100644 --- a/drivers/video/fbdev/msm/mdss_dsi_host.c +++ b/drivers/video/fbdev/msm/mdss_dsi_host.c @@ -165,7 +165,14 @@ void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl, MDSS_XLOG(ctrl->ndx, enable, ctrl->mdp_busy, current->pid, client); - if (enable == 0) { + /* + * ensure that before going into ecg or turning + * off the clocks, cmd_mdp_busy is not true. During a + * race condition, clocks are turned off and so the + * isr for cmd_mdp_busy does not get cleared in hw. + */ + if (enable == MDSS_DSI_CLK_OFF || + enable == MDSS_DSI_CLK_EARLY_GATE) { /* need wait before disable */ mutex_lock(&ctrl->cmd_mutex); mdss_dsi_cmd_mdp_busy(ctrl); |